mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #647 from screamerbg/master
Tools: Restructure targets.py for easier navigationpull/654/head
commit
42a4935bd5
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@ -62,6 +62,9 @@ class Target:
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def init_hooks(self, hook, toolchain_name):
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def init_hooks(self, hook, toolchain_name):
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pass
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pass
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### NXP ###
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# This class implements the post-link patching step needed by LPC targets
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# This class implements the post-link patching step needed by LPC targets
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class LPCTarget(Target):
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class LPCTarget(Target):
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def __init__(self):
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def __init__(self):
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@ -75,22 +78,20 @@ class LPCTarget(Target):
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t_self.debug("LPC Patch: %s" % os.path.split(binf)[1])
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t_self.debug("LPC Patch: %s" % os.path.split(binf)[1])
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patch(binf)
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patch(binf)
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class LPC2368(LPCTarget):
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class LPC11C24(LPCTarget):
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def __init__(self):
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def __init__(self):
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LPCTarget.__init__(self)
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LPCTarget.__init__(self)
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self.core = "ARM7TDMI-S"
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC23XX']
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self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX']
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self.supported_toolchains = ["ARM", "GCC_ARM", "GCC_CR"]
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC1114(LPCTarget):
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class LPC1768(LPCTarget):
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def __init__(self):
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def __init__(self):
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LPCTarget.__init__(self)
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768']
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self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
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self.detect_code = "1010"
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self.default_toolchain = "uARM"
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class LPC11U24(LPCTarget):
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class LPC11U24(LPCTarget):
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def __init__(self):
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def __init__(self):
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@ -101,6 +102,14 @@ class LPC11U24(LPCTarget):
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self.default_toolchain = "uARM"
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self.default_toolchain = "uARM"
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self.detect_code = "1040"
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self.detect_code = "1040"
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class OC_MBUINO(LPC11U24):
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def __init__(self):
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LPC11U24.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.macros = ['TARGET_LPC11U24']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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self.default_toolchain = "uARM"
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class LPC11U24_301(LPCTarget):
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class LPC11U24_301(LPCTarget):
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def __init__(self):
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def __init__(self):
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@ -109,81 +118,110 @@ class LPC11U24_301(LPCTarget):
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC11U35_401(LPCTarget):
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class KL05Z(Target):
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def __init__(self):
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def __init__(self):
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Target.__init__(self)
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LPCTarget.__init__(self)
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self.core = "Cortex-M0+"
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self.core = "Cortex-M0"
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self.extra_labels = ['Freescale', 'KLXX']
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
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self.default_toolchain = "uARM"
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class LPC11U35_501(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
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self.default_toolchain = "uARM"
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class LPC11U37_501(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
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self.default_toolchain = "uARM"
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class LPCCAPPUCCINO(LPC11U37_501):
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def __init__(self):
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LPC11U37_501.__init__(self)
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class ARCH_GPRS(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U37_501']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
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self.default_toolchain = "uARM"
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self.default_toolchain = "uARM"
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self.supported_form_factors = ["ARDUINO"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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class LPC11U68(LPCTarget):
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class KL25Z(Target):
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def __init__(self):
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def __init__(self):
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Target.__init__(self)
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LPCTarget.__init__(self)
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self.core = "Cortex-M0+"
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.extra_labels = ['NXP', 'LPC11U6X']
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self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM","IAR"]
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self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"]
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self.default_toolchain = "uARM"
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self.supported_form_factors = ["ARDUINO"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.detect_code = "1168"
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self.detect_code = "0200"
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class LPC1347(LPCTarget):
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class KL43Z(Target):
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def __init__(self):
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def __init__(self):
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Target.__init__(self)
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC13XX']
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self.supported_toolchains = ["ARM", "GCC_ARM","IAR"]
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class LPC1549(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC15XX']
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self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"]
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self.default_toolchain = "uARM"
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self.supported_form_factors = ["ARDUINO"]
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self.detect_code = "1549"
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class LPC1768(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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self.detect_code = "1010"
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class ARCH_PRO(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC176X']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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self.macros = ['TARGET_LPC1768']
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self.supported_form_factors = ["ARDUINO"]
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class UBLOX_C027(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC176X']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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self.macros = ['TARGET_LPC1768']
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self.supported_form_factors = ["ARDUINO"]
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class LPC2368(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "ARM7TDMI-S"
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self.extra_labels = ['NXP', 'LPC23XX']
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self.supported_toolchains = ["ARM", "GCC_ARM", "GCC_CR"]
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class LPC810(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M0+"
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.extra_labels = ['NXP', 'LPC81X']
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self.supported_toolchains = ["GCC_ARM", "ARM"]
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self.supported_toolchains = ["uARM"]
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self.supported_form_factors = ["ARDUINO"]
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self.default_toolchain = "uARM"
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self.is_disk_virtual = True
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class KL46Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.detect_code = "0220"
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class K20D50M(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4"
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self.extra_labels = ['Freescale']
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self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
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self.is_disk_virtual = True
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self.detect_code = "0230"
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class K64F(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F', 'FRDM']
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self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"]
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self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.default_toolchain = "ARM"
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self.detect_code = "0240"
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class K22F(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE']
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self.macros = ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"]
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self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.is_disk_virtual = True
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class LPC812(LPCTarget):
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class LPC812(LPCTarget):
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@ -197,17 +235,6 @@ class LPC812(LPCTarget):
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self.is_disk_virtual = True
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self.is_disk_virtual = True
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self.detect_code = "1050"
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self.detect_code = "1050"
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class LPC810(LPCTarget):
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def __init__(self):
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LPCTarget.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['NXP', 'LPC81X']
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self.supported_toolchains = ["uARM"]
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self.default_toolchain = "uARM"
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self.is_disk_virtual = True
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class LPC824(LPCTarget):
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class LPC824(LPCTarget):
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def __init__(self):
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def __init__(self):
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LPCTarget.__init__(self)
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LPCTarget.__init__(self)
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@ -276,7 +303,6 @@ class LPC4330_M4(LPCTarget):
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self.extra_labels = ['NXP', 'LPC43XX', 'LPC4330']
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self.extra_labels = ['NXP', 'LPC43XX', 'LPC4330']
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR", "GCC_ARM"]
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR", "GCC_ARM"]
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class LPC4330_M0(LPCTarget):
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class LPC4330_M0(LPCTarget):
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def __init__(self):
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def __init__(self):
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LPCTarget.__init__(self)
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LPCTarget.__init__(self)
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@ -298,14 +324,91 @@ class LPC1800(LPCTarget):
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self.extra_labels = ['NXP', 'LPC43XX']
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self.extra_labels = ['NXP', 'LPC43XX']
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
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### Freescale ###
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class STM32F407(Target):
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class KL05Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
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self.default_toolchain = "uARM"
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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class KL25Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM","IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.detect_code = "0200"
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class KL43Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["GCC_ARM", "ARM"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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class KL46Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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self.detect_code = "0220"
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class K20D50M(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4"
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self.extra_labels = ['Freescale']
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self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"]
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self.is_disk_virtual = True
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self.detect_code = "0230"
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class K22F(Target):
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def __init__(self):
|
def __init__(self):
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Target.__init__(self)
|
Target.__init__(self)
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self.core = "Cortex-M4F"
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self.core = "Cortex-M4F"
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self.extra_labels = ['STM', 'STM32F4', 'STM32F4XX']
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self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE']
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self.macros = ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"]
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self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
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self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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self.is_disk_virtual = True
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class K64F(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F', 'FRDM']
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self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"]
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self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
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self.supported_form_factors = ["ARDUINO"]
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||||||
|
self.is_disk_virtual = True
|
||||||
|
self.default_toolchain = "ARM"
|
||||||
|
self.detect_code = "0240"
|
||||||
|
|
||||||
|
class MTS_GAMBIT(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M4F"
|
||||||
|
self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F']
|
||||||
|
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||||
|
self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"]
|
||||||
|
self.is_disk_virtual = True
|
||||||
|
self.default_toolchain = "ARM"
|
||||||
|
|
||||||
|
|
||||||
|
### STMicro ###
|
||||||
|
|
||||||
class NUCLEO_F030R8(Target):
|
class NUCLEO_F030R8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
|
@ -317,7 +420,6 @@ class NUCLEO_F030R8(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0725"
|
self.detect_code = "0725"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F072RB(Target):
|
class NUCLEO_F072RB(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -328,7 +430,6 @@ class NUCLEO_F072RB(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0730"
|
self.detect_code = "0730"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F091RC(Target):
|
class NUCLEO_F091RC(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -339,7 +440,6 @@ class NUCLEO_F091RC(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0731"
|
self.detect_code = "0731"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F103RB(Target):
|
class NUCLEO_F103RB(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -350,7 +450,6 @@ class NUCLEO_F103RB(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0700"
|
self.detect_code = "0700"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F302R8(Target):
|
class NUCLEO_F302R8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -361,7 +460,6 @@ class NUCLEO_F302R8(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0705"
|
self.detect_code = "0705"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F334R8(Target):
|
class NUCLEO_F334R8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -372,7 +470,6 @@ class NUCLEO_F334R8(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0735"
|
self.detect_code = "0735"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F401RE(Target):
|
class NUCLEO_F401RE(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -383,7 +480,6 @@ class NUCLEO_F401RE(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0720"
|
self.detect_code = "0720"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_F411RE(Target):
|
class NUCLEO_F411RE(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -394,7 +490,6 @@ class NUCLEO_F411RE(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0740"
|
self.detect_code = "0740"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_L053R8(Target):
|
class NUCLEO_L053R8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -405,7 +500,6 @@ class NUCLEO_L053R8(Target):
|
||||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||||
self.detect_code = "0715"
|
self.detect_code = "0715"
|
||||||
|
|
||||||
|
|
||||||
class NUCLEO_L152RE(Target):
|
class NUCLEO_L152RE(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -424,67 +518,43 @@ class STM32F3XX(Target):
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||||
self.default_toolchain = "uARM"
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
class STM32F407(Target):
|
||||||
class LPC1347(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
Target.__init__(self)
|
||||||
self.core = "Cortex-M3"
|
self.core = "Cortex-M4F"
|
||||||
self.extra_labels = ['NXP', 'LPC13XX']
|
self.extra_labels = ['STM', 'STM32F4', 'STM32F4XX']
|
||||||
self.supported_toolchains = ["ARM", "GCC_ARM","IAR"]
|
self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"]
|
||||||
|
|
||||||
|
class ARCH_MAX(Target):
|
||||||
class LPC1114(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
Target.__init__(self)
|
||||||
self.core = "Cortex-M0"
|
self.core = "Cortex-M4F"
|
||||||
self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX']
|
self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class LPC11C24(LPCTarget):
|
|
||||||
def __init__(self):
|
|
||||||
LPCTarget.__init__(self)
|
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||||
|
|
||||||
|
class DISCO_F051R8(Target):
|
||||||
class LPC11U35_401(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
Target.__init__(self)
|
||||||
self.core = "Cortex-M0"
|
self.core = "Cortex-M0"
|
||||||
self.extra_labels = ['NXP', 'LPC11UXX']
|
self.extra_labels = ['STM', 'STM32F0', 'STM32F051', 'STM32F051R8']
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
|
self.supported_toolchains = ["GCC_ARM"]
|
||||||
self.default_toolchain = "uARM"
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
class DISCO_F100RB(Target):
|
||||||
class LPC11U35_501(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
Target.__init__(self)
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class LPC11U37_501(LPCTarget):
|
|
||||||
def __init__(self):
|
|
||||||
LPCTarget.__init__(self)
|
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['NXP', 'LPC11UXX']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class UBLOX_C027(LPCTarget):
|
|
||||||
def __init__(self):
|
|
||||||
LPCTarget.__init__(self)
|
|
||||||
self.core = "Cortex-M3"
|
self.core = "Cortex-M3"
|
||||||
self.extra_labels = ['NXP', 'LPC176X']
|
self.extra_labels = ['STM', 'STM32F1', 'STM32F100RB']
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
|
self.supported_toolchains = ["GCC_ARM"]
|
||||||
self.macros = ['TARGET_LPC1768']
|
self.default_toolchain = "uARM"
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
|
||||||
|
class DISCO_F303VC(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M4F"
|
||||||
|
self.extra_labels = ['STM', 'STM32F3', 'STM32F303', 'STM32F303VC']
|
||||||
|
self.supported_toolchains = ["GCC_ARM"]
|
||||||
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
class DISCO_F334C8(Target):
|
class DISCO_F334C8(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
|
@ -495,7 +565,31 @@ class DISCO_F334C8(Target):
|
||||||
self.default_toolchain = "GCC_ARM"
|
self.default_toolchain = "GCC_ARM"
|
||||||
self.detect_code = "0735"
|
self.detect_code = "0735"
|
||||||
|
|
||||||
|
class DISCO_F407VG(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M4F"
|
||||||
|
self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
|
||||||
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||||
|
|
||||||
|
class DISCO_F429ZI(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M4F"
|
||||||
|
self.extra_labels = ['STM', 'STM32F4', 'STM32F429', 'STM32F429ZI']
|
||||||
|
self.supported_toolchains = ["GCC_ARM"]
|
||||||
|
self.default_toolchain = "GCC_ARM"
|
||||||
|
|
||||||
|
class DISCO_L053C8(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M0+"
|
||||||
|
self.extra_labels = ['STM', 'STM32L0', 'STM32L053C8']
|
||||||
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||||
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
|
||||||
|
### Nordic ###
|
||||||
|
|
||||||
class NRF51822(Target):
|
class NRF51822(Target):
|
||||||
# the following is a list of possible Nordic softdevices in decreasing order
|
# the following is a list of possible Nordic softdevices in decreasing order
|
||||||
|
@ -557,7 +651,6 @@ class NRF51822(Target):
|
||||||
with open(binf.replace(".bin", ".hex"), "w") as f:
|
with open(binf.replace(".bin", ".hex"), "w") as f:
|
||||||
sdh.tofile(f, format='hex')
|
sdh.tofile(f, format='hex')
|
||||||
|
|
||||||
|
|
||||||
class NRF51822_OTA(Target):
|
class NRF51822_OTA(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -567,37 +660,6 @@ class NRF51822_OTA(Target):
|
||||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||||
self.is_disk_virtual = True
|
self.is_disk_virtual = True
|
||||||
|
|
||||||
|
|
||||||
class ARCH_BLE(NRF51822):
|
|
||||||
def __init__(self):
|
|
||||||
NRF51822.__init__(self)
|
|
||||||
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
|
||||||
self.macros = ['TARGET_NRF51822']
|
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
|
||||||
|
|
||||||
|
|
||||||
class HRM1017(NRF51822):
|
|
||||||
def __init__(self):
|
|
||||||
NRF51822.__init__(self)
|
|
||||||
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
|
||||||
self.macros = ['TARGET_NRF51822']
|
|
||||||
|
|
||||||
|
|
||||||
class RBLAB_NRF51822(NRF51822):
|
|
||||||
def __init__(self):
|
|
||||||
NRF51822.__init__(self)
|
|
||||||
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
|
||||||
self.macros = ['TARGET_NRF51822']
|
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
|
||||||
|
|
||||||
|
|
||||||
class RBLAB_BLENANO(NRF51822):
|
|
||||||
def __init__(self):
|
|
||||||
NRF51822.__init__(self)
|
|
||||||
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
|
||||||
self.macros = ['TARGET_NRF51822']
|
|
||||||
|
|
||||||
|
|
||||||
class NRF51_DK(NRF51822):
|
class NRF51_DK(NRF51822):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
NRF51822.__init__(self)
|
NRF51822.__init__(self)
|
||||||
|
@ -605,7 +667,6 @@ class NRF51_DK(NRF51822):
|
||||||
self.macros = ['TARGET_NRF51822']
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
self.supported_form_factors = ["ARDUINO"]
|
||||||
|
|
||||||
|
|
||||||
class NRF51_DK_OTA(Target):
|
class NRF51_DK_OTA(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
Target.__init__(self)
|
||||||
|
@ -615,7 +676,6 @@ class NRF51_DK_OTA(Target):
|
||||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||||
self.is_disk_virtual = True
|
self.is_disk_virtual = True
|
||||||
|
|
||||||
|
|
||||||
class NRF51_DONGLE(NRF51822):
|
class NRF51_DONGLE(NRF51822):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
NRF51822.__init__(self)
|
NRF51822.__init__(self)
|
||||||
|
@ -623,69 +683,31 @@ class NRF51_DONGLE(NRF51822):
|
||||||
self.macros = ['TARGET_NRF51822']
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
self.supported_form_factors = ["ARDUINO"]
|
||||||
|
|
||||||
|
class ARCH_BLE(NRF51822):
|
||||||
class LPC1549(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
NRF51822.__init__(self)
|
||||||
self.core = "Cortex-M3"
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
self.extra_labels = ['NXP', 'LPC15XX']
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
self.supported_form_factors = ["ARDUINO"]
|
||||||
self.detect_code = "1549"
|
|
||||||
|
|
||||||
|
class HRM1017(NRF51822):
|
||||||
class LPC11U68(LPCTarget):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
LPCTarget.__init__(self)
|
NRF51822.__init__(self)
|
||||||
self.core = "Cortex-M0+"
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
self.extra_labels = ['NXP', 'LPC11U6X']
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
class RBLAB_NRF51822(NRF51822):
|
||||||
|
def __init__(self):
|
||||||
|
NRF51822.__init__(self)
|
||||||
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
self.supported_form_factors = ["ARDUINO"]
|
||||||
self.detect_code = "1168"
|
|
||||||
|
|
||||||
|
class RBLAB_BLENANO(NRF51822):
|
||||||
class DISCO_F100RB(Target):
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
Target.__init__(self)
|
NRF51822.__init__(self)
|
||||||
self.core = "Cortex-M3"
|
self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K']
|
||||||
self.extra_labels = ['STM', 'STM32F1', 'STM32F100RB']
|
self.macros = ['TARGET_NRF51822']
|
||||||
self.supported_toolchains = ["GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class DISCO_F051R8(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['STM', 'STM32F0', 'STM32F051', 'STM32F051R8']
|
|
||||||
self.supported_toolchains = ["GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class DISCO_F407VG(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M4F"
|
|
||||||
self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
|
||||||
|
|
||||||
class ARCH_MAX(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M4F"
|
|
||||||
self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
|
||||||
|
|
||||||
class DISCO_F303VC(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M4F"
|
|
||||||
self.extra_labels = ['STM', 'STM32F3', 'STM32F303', 'STM32F303VC']
|
|
||||||
self.supported_toolchains = ["GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
|
|
||||||
class XADOW_M0(LPCTarget):
|
class XADOW_M0(LPCTarget):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
|
@ -696,30 +718,7 @@ class XADOW_M0(LPCTarget):
|
||||||
self.default_toolchain = "uARM"
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
|
||||||
class ARCH_PRO(LPCTarget):
|
### ARM ###
|
||||||
def __init__(self):
|
|
||||||
LPCTarget.__init__(self)
|
|
||||||
self.core = "Cortex-M3"
|
|
||||||
self.extra_labels = ['NXP', 'LPC176X']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
|
|
||||||
self.macros = ['TARGET_LPC1768']
|
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
|
||||||
|
|
||||||
|
|
||||||
class ARCH_GPRS(LPCTarget):
|
|
||||||
def __init__(self):
|
|
||||||
LPCTarget.__init__(self)
|
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U37_501']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
self.supported_form_factors = ["ARDUINO"]
|
|
||||||
|
|
||||||
|
|
||||||
class LPCCAPPUCCINO(LPC11U37_501):
|
|
||||||
def __init__(self):
|
|
||||||
LPC11U37_501.__init__(self)
|
|
||||||
|
|
||||||
|
|
||||||
class ARM_MPS2(Target):
|
class ARM_MPS2(Target):
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
|
@ -730,63 +729,47 @@ class ARM_MPS2(Target):
|
||||||
self.default_toolchain = "ARM"
|
self.default_toolchain = "ARM"
|
||||||
|
|
||||||
|
|
||||||
class OC_MBUINO(LPC11U24):
|
|
||||||
def __init__(self):
|
|
||||||
LPC11U24.__init__(self)
|
|
||||||
self.core = "Cortex-M0"
|
|
||||||
self.extra_labels = ['NXP', 'LPC11UXX']
|
|
||||||
self.macros = ['TARGET_LPC11U24']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
class MTS_GAMBIT(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M4F"
|
|
||||||
self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F']
|
|
||||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
|
||||||
self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"]
|
|
||||||
self.is_disk_virtual = True
|
|
||||||
self.default_toolchain = "ARM"
|
|
||||||
|
|
||||||
class DISCO_F429ZI(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M4F"
|
|
||||||
self.extra_labels = ['STM', 'STM32F4', 'STM32F429', 'STM32F429ZI']
|
|
||||||
self.supported_toolchains = ["GCC_ARM"]
|
|
||||||
self.default_toolchain = "GCC_ARM"
|
|
||||||
|
|
||||||
class DISCO_L053C8(Target):
|
|
||||||
def __init__(self):
|
|
||||||
Target.__init__(self)
|
|
||||||
self.core = "Cortex-M0+"
|
|
||||||
self.extra_labels = ['STM', 'STM32L0', 'STM32L053C8']
|
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
|
||||||
self.default_toolchain = "uARM"
|
|
||||||
|
|
||||||
# Get a single instance for each target
|
# Get a single instance for each target
|
||||||
TARGETS = [
|
TARGETS = [
|
||||||
LPC2368(),
|
|
||||||
LPC1768(),
|
### NXP ###
|
||||||
|
LPC11C24(),
|
||||||
LPC11U24(),
|
LPC11U24(),
|
||||||
|
OC_MBUINO(), # LPC11U24
|
||||||
LPC11U24_301(),
|
LPC11U24_301(),
|
||||||
|
LPC11U35_401(),
|
||||||
|
LPC11U35_501(),
|
||||||
|
LPC11U37_501(),
|
||||||
|
LPCCAPPUCCINO(),# LPC11U37_501
|
||||||
|
ARCH_GPRS(), # LPC11U37_501
|
||||||
|
LPC11U68(),
|
||||||
|
LPC1114(),
|
||||||
|
LPC1347(),
|
||||||
|
LPC1549(),
|
||||||
|
LPC1768(),
|
||||||
|
ARCH_PRO(), # LPC1768
|
||||||
|
UBLOX_C027(), # LPC1768
|
||||||
|
LPC2368(),
|
||||||
|
LPC810(),
|
||||||
|
LPC812(),
|
||||||
|
LPC824(),
|
||||||
|
SSCI824(), # LPC824
|
||||||
|
LPC4088(),
|
||||||
|
LPC4330_M4(),
|
||||||
|
LPC4330_M0(),
|
||||||
|
LPC4337(),
|
||||||
|
|
||||||
|
### Freescale ###
|
||||||
KL05Z(),
|
KL05Z(),
|
||||||
KL25Z(),
|
KL25Z(),
|
||||||
KL43Z(),
|
KL43Z(),
|
||||||
KL46Z(),
|
KL46Z(),
|
||||||
K20D50M(),
|
K20D50M(),
|
||||||
K64F(),
|
|
||||||
K22F(),
|
K22F(),
|
||||||
LPC812(),
|
K64F(),
|
||||||
LPC810(),
|
MTS_GAMBIT(), # FRDM K64F
|
||||||
LPC824(),
|
|
||||||
SSCI824(),
|
### STMicro ###
|
||||||
LPC4088(),
|
|
||||||
LPC4330_M4(),
|
|
||||||
LPC4337(),
|
|
||||||
STM32F3XX(),
|
|
||||||
STM32F407(),
|
|
||||||
NUCLEO_F030R8(),
|
NUCLEO_F030R8(),
|
||||||
NUCLEO_F072RB(),
|
NUCLEO_F072RB(),
|
||||||
NUCLEO_F091RC(),
|
NUCLEO_F091RC(),
|
||||||
|
@ -797,38 +780,31 @@ TARGETS = [
|
||||||
NUCLEO_F411RE(),
|
NUCLEO_F411RE(),
|
||||||
NUCLEO_L053R8(),
|
NUCLEO_L053R8(),
|
||||||
NUCLEO_L152RE(),
|
NUCLEO_L152RE(),
|
||||||
LPC1347(),
|
STM32F3XX(),
|
||||||
LPC1114(),
|
STM32F407(),
|
||||||
LPC11C24(),
|
|
||||||
LPC11U35_401(),
|
|
||||||
LPC11U35_501(),
|
|
||||||
NRF51822(),
|
|
||||||
NRF51822_OTA(),
|
|
||||||
NRF51_DONGLE(),
|
|
||||||
UBLOX_C027(),
|
|
||||||
LPC1549(),
|
|
||||||
LPC11U68(),
|
|
||||||
DISCO_F051R8(),
|
DISCO_F051R8(),
|
||||||
DISCO_F100RB(),
|
DISCO_F100RB(),
|
||||||
DISCO_F303VC(),
|
DISCO_F303VC(),
|
||||||
DISCO_F407VG(),
|
DISCO_F334C8(),
|
||||||
XADOW_M0(),
|
DISCO_F407VG(), # STM32F407
|
||||||
ARCH_BLE(),
|
ARCH_MAX(), # STM32F407
|
||||||
NRF51_DK(),
|
|
||||||
NRF51_DK_OTA(),
|
|
||||||
ARCH_PRO(),
|
|
||||||
ARCH_GPRS(),
|
|
||||||
LPCCAPPUCCINO(),
|
|
||||||
HRM1017(),
|
|
||||||
ARM_MPS2(),
|
|
||||||
RBLAB_NRF51822(),
|
|
||||||
RBLAB_BLENANO(),
|
|
||||||
OC_MBUINO(),
|
|
||||||
MTS_GAMBIT(),
|
|
||||||
ARCH_MAX(),
|
|
||||||
DISCO_F429ZI(),
|
DISCO_F429ZI(),
|
||||||
DISCO_L053C8(),
|
DISCO_L053C8(),
|
||||||
DISCO_F334C8(),
|
|
||||||
|
### Nordic ###
|
||||||
|
NRF51822(),
|
||||||
|
NRF51822_OTA(), # nRF51822
|
||||||
|
NRF51_DK(),
|
||||||
|
NRF51_DK_OTA(), # nRF51822
|
||||||
|
NRF51_DONGLE(),
|
||||||
|
ARCH_BLE(), # nRF51822
|
||||||
|
HRM1017(), # nRF51822
|
||||||
|
RBLAB_NRF51822(),# nRF51822
|
||||||
|
RBLAB_BLENANO(),# nRF51822
|
||||||
|
XADOW_M0(), # nRF51822
|
||||||
|
|
||||||
|
### ARM ###
|
||||||
|
ARM_MPS2(),
|
||||||
]
|
]
|
||||||
|
|
||||||
# Map each target name to its unique instance
|
# Map each target name to its unique instance
|
||||||
|
|
Loading…
Reference in New Issue