diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index 2df3aa7c8a..cf1dbfa9b4 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -62,6 +62,9 @@ class Target: def init_hooks(self, hook, toolchain_name): pass + +### NXP ### + # This class implements the post-link patching step needed by LPC targets class LPCTarget(Target): def __init__(self): @@ -75,22 +78,20 @@ class LPCTarget(Target): t_self.debug("LPC Patch: %s" % os.path.split(binf)[1]) patch(binf) -class LPC2368(LPCTarget): +class LPC11C24(LPCTarget): def __init__(self): LPCTarget.__init__(self) - self.core = "ARM7TDMI-S" - self.extra_labels = ['NXP', 'LPC23XX'] - self.supported_toolchains = ["ARM", "GCC_ARM", "GCC_CR"] + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - -class LPC1768(LPCTarget): +class LPC1114(LPCTarget): def __init__(self): LPCTarget.__init__(self) - self.core = "Cortex-M3" - self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] - self.detect_code = "1010" - + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] + self.default_toolchain = "uARM" class LPC11U24(LPCTarget): def __init__(self): @@ -101,6 +102,14 @@ class LPC11U24(LPCTarget): self.default_toolchain = "uARM" self.detect_code = "1040" +class OC_MBUINO(LPC11U24): + def __init__(self): + LPC11U24.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11UXX'] + self.macros = ['TARGET_LPC11U24'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] + self.default_toolchain = "uARM" class LPC11U24_301(LPCTarget): def __init__(self): @@ -109,81 +118,110 @@ class LPC11U24_301(LPCTarget): self.extra_labels = ['NXP', 'LPC11UXX'] self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - -class KL05Z(Target): +class LPC11U35_401(LPCTarget): def __init__(self): - Target.__init__(self) - self.core = "Cortex-M0+" - self.extra_labels = ['Freescale', 'KLXX'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"] + LPCTarget.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11UXX'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] + self.default_toolchain = "uARM" + +class LPC11U35_501(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] + self.default_toolchain = "uARM" + +class LPC11U37_501(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11UXX'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] + self.default_toolchain = "uARM" + +class LPCCAPPUCCINO(LPC11U37_501): + def __init__(self): + LPC11U37_501.__init__(self) + +class ARCH_GPRS(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U37_501'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] self.default_toolchain = "uARM" self.supported_form_factors = ["ARDUINO"] - self.is_disk_virtual = True - -class KL25Z(Target): +class LPC11U68(LPCTarget): def __init__(self): - Target.__init__(self) + LPCTarget.__init__(self) self.core = "Cortex-M0+" - self.extra_labels = ['Freescale', 'KLXX'] - self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM","IAR"] + self.extra_labels = ['NXP', 'LPC11U6X'] + self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"] + self.default_toolchain = "uARM" self.supported_form_factors = ["ARDUINO"] - self.is_disk_virtual = True - self.detect_code = "0200" + self.detect_code = "1168" - -class KL43Z(Target): +class LPC1347(LPCTarget): def __init__(self): - Target.__init__(self) + LPCTarget.__init__(self) + self.core = "Cortex-M3" + self.extra_labels = ['NXP', 'LPC13XX'] + self.supported_toolchains = ["ARM", "GCC_ARM","IAR"] + +class LPC1549(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M3" + self.extra_labels = ['NXP', 'LPC15XX'] + self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"] + self.default_toolchain = "uARM" + self.supported_form_factors = ["ARDUINO"] + self.detect_code = "1549" + +class LPC1768(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M3" + self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] + self.detect_code = "1010" + +class ARCH_PRO(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M3" + self.extra_labels = ['NXP', 'LPC176X'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] + self.macros = ['TARGET_LPC1768'] + self.supported_form_factors = ["ARDUINO"] + +class UBLOX_C027(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "Cortex-M3" + self.extra_labels = ['NXP', 'LPC176X'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] + self.macros = ['TARGET_LPC1768'] + self.supported_form_factors = ["ARDUINO"] + +class LPC2368(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) + self.core = "ARM7TDMI-S" + self.extra_labels = ['NXP', 'LPC23XX'] + self.supported_toolchains = ["ARM", "GCC_ARM", "GCC_CR"] + +class LPC810(LPCTarget): + def __init__(self): + LPCTarget.__init__(self) self.core = "Cortex-M0+" - self.extra_labels = ['Freescale', 'KLXX'] - self.supported_toolchains = ["GCC_ARM", "ARM"] - self.supported_form_factors = ["ARDUINO"] - self.is_disk_virtual = True - - -class KL46Z(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M0+" - self.extra_labels = ['Freescale', 'KLXX'] - self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"] - self.supported_form_factors = ["ARDUINO"] - self.is_disk_virtual = True - self.detect_code = "0220" - - -class K20D50M(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4" - self.extra_labels = ['Freescale'] - self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"] - self.is_disk_virtual = True - self.detect_code = "0230" - - -class K64F(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F', 'FRDM'] - self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"] - self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"] - self.supported_form_factors = ["ARDUINO"] - self.is_disk_virtual = True - self.default_toolchain = "ARM" - self.detect_code = "0240" - - -class K22F(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE'] - self.macros = ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"] - self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"] - self.supported_form_factors = ["ARDUINO"] + self.extra_labels = ['NXP', 'LPC81X'] + self.supported_toolchains = ["uARM"] + self.default_toolchain = "uARM" self.is_disk_virtual = True class LPC812(LPCTarget): @@ -197,17 +235,6 @@ class LPC812(LPCTarget): self.is_disk_virtual = True self.detect_code = "1050" - -class LPC810(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0+" - self.extra_labels = ['NXP', 'LPC81X'] - self.supported_toolchains = ["uARM"] - self.default_toolchain = "uARM" - self.is_disk_virtual = True - - class LPC824(LPCTarget): def __init__(self): LPCTarget.__init__(self) @@ -276,7 +303,6 @@ class LPC4330_M4(LPCTarget): self.extra_labels = ['NXP', 'LPC43XX', 'LPC4330'] self.supported_toolchains = ["ARM", "GCC_CR", "IAR", "GCC_ARM"] - class LPC4330_M0(LPCTarget): def __init__(self): LPCTarget.__init__(self) @@ -298,14 +324,91 @@ class LPC1800(LPCTarget): self.extra_labels = ['NXP', 'LPC43XX'] self.supported_toolchains = ["ARM", "GCC_CR", "IAR"] + +### Freescale ### -class STM32F407(Target): +class KL05Z(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M0+" + self.extra_labels = ['Freescale', 'KLXX'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"] + self.default_toolchain = "uARM" + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True + +class KL25Z(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M0+" + self.extra_labels = ['Freescale', 'KLXX'] + self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM","IAR"] + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True + self.detect_code = "0200" + +class KL43Z(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M0+" + self.extra_labels = ['Freescale', 'KLXX'] + self.supported_toolchains = ["GCC_ARM", "ARM"] + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True + +class KL46Z(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M0+" + self.extra_labels = ['Freescale', 'KLXX'] + self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"] + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True + self.detect_code = "0220" + +class K20D50M(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4" + self.extra_labels = ['Freescale'] + self.supported_toolchains = ["GCC_ARM", "ARM", "IAR"] + self.is_disk_virtual = True + self.detect_code = "0230" + +class K22F(Target): def __init__(self): Target.__init__(self) self.core = "Cortex-M4F" - self.extra_labels = ['STM', 'STM32F4', 'STM32F4XX'] + self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE'] + self.macros = ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"] self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"] + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True +class K64F(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F', 'FRDM'] + self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"] + self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"] + self.supported_form_factors = ["ARDUINO"] + self.is_disk_virtual = True + self.default_toolchain = "ARM" + self.detect_code = "0240" + +class MTS_GAMBIT(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F'] + self.supported_toolchains = ["ARM", "GCC_ARM"] + self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"] + self.is_disk_virtual = True + self.default_toolchain = "ARM" + + +### STMicro ### class NUCLEO_F030R8(Target): def __init__(self): @@ -317,7 +420,6 @@ class NUCLEO_F030R8(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0725" - class NUCLEO_F072RB(Target): def __init__(self): Target.__init__(self) @@ -328,7 +430,6 @@ class NUCLEO_F072RB(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0730" - class NUCLEO_F091RC(Target): def __init__(self): Target.__init__(self) @@ -339,7 +440,6 @@ class NUCLEO_F091RC(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0731" - class NUCLEO_F103RB(Target): def __init__(self): Target.__init__(self) @@ -350,7 +450,6 @@ class NUCLEO_F103RB(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0700" - class NUCLEO_F302R8(Target): def __init__(self): Target.__init__(self) @@ -361,7 +460,6 @@ class NUCLEO_F302R8(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0705" - class NUCLEO_F334R8(Target): def __init__(self): Target.__init__(self) @@ -372,7 +470,6 @@ class NUCLEO_F334R8(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0735" - class NUCLEO_F401RE(Target): def __init__(self): Target.__init__(self) @@ -383,7 +480,6 @@ class NUCLEO_F401RE(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0720" - class NUCLEO_F411RE(Target): def __init__(self): Target.__init__(self) @@ -394,7 +490,6 @@ class NUCLEO_F411RE(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0740" - class NUCLEO_L053R8(Target): def __init__(self): Target.__init__(self) @@ -405,7 +500,6 @@ class NUCLEO_L053R8(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0715" - class NUCLEO_L152RE(Target): def __init__(self): Target.__init__(self) @@ -424,67 +518,43 @@ class STM32F3XX(Target): self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] self.default_toolchain = "uARM" - -class LPC1347(LPCTarget): +class STM32F407(Target): def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M3" - self.extra_labels = ['NXP', 'LPC13XX'] - self.supported_toolchains = ["ARM", "GCC_ARM","IAR"] + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['STM', 'STM32F4', 'STM32F4XX'] + self.supported_toolchains = ["ARM", "GCC_ARM", "IAR"] - -class LPC1114(LPCTarget): +class ARCH_MAX(Target): def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] - self.default_toolchain = "uARM" - - -class LPC11C24(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX'] + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG'] self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - -class LPC11U35_401(LPCTarget): +class DISCO_F051R8(Target): def __init__(self): - LPCTarget.__init__(self) + Target.__init__(self) self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11UXX'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] + self.extra_labels = ['STM', 'STM32F0', 'STM32F051', 'STM32F051R8'] + self.supported_toolchains = ["GCC_ARM"] self.default_toolchain = "uARM" - -class LPC11U35_501(LPCTarget): +class DISCO_F100RB(Target): def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11UXX', 'MCU_LPC11U35_501'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] - self.default_toolchain = "uARM" - - -class LPC11U37_501(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11UXX'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] - self.default_toolchain = "uARM" - - -class UBLOX_C027(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) + Target.__init__(self) self.core = "Cortex-M3" - self.extra_labels = ['NXP', 'LPC176X'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] - self.macros = ['TARGET_LPC1768'] - self.supported_form_factors = ["ARDUINO"] + self.extra_labels = ['STM', 'STM32F1', 'STM32F100RB'] + self.supported_toolchains = ["GCC_ARM"] + self.default_toolchain = "uARM" + +class DISCO_F303VC(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['STM', 'STM32F3', 'STM32F303', 'STM32F303VC'] + self.supported_toolchains = ["GCC_ARM"] + self.default_toolchain = "uARM" class DISCO_F334C8(Target): def __init__(self): @@ -495,7 +565,31 @@ class DISCO_F334C8(Target): self.default_toolchain = "GCC_ARM" self.detect_code = "0735" +class DISCO_F407VG(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] +class DISCO_F429ZI(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M4F" + self.extra_labels = ['STM', 'STM32F4', 'STM32F429', 'STM32F429ZI'] + self.supported_toolchains = ["GCC_ARM"] + self.default_toolchain = "GCC_ARM" + +class DISCO_L053C8(Target): + def __init__(self): + Target.__init__(self) + self.core = "Cortex-M0+" + self.extra_labels = ['STM', 'STM32L0', 'STM32L053C8'] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] + self.default_toolchain = "uARM" + + +### Nordic ### class NRF51822(Target): # the following is a list of possible Nordic softdevices in decreasing order @@ -557,7 +651,6 @@ class NRF51822(Target): with open(binf.replace(".bin", ".hex"), "w") as f: sdh.tofile(f, format='hex') - class NRF51822_OTA(Target): def __init__(self): Target.__init__(self) @@ -567,37 +660,6 @@ class NRF51822_OTA(Target): self.supported_toolchains = ["ARM", "GCC_ARM"] self.is_disk_virtual = True - -class ARCH_BLE(NRF51822): - def __init__(self): - NRF51822.__init__(self) - self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] - self.macros = ['TARGET_NRF51822'] - self.supported_form_factors = ["ARDUINO"] - - -class HRM1017(NRF51822): - def __init__(self): - NRF51822.__init__(self) - self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] - self.macros = ['TARGET_NRF51822'] - - -class RBLAB_NRF51822(NRF51822): - def __init__(self): - NRF51822.__init__(self) - self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] - self.macros = ['TARGET_NRF51822'] - self.supported_form_factors = ["ARDUINO"] - - -class RBLAB_BLENANO(NRF51822): - def __init__(self): - NRF51822.__init__(self) - self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] - self.macros = ['TARGET_NRF51822'] - - class NRF51_DK(NRF51822): def __init__(self): NRF51822.__init__(self) @@ -605,7 +667,6 @@ class NRF51_DK(NRF51822): self.macros = ['TARGET_NRF51822'] self.supported_form_factors = ["ARDUINO"] - class NRF51_DK_OTA(Target): def __init__(self): Target.__init__(self) @@ -615,7 +676,6 @@ class NRF51_DK_OTA(Target): self.supported_toolchains = ["ARM", "GCC_ARM"] self.is_disk_virtual = True - class NRF51_DONGLE(NRF51822): def __init__(self): NRF51822.__init__(self) @@ -623,69 +683,31 @@ class NRF51_DONGLE(NRF51822): self.macros = ['TARGET_NRF51822'] self.supported_form_factors = ["ARDUINO"] - -class LPC1549(LPCTarget): +class ARCH_BLE(NRF51822): def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M3" - self.extra_labels = ['NXP', 'LPC15XX'] - self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"] - self.default_toolchain = "uARM" + NRF51822.__init__(self) + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] + self.macros = ['TARGET_NRF51822'] self.supported_form_factors = ["ARDUINO"] - self.detect_code = "1549" - -class LPC11U68(LPCTarget): +class HRM1017(NRF51822): def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0+" - self.extra_labels = ['NXP', 'LPC11U6X'] - self.supported_toolchains = ["uARM", "GCC_CR", "GCC_ARM"] - self.default_toolchain = "uARM" + NRF51822.__init__(self) + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] + self.macros = ['TARGET_NRF51822'] + +class RBLAB_NRF51822(NRF51822): + def __init__(self): + NRF51822.__init__(self) + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] + self.macros = ['TARGET_NRF51822'] self.supported_form_factors = ["ARDUINO"] - self.detect_code = "1168" - -class DISCO_F100RB(Target): +class RBLAB_BLENANO(NRF51822): def __init__(self): - Target.__init__(self) - self.core = "Cortex-M3" - self.extra_labels = ['STM', 'STM32F1', 'STM32F100RB'] - self.supported_toolchains = ["GCC_ARM"] - self.default_toolchain = "uARM" - - -class DISCO_F051R8(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['STM', 'STM32F0', 'STM32F051', 'STM32F051R8'] - self.supported_toolchains = ["GCC_ARM"] - self.default_toolchain = "uARM" - - -class DISCO_F407VG(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - -class ARCH_MAX(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - -class DISCO_F303VC(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['STM', 'STM32F3', 'STM32F303', 'STM32F303VC'] - self.supported_toolchains = ["GCC_ARM"] - self.default_toolchain = "uARM" - + NRF51822.__init__(self) + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] + self.macros = ['TARGET_NRF51822'] class XADOW_M0(LPCTarget): def __init__(self): @@ -696,30 +718,7 @@ class XADOW_M0(LPCTarget): self.default_toolchain = "uARM" -class ARCH_PRO(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M3" - self.extra_labels = ['NXP', 'LPC176X'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] - self.macros = ['TARGET_LPC1768'] - self.supported_form_factors = ["ARDUINO"] - - -class ARCH_GPRS(LPCTarget): - def __init__(self): - LPCTarget.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U37_501'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"] - self.default_toolchain = "uARM" - self.supported_form_factors = ["ARDUINO"] - - -class LPCCAPPUCCINO(LPC11U37_501): - def __init__(self): - LPC11U37_501.__init__(self) - +### ARM ### class ARM_MPS2(Target): def __init__(self): @@ -730,63 +729,47 @@ class ARM_MPS2(Target): self.default_toolchain = "ARM" -class OC_MBUINO(LPC11U24): - def __init__(self): - LPC11U24.__init__(self) - self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11UXX'] - self.macros = ['TARGET_LPC11U24'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - self.default_toolchain = "uARM" - -class MTS_GAMBIT(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'MCU_K64F'] - self.supported_toolchains = ["ARM", "GCC_ARM"] - self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"] - self.is_disk_virtual = True - self.default_toolchain = "ARM" - -class DISCO_F429ZI(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M4F" - self.extra_labels = ['STM', 'STM32F4', 'STM32F429', 'STM32F429ZI'] - self.supported_toolchains = ["GCC_ARM"] - self.default_toolchain = "GCC_ARM" - -class DISCO_L053C8(Target): - def __init__(self): - Target.__init__(self) - self.core = "Cortex-M0+" - self.extra_labels = ['STM', 'STM32L0', 'STM32L053C8'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] - self.default_toolchain = "uARM" - # Get a single instance for each target TARGETS = [ - LPC2368(), - LPC1768(), + + ### NXP ### + LPC11C24(), LPC11U24(), + OC_MBUINO(), # LPC11U24 LPC11U24_301(), + LPC11U35_401(), + LPC11U35_501(), + LPC11U37_501(), + LPCCAPPUCCINO(),# LPC11U37_501 + ARCH_GPRS(), # LPC11U37_501 + LPC11U68(), + LPC1114(), + LPC1347(), + LPC1549(), + LPC1768(), + ARCH_PRO(), # LPC1768 + UBLOX_C027(), # LPC1768 + LPC2368(), + LPC810(), + LPC812(), + LPC824(), + SSCI824(), # LPC824 + LPC4088(), + LPC4330_M4(), + LPC4330_M0(), + LPC4337(), + + ### Freescale ### KL05Z(), KL25Z(), KL43Z(), KL46Z(), K20D50M(), - K64F(), K22F(), - LPC812(), - LPC810(), - LPC824(), - SSCI824(), - LPC4088(), - LPC4330_M4(), - LPC4337(), - STM32F3XX(), - STM32F407(), + K64F(), + MTS_GAMBIT(), # FRDM K64F + + ### STMicro ### NUCLEO_F030R8(), NUCLEO_F072RB(), NUCLEO_F091RC(), @@ -797,38 +780,31 @@ TARGETS = [ NUCLEO_F411RE(), NUCLEO_L053R8(), NUCLEO_L152RE(), - LPC1347(), - LPC1114(), - LPC11C24(), - LPC11U35_401(), - LPC11U35_501(), - NRF51822(), - NRF51822_OTA(), - NRF51_DONGLE(), - UBLOX_C027(), - LPC1549(), - LPC11U68(), + STM32F3XX(), + STM32F407(), DISCO_F051R8(), DISCO_F100RB(), DISCO_F303VC(), - DISCO_F407VG(), - XADOW_M0(), - ARCH_BLE(), - NRF51_DK(), - NRF51_DK_OTA(), - ARCH_PRO(), - ARCH_GPRS(), - LPCCAPPUCCINO(), - HRM1017(), - ARM_MPS2(), - RBLAB_NRF51822(), - RBLAB_BLENANO(), - OC_MBUINO(), - MTS_GAMBIT(), - ARCH_MAX(), + DISCO_F334C8(), + DISCO_F407VG(), # STM32F407 + ARCH_MAX(), # STM32F407 DISCO_F429ZI(), DISCO_L053C8(), - DISCO_F334C8(), + + ### Nordic ### + NRF51822(), + NRF51822_OTA(), # nRF51822 + NRF51_DK(), + NRF51_DK_OTA(), # nRF51822 + NRF51_DONGLE(), + ARCH_BLE(), # nRF51822 + HRM1017(), # nRF51822 + RBLAB_NRF51822(),# nRF51822 + RBLAB_BLENANO(),# nRF51822 + XADOW_M0(), # nRF51822 + + ### ARM ### + ARM_MPS2(), ] # Map each target name to its unique instance