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enable the power settings register prior to setting them

pull/14720/head
Jost, Chris 2021-06-01 16:40:15 +02:00
parent 0738aabb87
commit 3bfa124f80
1 changed files with 6 additions and 6 deletions
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12
targets/TARGET_STM/TARGET_STM32L5/system_clock.c
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@ -121,18 +121,18 @@ uint8_t SetSysClock_PLL_MSI(void)
{ {
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_OscInitTypeDef RCC_OscInitStruct = {0};
/* Configure the main internal regulator output voltage */
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) {
return 0; // FAIL
}
/* Configure LSE Drive Capability */ /* Configure LSE Drive Capability */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_SYSCFG_CLK_ENABLE();
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
__HAL_RCC_RTCAPB_CLK_ENABLE(); __HAL_RCC_RTCAPB_CLK_ENABLE();
/* Configure the main internal regulator output voltage */
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) {
return 0; // FAIL
}
#if MBED_CONF_TARGET_LSE_AVAILABLE #if MBED_CONF_TARGET_LSE_AVAILABLE
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;