mirror of https://github.com/ARMmbed/mbed-os.git
Fix bugs for RTL8195AM with debug profile of compilers
1. Add alignment / padding for postbuild segments 2. Clear tcm.bss section 3. Remove TRAP_OverrideTable(), move lines to PLAT_Start()pull/5083/head
parent
9fe3ada07d
commit
2f88a697de
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@ -56,8 +56,8 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) {
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LR_TCM 0x1FFF0000 0x10000 {
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LR_TCM 0x1FFF0000 0x10000 {
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TCM_OVERLAY 0x1FFF0000 0x10000 {
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TCM_OVERLAY 0x1FFF0000 0x10000 {
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lwip_mem.o(.bss*)
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*lwip_mem.o(.bss*)
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lwip_memp.o(.bss*)
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*lwip_memp.o(.bss*)
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*.o(.tcm.heap*)
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*.o(.tcm.heap*)
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}
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}
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}
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}
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@ -72,7 +72,6 @@ SECTIONS
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*libc.a: (.text* .rodata*)
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*libc.a: (.text* .rodata*)
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*Ticker.o (.text*)
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*Ticker.o (.text*)
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*Timeout.o (.text*)
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*Timeout.o (.text*)
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/* *rtx_timer.o (.text*)*/
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*TimerEvent.o (.text*)
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*TimerEvent.o (.text*)
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*mbed_ticker_api.o (.text*)
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*mbed_ticker_api.o (.text*)
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*mbed_critical.o (.text*)
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*mbed_critical.o (.text*)
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@ -208,6 +207,15 @@ SECTIONS
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__HeapLimit = .;
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__HeapLimit = .;
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} > SRAM1
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} > SRAM1
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.TCM_overlay :
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{
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__bss_dtcm_start__ = .;
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*lwip_mem.o (.bss*)
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*lwip_memp.o (.bss*)
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*(.tcm.heap*)
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__bss_dtcm_end__ = .;
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} > TCM
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/* .stack_dummy section doesn't contains any symbols. It is only
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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* values to stack symbols later */
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@ -30,12 +30,17 @@
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
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extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
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extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
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extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
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extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
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extern uint8_t Image$$TCM_OVERLAY$$ZI$$Base[];
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extern uint8_t Image$$TCM_OVERLAY$$ZI$$Limit[];
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extern uint8_t Image$$RW_DRAM2$$ZI$$Base[];
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extern uint8_t Image$$RW_DRAM2$$ZI$$Base[];
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extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[];
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extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[];
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#define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base
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#define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base
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#define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit
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#define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit
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#define __bss_dtcm_start__ Image$$TCM_OVERLAY$$ZI$$Base
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#define __bss_dtcm_end__ Image$$TCM_OVERLAY$$ZI$$Limit
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#define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
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#define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
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#define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit
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#define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit
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#define __stackp Image$$ARM_LIB_STACK$$ZI$$Limit
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#elif defined (__ICCARM__)
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#elif defined (__ICCARM__)
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@ -50,15 +55,20 @@ void __iar_data_init_app(void)
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__bss_start__ = (uint8_t *)__section_begin(".ram.bss");
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__bss_start__ = (uint8_t *)__section_begin(".ram.bss");
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__bss_end__ = (uint8_t *)__section_end(".ram.bss");
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__bss_end__ = (uint8_t *)__section_end(".ram.bss");
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}
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}
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#define __stackp CSTACK$$Limit
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#else
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#else
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extern uint32_t __StackTop;
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extern uint32_t __StackTop;
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extern uint32_t __StackLimit;
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extern uint8_t __bss_sram_start__[];
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extern uint8_t __bss_sram_start__[];
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extern uint8_t __bss_sram_end__[];
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extern uint8_t __bss_sram_end__[];
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extern uint8_t __bss_dtcm_start__[];
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extern uint8_t __bss_dtcm_end__[];
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extern uint8_t __bss_dram_start__[];
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extern uint8_t __bss_dram_start__[];
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extern uint8_t __bss_dram_end__[];
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extern uint8_t __bss_dram_end__[];
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#define __stackp __StackTop
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#endif
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#endif
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extern VECTOR_Func NewVectorTable[];
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extern VECTOR_Func NewVectorTable[];
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@ -161,20 +171,6 @@ void TRAP_HardFaultHandler_Patch(void)
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}
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}
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#endif
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#endif
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// Override original Interrupt Vector Table
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void TRAP_OverrideTable(uint32_t stackp)
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{
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// Set MSP
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__set_MSP(stackp);
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// Override NMI Handler
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NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
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#if defined ( __ICCARM__ )
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NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
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#endif
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}
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extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
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extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
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// Image2 Entry Function
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// Image2 Entry Function
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void PLAT_Start(void)
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void PLAT_Start(void)
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@ -190,18 +186,18 @@ void PLAT_Start(void)
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__rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
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__rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
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#else
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#else
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__rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
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__rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
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__rtl_memset_v1_00((void *)__bss_dtcm_start__, 0, __bss_dtcm_end__ - __bss_dtcm_start__);
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__rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
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__rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
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#endif
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#endif
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#if defined (__CC_ARM)
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// Set MSP
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TRAP_OverrideTable((uint32_t)&Image$$ARM_LIB_STACK$$ZI$$Limit);
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__set_MSP((uint32_t)&__stackp - 0x100);
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#elif defined (__ICCARM__)
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// Overwrite vector table
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TRAP_OverrideTable((uint32_t)&CSTACK$$Limit);
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NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
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#elif defined (__GNUC__)
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#if defined ( __ICCARM__ )
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TRAP_OverrideTable((uint32_t)&__StackTop);
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NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
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#else
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TRAP_OverrideTable(0x1FFFFFFC);
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#endif
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#endif
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extern HAL_TIMER_OP_EXT HalTimerOpExt;
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extern HAL_TIMER_OP_EXT HalTimerOpExt;
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__rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt));
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__rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt));
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__rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp));
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__rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp));
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@ -240,6 +240,10 @@ def write_load_segment(image_elf, image_bin, segment):
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write_fixed_width_value(size, 8, file_bin)
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write_fixed_width_value(size, 8, file_bin)
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# write load segment
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# write load segment
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file_bin.write(file_elf.read(size))
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file_bin.write(file_elf.read(size))
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delta = size % 4
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if delta != 0:
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padding = 4 - delta
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write_fixed_width_value(0x0, padding * 2, file_bin)
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file_bin.close()
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file_bin.close()
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file_elf.close()
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file_elf.close()
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