From 2f88a697de5d874f97e5fa8a080778d8b0ce59ef Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Mon, 28 Aug 2017 19:04:26 +0800 Subject: [PATCH] Fix bugs for RTL8195AM with debug profile of compilers 1. Add alignment / padding for postbuild segments 2. Clear tcm.bss section 3. Remove TRAP_OverrideTable(), move lines to PLAT_Start() --- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 4 +- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 12 +++++- .../TARGET_RTL8195A/device/rtl8195a_init.c | 40 +++++++++---------- tools/targets/REALTEK_RTL8195AM.py | 4 ++ 4 files changed, 34 insertions(+), 26 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index 045b8ccfe5..e76cc189fe 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -56,8 +56,8 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) { LR_TCM 0x1FFF0000 0x10000 { TCM_OVERLAY 0x1FFF0000 0x10000 { - lwip_mem.o(.bss*) - lwip_memp.o(.bss*) + *lwip_mem.o(.bss*) + *lwip_memp.o(.bss*) *.o(.tcm.heap*) } } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index 88043bd5d1..de7fb556de 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -72,7 +72,6 @@ SECTIONS *libc.a: (.text* .rodata*) *Ticker.o (.text*) *Timeout.o (.text*) - /* *rtx_timer.o (.text*)*/ *TimerEvent.o (.text*) *mbed_ticker_api.o (.text*) *mbed_critical.o (.text*) @@ -207,7 +206,16 @@ SECTIONS . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; __HeapLimit = .; } > SRAM1 - + + .TCM_overlay : + { + __bss_dtcm_start__ = .; + *lwip_mem.o (.bss*) + *lwip_memp.o (.bss*) + *(.tcm.heap*) + __bss_dtcm_end__ = .; + } > TCM + /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign * values to stack symbols later */ diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index 11c686b85b..9e1faafe2f 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -30,12 +30,17 @@ extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; extern uint8_t Image$$RW_IRAM2$$ZI$$Base[]; extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[]; +extern uint8_t Image$$TCM_OVERLAY$$ZI$$Base[]; +extern uint8_t Image$$TCM_OVERLAY$$ZI$$Limit[]; extern uint8_t Image$$RW_DRAM2$$ZI$$Base[]; extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[]; #define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base #define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit +#define __bss_dtcm_start__ Image$$TCM_OVERLAY$$ZI$$Base +#define __bss_dtcm_end__ Image$$TCM_OVERLAY$$ZI$$Limit #define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base #define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit +#define __stackp Image$$ARM_LIB_STACK$$ZI$$Limit #elif defined (__ICCARM__) @@ -50,15 +55,20 @@ void __iar_data_init_app(void) __bss_start__ = (uint8_t *)__section_begin(".ram.bss"); __bss_end__ = (uint8_t *)__section_end(".ram.bss"); } +#define __stackp CSTACK$$Limit #else extern uint32_t __StackTop; +extern uint32_t __StackLimit; extern uint8_t __bss_sram_start__[]; extern uint8_t __bss_sram_end__[]; +extern uint8_t __bss_dtcm_start__[]; +extern uint8_t __bss_dtcm_end__[]; extern uint8_t __bss_dram_start__[]; extern uint8_t __bss_dram_end__[]; +#define __stackp __StackTop #endif extern VECTOR_Func NewVectorTable[]; @@ -161,20 +171,6 @@ void TRAP_HardFaultHandler_Patch(void) } #endif -// Override original Interrupt Vector Table -void TRAP_OverrideTable(uint32_t stackp) -{ - // Set MSP - __set_MSP(stackp); - - // Override NMI Handler - NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; - - #if defined ( __ICCARM__ ) - NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch; - #endif -} - extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n); // Image2 Entry Function void PLAT_Start(void) @@ -190,18 +186,18 @@ void PLAT_Start(void) __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__); #else __rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__); + __rtl_memset_v1_00((void *)__bss_dtcm_start__, 0, __bss_dtcm_end__ - __bss_dtcm_start__); __rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__); #endif -#if defined (__CC_ARM) - TRAP_OverrideTable((uint32_t)&Image$$ARM_LIB_STACK$$ZI$$Limit); -#elif defined (__ICCARM__) - TRAP_OverrideTable((uint32_t)&CSTACK$$Limit); -#elif defined (__GNUC__) - TRAP_OverrideTable((uint32_t)&__StackTop); -#else - TRAP_OverrideTable(0x1FFFFFFC); + // Set MSP + __set_MSP((uint32_t)&__stackp - 0x100); + // Overwrite vector table + NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; +#if defined ( __ICCARM__ ) + NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch; #endif + extern HAL_TIMER_OP_EXT HalTimerOpExt; __rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt)); __rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp)); diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index dff50327ae..86eda42934 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -240,6 +240,10 @@ def write_load_segment(image_elf, image_bin, segment): write_fixed_width_value(size, 8, file_bin) # write load segment file_bin.write(file_elf.read(size)) + delta = size % 4 + if delta != 0: + padding = 4 - delta + write_fixed_width_value(0x0, padding * 2, file_bin) file_bin.close() file_elf.close()