mirror of https://github.com/ARMmbed/mbed-os.git
[NUCLEO_L031K6] Add CMSIS target
svastm
parent
bad536c44b
commit
28e7579b05
|
|
@ -0,0 +1,224 @@
|
||||||
|
;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
||||||
|
;* File Name : startup_stm32l053xx.s
|
||||||
|
;* Author : MCD Application Team
|
||||||
|
;* Version : V1.5.0
|
||||||
|
;* Date : 8-January-2016
|
||||||
|
;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
|
||||||
|
;* This module performs:
|
||||||
|
;* - Set the initial SP
|
||||||
|
;* - Set the initial PC == Reset_Handler
|
||||||
|
;* - Set the vector table entries with the exceptions ISR address
|
||||||
|
;* - Branches to __main in the C library (which eventually
|
||||||
|
;* calls main()).
|
||||||
|
;* After Reset the Cortex-M0+ processor is in Thread mode,
|
||||||
|
;* priority is Privileged, and the Stack is set to Main.
|
||||||
|
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||||
|
;*******************************************************************************
|
||||||
|
;*
|
||||||
|
;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;*
|
||||||
|
;*******************************************************************************
|
||||||
|
;
|
||||||
|
; Amount of memory (in bytes) allocated for Stack
|
||||||
|
; Tailor this value to your application needs
|
||||||
|
; <h> Stack Configuration
|
||||||
|
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Stack_Size EQU 0x00000400
|
||||||
|
|
||||||
|
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||||
|
EXPORT __initial_sp
|
||||||
|
|
||||||
|
Stack_Mem SPACE Stack_Size
|
||||||
|
__initial_sp EQU 0x20002000 ; Top of RAM
|
||||||
|
|
||||||
|
|
||||||
|
; <h> Heap Configuration
|
||||||
|
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Heap_Size EQU 0x00000400
|
||||||
|
|
||||||
|
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||||
|
EXPORT __heap_base
|
||||||
|
EXPORT __heap_limit
|
||||||
|
|
||||||
|
__heap_base
|
||||||
|
Heap_Mem SPACE Heap_Size
|
||||||
|
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
EXPORT __Vectors_End
|
||||||
|
EXPORT __Vectors_Size
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window Watchdog
|
||||||
|
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||||
|
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||||
|
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||||
|
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||||
|
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
|
||||||
|
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1
|
||||||
|
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM21_IRQHandler ; TIM21
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM22_IRQHandler ; TIM22
|
||||||
|
DCD I2C1_IRQHandler ; I2C1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD USART2_IRQHandler ; USART2
|
||||||
|
DCD LPUART1_IRQHandler ; LPUART1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
|
||||||
|
__Vectors_End
|
||||||
|
|
||||||
|
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
; Reset handler routine
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT __main
|
||||||
|
IMPORT SystemInit
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
PendSV_Handler PROC
|
||||||
|
EXPORT PendSV_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SysTick_Handler PROC
|
||||||
|
EXPORT SysTick_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT WWDG_IRQHandler [WEAK]
|
||||||
|
EXPORT PVD_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_IRQHandler [WEAK]
|
||||||
|
EXPORT FLASH_IRQHandler [WEAK]
|
||||||
|
EXPORT RCC_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC1_COMP_IRQHandler [WEAK]
|
||||||
|
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM2_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM21_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM22_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI1_IRQHandler [WEAK]
|
||||||
|
EXPORT USART2_IRQHandler [WEAK]
|
||||||
|
EXPORT LPUART1_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
WWDG_IRQHandler
|
||||||
|
PVD_IRQHandler
|
||||||
|
RTC_IRQHandler
|
||||||
|
FLASH_IRQHandler
|
||||||
|
RCC_IRQHandler
|
||||||
|
EXTI0_1_IRQHandler
|
||||||
|
EXTI2_3_IRQHandler
|
||||||
|
EXTI4_15_IRQHandler
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
DMA1_Channel2_3_IRQHandler
|
||||||
|
DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
ADC1_COMP_IRQHandler
|
||||||
|
LPTIM1_IRQHandler
|
||||||
|
TIM2_IRQHandler
|
||||||
|
TIM21_IRQHandler
|
||||||
|
TIM22_IRQHandler
|
||||||
|
I2C1_IRQHandler
|
||||||
|
SPI1_IRQHandler
|
||||||
|
USART2_IRQHandler
|
||||||
|
LPUART1_IRQHandler
|
||||||
|
|
||||||
|
B .
|
||||||
|
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
END
|
||||||
|
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
|
|
@ -0,0 +1,44 @@
|
||||||
|
; Scatter-Loading Description File
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; Copyright (c) 2016, STMicroelectronics
|
||||||
|
; All rights reserved.
|
||||||
|
;
|
||||||
|
; Redistribution and use in source and binary forms, with or without
|
||||||
|
; modification, are permitted provided that the following conditions are met:
|
||||||
|
;
|
||||||
|
; 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer.
|
||||||
|
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer in the documentation
|
||||||
|
; and/or other materials provided with the distribution.
|
||||||
|
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
; may be used to endorse or promote products derived from this software
|
||||||
|
; without specific prior written permission.
|
||||||
|
;
|
||||||
|
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
; STM32L031K6: 32KB FLASH (0x8000) + 8KB RAM (0x2000)
|
||||||
|
LR_IROM1 0x08000000 0x8000 { ; load region size_region
|
||||||
|
|
||||||
|
ER_IROM1 0x08000000 0x8000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
|
||||||
|
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||||
|
RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,56 @@
|
||||||
|
/* mbed Microcontroller Library - stackheap
|
||||||
|
* Setup a fixed single stack/heap memory model,
|
||||||
|
* between the top of the RW/ZI region and the stackpointer
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <rt_misc.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||||
|
|
||||||
|
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||||
|
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
|
uint32_t sp_limit = __current_sp();
|
||||||
|
|
||||||
|
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||||
|
|
||||||
|
struct __initial_stackheap r;
|
||||||
|
r.heap_base = zi_limit;
|
||||||
|
r.heap_limit = sp_limit;
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,203 @@
|
||||||
|
;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
||||||
|
;* File Name : startup_stm32l053xx.s
|
||||||
|
;* Author : MCD Application Team
|
||||||
|
;* Version : V1.5.0
|
||||||
|
;* Date : 8-January-2016
|
||||||
|
;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
|
||||||
|
;* This module performs:
|
||||||
|
;* - Set the initial SP
|
||||||
|
;* - Set the initial PC == Reset_Handler
|
||||||
|
;* - Set the vector table entries with the exceptions ISR address
|
||||||
|
;* - Branches to __main in the C library (which eventually
|
||||||
|
;* calls main()).
|
||||||
|
;* After Reset the Cortex-M0+ processor is in Thread mode,
|
||||||
|
;* priority is Privileged, and the Stack is set to Main.
|
||||||
|
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||||
|
;*******************************************************************************
|
||||||
|
;*
|
||||||
|
;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;*
|
||||||
|
;*******************************************************************************
|
||||||
|
;
|
||||||
|
; Amount of memory (in bytes) allocated for Stack
|
||||||
|
; Tailor this value to your application needs
|
||||||
|
; <h> Stack Configuration
|
||||||
|
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
__initial_sp EQU 0x20002000 ; Top of RAM
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
EXPORT __Vectors_End
|
||||||
|
EXPORT __Vectors_Size
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window Watchdog
|
||||||
|
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||||
|
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||||
|
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||||
|
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||||
|
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
|
||||||
|
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1
|
||||||
|
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM21_IRQHandler ; TIM21
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM22_IRQHandler ; TIM22
|
||||||
|
DCD I2C1_IRQHandler ; I2C1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD USART2_IRQHandler ; USART2
|
||||||
|
DCD LPUART1_IRQHandler ; LPUART1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
|
||||||
|
__Vectors_End
|
||||||
|
|
||||||
|
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
; Reset handler routine
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT __main
|
||||||
|
IMPORT SystemInit
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
PendSV_Handler PROC
|
||||||
|
EXPORT PendSV_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SysTick_Handler PROC
|
||||||
|
EXPORT SysTick_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT WWDG_IRQHandler [WEAK]
|
||||||
|
EXPORT PVD_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_IRQHandler [WEAK]
|
||||||
|
EXPORT FLASH_IRQHandler [WEAK]
|
||||||
|
EXPORT RCC_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC1_COMP_IRQHandler [WEAK]
|
||||||
|
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM2_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM21_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM22_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI1_IRQHandler [WEAK]
|
||||||
|
EXPORT USART2_IRQHandler [WEAK]
|
||||||
|
EXPORT LPUART1_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
WWDG_IRQHandler
|
||||||
|
PVD_IRQHandler
|
||||||
|
RTC_IRQHandler
|
||||||
|
FLASH_IRQHandler
|
||||||
|
RCC_IRQHandler
|
||||||
|
EXTI0_1_IRQHandler
|
||||||
|
EXTI2_3_IRQHandler
|
||||||
|
EXTI4_15_IRQHandler
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
DMA1_Channel2_3_IRQHandler
|
||||||
|
DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
ADC1_COMP_IRQHandler
|
||||||
|
LPTIM1_IRQHandler
|
||||||
|
TIM2_IRQHandler
|
||||||
|
TIM21_IRQHandler
|
||||||
|
TIM22_IRQHandler
|
||||||
|
I2C1_IRQHandler
|
||||||
|
SPI1_IRQHandler
|
||||||
|
USART2_IRQHandler
|
||||||
|
LPUART1_IRQHandler
|
||||||
|
|
||||||
|
B .
|
||||||
|
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
END
|
||||||
|
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
|
|
@ -0,0 +1,44 @@
|
||||||
|
; Scatter-Loading Description File
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; Copyright (c) 2016, STMicroelectronics
|
||||||
|
; All rights reserved.
|
||||||
|
;
|
||||||
|
; Redistribution and use in source and binary forms, with or without
|
||||||
|
; modification, are permitted provided that the following conditions are met:
|
||||||
|
;
|
||||||
|
; 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer.
|
||||||
|
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
; this list of conditions and the following disclaimer in the documentation
|
||||||
|
; and/or other materials provided with the distribution.
|
||||||
|
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
; may be used to endorse or promote products derived from this software
|
||||||
|
; without specific prior written permission.
|
||||||
|
;
|
||||||
|
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
; STM32L031K6: 32KB FLASH (0x8000) + 8KB RAM (0x2000)
|
||||||
|
LR_IROM1 0x08000000 0x8000 { ; load region size_region
|
||||||
|
|
||||||
|
ER_IROM1 0x08000000 0x8000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
|
||||||
|
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||||
|
RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,56 @@
|
||||||
|
/* mbed Microcontroller Library - stackheap
|
||||||
|
* Setup a fixed single stack/heap memory model,
|
||||||
|
* between the top of the RW/ZI region and the stackpointer
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <rt_misc.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||||
|
|
||||||
|
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||||
|
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
|
uint32_t sp_limit = __current_sp();
|
||||||
|
|
||||||
|
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||||
|
|
||||||
|
struct __initial_stackheap r;
|
||||||
|
r.heap_base = zi_limit;
|
||||||
|
r.heap_limit = sp_limit;
|
||||||
|
return r;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,153 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32k
|
||||||
|
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 8K - 0xC0
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
|
* It references following symbols, which must be defined in code:
|
||||||
|
* Reset_Handler : Entry of reset handler
|
||||||
|
*
|
||||||
|
* It defines following symbols, which code can use without definition:
|
||||||
|
* __exidx_start
|
||||||
|
* __exidx_end
|
||||||
|
* __etext
|
||||||
|
* __data_start__
|
||||||
|
* __preinit_array_start
|
||||||
|
* __preinit_array_end
|
||||||
|
* __init_array_start
|
||||||
|
* __init_array_end
|
||||||
|
* __fini_array_start
|
||||||
|
* __fini_array_end
|
||||||
|
* __data_end__
|
||||||
|
* __bss_start__
|
||||||
|
* __bss_end__
|
||||||
|
* __end__
|
||||||
|
* end
|
||||||
|
* __HeapLimit
|
||||||
|
* __StackLimit
|
||||||
|
* __StackTop
|
||||||
|
* __stack
|
||||||
|
* _estack
|
||||||
|
*/
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
KEEP(*(.isr_vector))
|
||||||
|
*(.text*)
|
||||||
|
KEEP(*(.init))
|
||||||
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
/* .ctors */
|
||||||
|
*crtbegin.o(.ctors)
|
||||||
|
*crtbegin?.o(.ctors)
|
||||||
|
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||||
|
*(SORT(.ctors.*))
|
||||||
|
*(.ctors)
|
||||||
|
|
||||||
|
/* .dtors */
|
||||||
|
*crtbegin.o(.dtors)
|
||||||
|
*crtbegin?.o(.dtors)
|
||||||
|
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||||
|
*(SORT(.dtors.*))
|
||||||
|
*(.dtors)
|
||||||
|
|
||||||
|
*(.rodata*)
|
||||||
|
|
||||||
|
KEEP(*(.eh_frame*))
|
||||||
|
} > FLASH
|
||||||
|
|
||||||
|
.ARM.extab :
|
||||||
|
{
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
} > FLASH
|
||||||
|
|
||||||
|
__exidx_start = .;
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
} > FLASH
|
||||||
|
__exidx_end = .;
|
||||||
|
|
||||||
|
__etext = .;
|
||||||
|
_sidata = .;
|
||||||
|
|
||||||
|
.data : AT (__etext)
|
||||||
|
{
|
||||||
|
__data_start__ = .;
|
||||||
|
_sdata = .;
|
||||||
|
*(vtable)
|
||||||
|
*(.data*)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* preinit data */
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||||
|
KEEP(*(.preinit_array))
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* init data */
|
||||||
|
PROVIDE_HIDDEN (__init_array_start = .);
|
||||||
|
KEEP(*(SORT(.init_array.*)))
|
||||||
|
KEEP(*(.init_array))
|
||||||
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* finit data */
|
||||||
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
KEEP(*(SORT(.fini_array.*)))
|
||||||
|
KEEP(*(.fini_array))
|
||||||
|
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||||
|
|
||||||
|
KEEP(*(.jcr*))
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* All data end */
|
||||||
|
__data_end__ = .;
|
||||||
|
_edata = .;
|
||||||
|
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__bss_start__ = .;
|
||||||
|
_sbss = .;
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN(4);
|
||||||
|
__bss_end__ = .;
|
||||||
|
_ebss = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
.heap (COPY):
|
||||||
|
{
|
||||||
|
__end__ = .;
|
||||||
|
end = __end__;
|
||||||
|
*(.heap*)
|
||||||
|
__HeapLimit = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||||
|
* used for linker to calculate size of stack sections, and assign
|
||||||
|
* values to stack symbols later */
|
||||||
|
.stack_dummy (COPY):
|
||||||
|
{
|
||||||
|
*(.stack*)
|
||||||
|
} > RAM
|
||||||
|
|
||||||
|
/* Set stack top to end of RAM, and stack limit move down by
|
||||||
|
* size of stack_dummy section */
|
||||||
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
_estack = __StackTop;
|
||||||
|
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||||
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,276 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file startup_stm32l031xx.s
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.5.0
|
||||||
|
* @date 8-January-2016
|
||||||
|
* @brief STM32L031xx Devices vector table for Atollic TrueSTUDIO toolchain.
|
||||||
|
* This module performs:
|
||||||
|
* - Set the initial SP
|
||||||
|
* - Set the initial PC == Reset_Handler,
|
||||||
|
* - Set the vector table entries with the exceptions ISR address
|
||||||
|
* - Branches to main in the C library (which eventually
|
||||||
|
* calls main()).
|
||||||
|
* After Reset the Cortex-M0+ processor is in Thread mode,
|
||||||
|
* priority is Privileged, and the Stack is set to Main.
|
||||||
|
******************************************************************************
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.cpu cortex-m0plus
|
||||||
|
.fpu softvfp
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.global g_pfnVectors
|
||||||
|
.global Default_Handler
|
||||||
|
|
||||||
|
/* start address for the initialization values of the .data section.
|
||||||
|
defined in linker script */
|
||||||
|
.word _sidata
|
||||||
|
/* start address for the .data section. defined in linker script */
|
||||||
|
.word _sdata
|
||||||
|
/* end address for the .data section. defined in linker script */
|
||||||
|
.word _edata
|
||||||
|
/* start address for the .bss section. defined in linker script */
|
||||||
|
.word _sbss
|
||||||
|
/* end address for the .bss section. defined in linker script */
|
||||||
|
.word _ebss
|
||||||
|
|
||||||
|
.section .text.Reset_Handler
|
||||||
|
.weak Reset_Handler
|
||||||
|
.type Reset_Handler, %function
|
||||||
|
Reset_Handler:
|
||||||
|
ldr r0, =_estack
|
||||||
|
mov sp, r0 /* set stack pointer */
|
||||||
|
|
||||||
|
/* Copy the data segment initializers from flash to SRAM */
|
||||||
|
movs r1, #0
|
||||||
|
b LoopCopyDataInit
|
||||||
|
|
||||||
|
CopyDataInit:
|
||||||
|
ldr r3, =_sidata
|
||||||
|
ldr r3, [r3, r1]
|
||||||
|
str r3, [r0, r1]
|
||||||
|
adds r1, r1, #4
|
||||||
|
|
||||||
|
LoopCopyDataInit:
|
||||||
|
ldr r0, =_sdata
|
||||||
|
ldr r3, =_edata
|
||||||
|
adds r2, r0, r1
|
||||||
|
cmp r2, r3
|
||||||
|
bcc CopyDataInit
|
||||||
|
ldr r2, =_sbss
|
||||||
|
b LoopFillZerobss
|
||||||
|
/* Zero fill the bss segment. */
|
||||||
|
FillZerobss:
|
||||||
|
movs r3, #0
|
||||||
|
str r3, [r2]
|
||||||
|
adds r2, r2, #4
|
||||||
|
|
||||||
|
|
||||||
|
LoopFillZerobss:
|
||||||
|
ldr r3, = _ebss
|
||||||
|
cmp r2, r3
|
||||||
|
bcc FillZerobss
|
||||||
|
|
||||||
|
/* Call the clock system intitialization function.*/
|
||||||
|
bl SystemInit
|
||||||
|
/* Call static constructors */
|
||||||
|
//bl __libc_init_array
|
||||||
|
/* Call the application's entry point.*/
|
||||||
|
//bl main
|
||||||
|
bl _start
|
||||||
|
|
||||||
|
LoopForever:
|
||||||
|
b LoopForever
|
||||||
|
|
||||||
|
|
||||||
|
.size Reset_Handler, .-Reset_Handler
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor receives an
|
||||||
|
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||||
|
* the system state for examination by a debugger.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
.section .text.Default_Handler,"ax",%progbits
|
||||||
|
Default_Handler:
|
||||||
|
Infinite_Loop:
|
||||||
|
b Infinite_Loop
|
||||||
|
.size Default_Handler, .-Default_Handler
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||||
|
* must be placed on this to ensure that it ends up at physical address
|
||||||
|
* 0x0000.0000.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
.section .isr_vector,"a",%progbits
|
||||||
|
.type g_pfnVectors, %object
|
||||||
|
.size g_pfnVectors, .-g_pfnVectors
|
||||||
|
|
||||||
|
|
||||||
|
g_pfnVectors:
|
||||||
|
.word _estack
|
||||||
|
.word Reset_Handler
|
||||||
|
.word NMI_Handler
|
||||||
|
.word HardFault_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SVC_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word PendSV_Handler
|
||||||
|
.word SysTick_Handler
|
||||||
|
.word WWDG_IRQHandler /* Window WatchDog */
|
||||||
|
.word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||||
|
.word RTC_IRQHandler /* RTC through the EXTI line */
|
||||||
|
.word FLASH_IRQHandler /* FLASH */
|
||||||
|
.word RCC_IRQHandler /* RCC */
|
||||||
|
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
||||||
|
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
||||||
|
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||||
|
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
||||||
|
.word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
|
||||||
|
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
|
||||||
|
.word LPTIM1_IRQHandler /* LPTIM1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word TIM2_IRQHandler /* TIM2 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word TIM21_IRQHandler /* TIM21 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word TIM22_IRQHandler /* TIM22 */
|
||||||
|
.word I2C1_IRQHandler /* I2C1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word SPI1_IRQHandler /* SPI1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word USART2_IRQHandler /* USART2 */
|
||||||
|
.word LPUART1_IRQHandler /* LPUART1 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
*
|
||||||
|
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
.weak NMI_Handler
|
||||||
|
.thumb_set NMI_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak HardFault_Handler
|
||||||
|
.thumb_set HardFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SVC_Handler
|
||||||
|
.thumb_set SVC_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak PendSV_Handler
|
||||||
|
.thumb_set PendSV_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SysTick_Handler
|
||||||
|
.thumb_set SysTick_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak WWDG_IRQHandler
|
||||||
|
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak PVD_IRQHandler
|
||||||
|
.thumb_set PVD_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_IRQHandler
|
||||||
|
.thumb_set RTC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FLASH_IRQHandler
|
||||||
|
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RCC_IRQHandler
|
||||||
|
.thumb_set RCC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI0_1_IRQHandler
|
||||||
|
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI2_3_IRQHandler
|
||||||
|
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI4_15_IRQHandler
|
||||||
|
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel1_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel2_3_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak ADC1_COMP_IRQHandler
|
||||||
|
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak LPTIM1_IRQHandler
|
||||||
|
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM2_IRQHandler
|
||||||
|
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM21_IRQHandler
|
||||||
|
.thumb_set TIM21_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM22_IRQHandler
|
||||||
|
.thumb_set TIM22_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_IRQHandler
|
||||||
|
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI1_IRQHandler
|
||||||
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART2_IRQHandler
|
||||||
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak LPUART1_IRQHandler
|
||||||
|
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
@ -0,0 +1,286 @@
|
||||||
|
;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
||||||
|
;* File Name : startup_stm32l031xx.s
|
||||||
|
;* Author : MCD Application Team
|
||||||
|
;* Version : V1.5.0
|
||||||
|
;* Date : 8-January-2016
|
||||||
|
;* Description : STM32L031xx Ultra Low Power Devices vector
|
||||||
|
;* This module performs:
|
||||||
|
;* - Set the initial SP
|
||||||
|
;* - Set the initial PC == _iar_program_start,
|
||||||
|
;* - Set the vector table entries with the exceptions ISR
|
||||||
|
;* address.
|
||||||
|
;* - Configure the system clock
|
||||||
|
;* - Branches to main in the C library (which eventually
|
||||||
|
;* calls main()).
|
||||||
|
;* After Reset the Cortex-M0+ processor is in Thread mode,
|
||||||
|
;* priority is Privileged, and the Stack is set to Main.
|
||||||
|
;********************************************************************************
|
||||||
|
;*
|
||||||
|
;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;*
|
||||||
|
;*******************************************************************************/
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; The modules in this file are included in the libraries, and may be replaced
|
||||||
|
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||||
|
; a user defined start symbol.
|
||||||
|
; To override the cstartup defined in the library, simply add your modified
|
||||||
|
; version to the workbench project.
|
||||||
|
;
|
||||||
|
; The vector table is normally located at address 0.
|
||||||
|
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||||
|
; The name "__vector_table" has special meaning for C-SPY:
|
||||||
|
; it is where the SP start value is found, and the NVIC vector
|
||||||
|
; table register (VTOR) is initialized to this address if != 0.
|
||||||
|
;
|
||||||
|
; Cortex-M version
|
||||||
|
;
|
||||||
|
|
||||||
|
MODULE ?cstartup
|
||||||
|
|
||||||
|
;; Forward declaration of sections.
|
||||||
|
SECTION CSTACK:DATA:NOROOT(3)
|
||||||
|
|
||||||
|
SECTION .intvec:CODE:NOROOT(2)
|
||||||
|
|
||||||
|
EXTERN __iar_program_start
|
||||||
|
EXTERN SystemInit
|
||||||
|
PUBLIC __vector_table
|
||||||
|
|
||||||
|
DATA
|
||||||
|
__vector_table
|
||||||
|
DCD sfe(CSTACK)
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window Watchdog
|
||||||
|
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||||
|
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||||
|
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||||
|
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||||
|
DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
|
||||||
|
DCD ADC1_COMP_IRQHandler ; ADC1, COMP1
|
||||||
|
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM21_IRQHandler ; TIM21
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM22_IRQHandler ; TIM22
|
||||||
|
DCD I2C1_IRQHandler ; I2C1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD USART2_IRQHandler ; USART2
|
||||||
|
DCD LPUART1_IRQHandler ; LPUART1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
;;
|
||||||
|
;; Default interrupt handlers.
|
||||||
|
;;
|
||||||
|
THUMB
|
||||||
|
PUBWEAK Reset_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||||
|
Reset_Handler
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__iar_program_start
|
||||||
|
BX R0
|
||||||
|
|
||||||
|
PUBWEAK NMI_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
NMI_Handler
|
||||||
|
B NMI_Handler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK HardFault_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
HardFault_Handler
|
||||||
|
B HardFault_Handler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK SVC_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SVC_Handler
|
||||||
|
B SVC_Handler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK PendSV_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
PendSV_Handler
|
||||||
|
B PendSV_Handler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK SysTick_Handler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SysTick_Handler
|
||||||
|
B SysTick_Handler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK WWDG_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
WWDG_IRQHandler
|
||||||
|
B WWDG_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK PVD_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
PVD_IRQHandler
|
||||||
|
B PVD_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK RTC_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
RTC_IRQHandler
|
||||||
|
B RTC_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK FLASH_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
FLASH_IRQHandler
|
||||||
|
B FLASH_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK RCC_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
RCC_IRQHandler
|
||||||
|
B RCC_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK EXTI0_1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI0_1_IRQHandler
|
||||||
|
B EXTI0_1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK EXTI2_3_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI2_3_IRQHandler
|
||||||
|
B EXTI2_3_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK EXTI4_15_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
EXTI4_15_IRQHandler
|
||||||
|
B EXTI4_15_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
B DMA1_Channel1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel2_3_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel2_3_IRQHandler
|
||||||
|
B DMA1_Channel2_3_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
B DMA1_Channel4_5_6_7_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK ADC1_COMP_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
ADC1_COMP_IRQHandler
|
||||||
|
B ADC1_COMP_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK LPTIM1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
LPTIM1_IRQHandler
|
||||||
|
B LPTIM1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK TIM2_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM2_IRQHandler
|
||||||
|
B TIM2_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK TIM21_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM21_IRQHandler
|
||||||
|
B TIM21_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM22_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
TIM22_IRQHandler
|
||||||
|
B TIM22_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK I2C1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
I2C1_IRQHandler
|
||||||
|
B I2C1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK SPI1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
SPI1_IRQHandler
|
||||||
|
B SPI1_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK USART2_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
USART2_IRQHandler
|
||||||
|
B USART2_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
PUBWEAK LPUART1_IRQHandler
|
||||||
|
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||||
|
LPUART1_IRQHandler
|
||||||
|
B LPUART1_IRQHandler
|
||||||
|
|
||||||
|
END
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
|
|
@ -0,0 +1,30 @@
|
||||||
|
/* [ROM = 32kb = 0x8000] */
|
||||||
|
define symbol __intvec_start__ = 0x08000000;
|
||||||
|
define symbol __region_ROM_start__ = 0x08000000;
|
||||||
|
define symbol __region_ROM_end__ = 0x08007FFF;
|
||||||
|
|
||||||
|
/* [RAM = 8kb = 0x2000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */
|
||||||
|
define symbol __NVIC_start__ = 0x20000000;
|
||||||
|
define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */
|
||||||
|
define symbol __region_RAM_start__ = 0x200000C0;
|
||||||
|
define symbol __region_RAM_end__ = 0x20001FFF;
|
||||||
|
|
||||||
|
/* Memory regions */
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
||||||
|
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
||||||
|
|
||||||
|
/* Stack and Heap */
|
||||||
|
define symbol __size_cstack__ = 0x500;
|
||||||
|
define symbol __size_heap__ = 0x1000;
|
||||||
|
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||||
|
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||||
|
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
||||||
|
|
||||||
|
initialize by copy with packing = zeros { readwrite };
|
||||||
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
|
place at address mem:__intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
|
place in ROM_region { readonly };
|
||||||
|
place in RAM_region { readwrite, block STACKHEAP };
|
||||||
|
|
@ -0,0 +1,38 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* A generic CMSIS include header
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_H
|
||||||
|
#define MBED_CMSIS_H
|
||||||
|
|
||||||
|
#include "stm32l0xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
||||||
|
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||||
|
uint32_t *vectors = (uint32_t *)SCB->VTOR;
|
||||||
|
uint32_t i;
|
||||||
|
|
||||||
|
// Copy and switch to dynamic vectors if the first time called
|
||||||
|
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
|
||||||
|
uint32_t *old_vectors = vectors;
|
||||||
|
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
for (i=0; i<NVIC_NUM_VECTORS; i++) {
|
||||||
|
vectors[i] = old_vectors[i];
|
||||||
|
}
|
||||||
|
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
}
|
||||||
|
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||||
|
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||||
|
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,54 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
|
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
||||||
|
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF
|
||||||
|
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||||
|
#define NVIC_NUM_VECTORS 48
|
||||||
|
#define NVIC_USER_IRQ_OFFSET 16
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,145 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "hal_tick.h"
|
||||||
|
|
||||||
|
TIM_HandleTypeDef TimMasterHandle;
|
||||||
|
uint32_t PreviousVal = 0;
|
||||||
|
|
||||||
|
void us_ticker_irq_handler(void);
|
||||||
|
void set_compare(uint16_t count);
|
||||||
|
|
||||||
|
extern volatile uint32_t SlaveCounter;
|
||||||
|
extern volatile uint32_t oc_int_part;
|
||||||
|
extern volatile uint16_t oc_rem_part;
|
||||||
|
|
||||||
|
void timer_irq_handler(void) {
|
||||||
|
uint16_t cval = TIM_MST->CNT;
|
||||||
|
|
||||||
|
TimMasterHandle.Instance = TIM_MST;
|
||||||
|
|
||||||
|
// Clear Update interrupt flag
|
||||||
|
if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_UPDATE);
|
||||||
|
SlaveCounter++;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Channel 1 for mbed timeout
|
||||||
|
if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC1) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC1);
|
||||||
|
if (oc_rem_part > 0) {
|
||||||
|
set_compare(oc_rem_part); // Finish the remaining time left
|
||||||
|
oc_rem_part = 0;
|
||||||
|
} else {
|
||||||
|
if (oc_int_part > 0) {
|
||||||
|
set_compare(0xFFFF);
|
||||||
|
oc_rem_part = cval; // To finish the counter loop the next time
|
||||||
|
oc_int_part--;
|
||||||
|
} else {
|
||||||
|
us_ticker_irq_handler();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Channel 2 for HAL tick
|
||||||
|
if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC2) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_FLAG(&TimMasterHandle, TIM_FLAG_CC2);
|
||||||
|
uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
if ((val - PreviousVal) >= HAL_TICK_DELAY) {
|
||||||
|
// Increment HAL variable
|
||||||
|
HAL_IncTick();
|
||||||
|
// Prepare next interrupt
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
|
||||||
|
PreviousVal = val;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Reconfigure the HAL tick using a standard timer instead of systick.
|
||||||
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
|
||||||
|
// Enable timer clock
|
||||||
|
TIM_MST_RCC;
|
||||||
|
|
||||||
|
// Reset timer
|
||||||
|
TIM_MST_RESET_ON;
|
||||||
|
TIM_MST_RESET_OFF;
|
||||||
|
|
||||||
|
// Update the SystemCoreClock variable
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
|
||||||
|
// Configure time base
|
||||||
|
TimMasterHandle.Instance = TIM_MST;
|
||||||
|
TimMasterHandle.Init.Period = 0xFFFFFFFF;
|
||||||
|
TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 us tick
|
||||||
|
TimMasterHandle.Init.ClockDivision = 0;
|
||||||
|
TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
HAL_TIM_Base_Init(&TimMasterHandle);
|
||||||
|
|
||||||
|
// Configure output compare channel 1 for mbed timeout (enabled later when used)
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
|
||||||
|
|
||||||
|
// Configure output compare channel 2 for HAL tick
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
|
||||||
|
PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
|
||||||
|
|
||||||
|
// Configure interrupts
|
||||||
|
// Update interrupt used for 32-bit counter
|
||||||
|
// Output compare channel 1 interrupt for mbed timeout
|
||||||
|
// Output compare channel 2 interrupt for HAL tick
|
||||||
|
NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
|
||||||
|
NVIC_EnableIRQ(TIM_MST_IRQ);
|
||||||
|
|
||||||
|
// Enable interrupts
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_UPDATE); // For 32-bit counter
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2); // For HAL tick
|
||||||
|
|
||||||
|
// Enable timer
|
||||||
|
HAL_TIM_Base_Start(&TimMasterHandle);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,60 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef __HAL_TICK_H
|
||||||
|
#define __HAL_TICK_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "stm32l0xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define TIM_MST TIM21
|
||||||
|
#define TIM_MST_IRQ TIM21_IRQn
|
||||||
|
#define TIM_MST_RCC __TIM21_CLK_ENABLE()
|
||||||
|
|
||||||
|
#define TIM_MST_RESET_ON __TIM21_FORCE_RESET()
|
||||||
|
#define TIM_MST_RESET_OFF __TIM21_RELEASE_RESET()
|
||||||
|
|
||||||
|
#define HAL_TICK_DELAY (1000) // 1 ms
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HAL_TICK_H
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,245 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32l0xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.4.0
|
||||||
|
* @date 01-October-2015
|
||||||
|
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
|
||||||
|
* This file contains all the peripheral register's definitions, bits
|
||||||
|
* definitions and memory mapping for STM32L0xx devices.
|
||||||
|
*
|
||||||
|
* The file is the unique include file that the application programmer
|
||||||
|
* is using in the C source code, usually in main.c. This file contains:
|
||||||
|
* - Configuration section that allows to select:
|
||||||
|
* - The device used in the target application
|
||||||
|
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||||
|
* code will be based on direct access to peripheral’s registers
|
||||||
|
* rather than drivers API), this option is controlled by
|
||||||
|
* "#define USE_HAL_DRIVER"
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l0xx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __STM32L0xx_H
|
||||||
|
#define __STM32L0xx_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
/** @addtogroup Library_configuration_section
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32 Family
|
||||||
|
*/
|
||||||
|
#if !defined (STM32L0)
|
||||||
|
#define STM32L0
|
||||||
|
#endif /* STM32L0 */
|
||||||
|
|
||||||
|
/* Uncomment the line below according to the target STM32 device used in your
|
||||||
|
application
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined (STM32L011xx) && !defined (STM32L021xx) && \
|
||||||
|
!defined (STM32L031xx) && !defined (STM32L041xx) && \
|
||||||
|
!defined (STM32L051xx) && !defined (STM32L052xx) && !defined (STM32L053xx) && \
|
||||||
|
!defined (STM32L061xx) && !defined (STM32L062xx) && !defined (STM32L063xx) && \
|
||||||
|
!defined (STM32L071xx) && !defined (STM32L072xx) && !defined (STM32L073xx) && \
|
||||||
|
!defined (STM32L081xx) && !defined (STM32L082xx) && !defined (STM32L083xx) \
|
||||||
|
/* #define STM32L011xx */
|
||||||
|
/* #define STM32L021xx */
|
||||||
|
#define STM32L031xx /*!< STM32L031C6, STM32L031E6, STM32L031F6, STM32L031G6, STM32L031K6 Devices */
|
||||||
|
/* #define STM32L041xx */ /*!< STM32L041C6, STM32L041E6, STM32L041F6, STM32L041G6, STM32L041K6 Devices */
|
||||||
|
/* #define STM32L051xx */ /*!< STM32L051K8, STM32L051C6, STM32L051C8, STM32L051R6, STM32L051R8 Devices */
|
||||||
|
/* #define STM32L052xx */ /*!< STM32L052K6, STM32L052K8, STM32L052C6, STM32L052C8, STM32L052R6, STM32L052R8 Devices */
|
||||||
|
/* #define STM32L053xx */ /*!< STM32L053C6, STM32L053C8, STM32L053R6, STM32L053R8 Devices */
|
||||||
|
/* #define STM32L061xx */ /*!< */
|
||||||
|
/* #define STM32L062xx */ /*!< STM32L062K8 */
|
||||||
|
/* #define STM32L063xx */ /*!< STM32L063C8, STM32L063R8 */
|
||||||
|
/* #define STM32L071xx */ /*!< */
|
||||||
|
/* #define STM32L072xx */ /*!< */
|
||||||
|
/* #define STM32L073xx */ /*!< STM32L073V8, STM32L073VB, STM32L073RB, STM32L073VZ, STM32L073RZ Devices */
|
||||||
|
/* #define STM32L081xx */ /*!< */
|
||||||
|
/* #define STM32L082xx */ /*!< */
|
||||||
|
/* #define STM32L083xx */ /*!< */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||||
|
devices, you can define the device in your toolchain compiler preprocessor.
|
||||||
|
*/
|
||||||
|
#if !defined (USE_HAL_DRIVER)
|
||||||
|
/**
|
||||||
|
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||||
|
In this case, these drivers will not be included and the application code will
|
||||||
|
be based on direct access to peripherals registers
|
||||||
|
*/
|
||||||
|
#define USE_HAL_DRIVER
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CMSIS Device version number V1.2.0RC1
|
||||||
|
*/
|
||||||
|
#define __STM32L0xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||||
|
#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
|
||||||
|
#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||||
|
#define __STM32L0xx_CMSIS_DEVICE_VERSION_RC (0x01) /*!< [7:0] release candidate */
|
||||||
|
#define __STM32L0xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||||
|
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Device_Included
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#if defined(STM32L011xx)
|
||||||
|
#include "stm32l011xx.h"
|
||||||
|
#elif defined(STM32L021xx)
|
||||||
|
#include "stm32l021xx.h"
|
||||||
|
#elif defined(STM32L031xx)
|
||||||
|
#include "stm32l031xx.h"
|
||||||
|
#elif defined(STM32L041xx)
|
||||||
|
#include "stm32l041xx.h"
|
||||||
|
#elif defined(STM32L051xx)
|
||||||
|
#include "stm32l051xx.h"
|
||||||
|
#elif defined(STM32L052xx)
|
||||||
|
#include "stm32l052xx.h"
|
||||||
|
#elif defined(STM32L053xx)
|
||||||
|
#include "stm32l053xx.h"
|
||||||
|
#elif defined(STM32L062xx)
|
||||||
|
#include "stm32l062xx.h"
|
||||||
|
#elif defined(STM32L063xx)
|
||||||
|
#include "stm32l063xx.h"
|
||||||
|
#elif defined(STM32L061xx)
|
||||||
|
#include "stm32l061xx.h"
|
||||||
|
#elif defined(STM32L071xx)
|
||||||
|
#include "stm32l071xx.h"
|
||||||
|
#elif defined(STM32L072xx)
|
||||||
|
#include "stm32l072xx.h"
|
||||||
|
#elif defined(STM32L073xx)
|
||||||
|
#include "stm32l073xx.h"
|
||||||
|
#elif defined(STM32L082xx)
|
||||||
|
#include "stm32l082xx.h"
|
||||||
|
#elif defined(STM32L083xx)
|
||||||
|
#include "stm32l083xx.h"
|
||||||
|
#elif defined(STM32L081xx)
|
||||||
|
#include "stm32l081xx.h"
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32L0xx device used in your application (in stm32l0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
RESET = 0,
|
||||||
|
SET = !RESET
|
||||||
|
} FlagStatus, ITStatus;
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DISABLE = 0,
|
||||||
|
ENABLE = !DISABLE
|
||||||
|
} FunctionalState;
|
||||||
|
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
ERROR = 0,
|
||||||
|
SUCCESS = !ERROR
|
||||||
|
} ErrorStatus;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup Exported_macro
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||||
|
|
||||||
|
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||||
|
|
||||||
|
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||||
|
|
||||||
|
#define READ_REG(REG) ((REG))
|
||||||
|
|
||||||
|
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||||
|
|
||||||
|
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (USE_HAL_DRIVER)
|
||||||
|
#include "stm32l0xx_hal.h"
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
#endif /* __STM32L0xx_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,313 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32l0xx_hal_conf.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.5.0
|
||||||
|
* @date 8-January-2016
|
||||||
|
* @brief HAL configuration template file.
|
||||||
|
* This file should be copied to the application folder and renamed
|
||||||
|
* to stm32l0xx_hal_conf.h.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32L0xx_HAL_CONF_H
|
||||||
|
#define __STM32L0xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
|
#define HAL_COMP_MODULE_ENABLED
|
||||||
|
#define HAL_CRC_MODULE_ENABLED
|
||||||
|
#define HAL_CRYP_MODULE_ENABLED
|
||||||
|
/* #define HAL_DAC_MODULE_ENABLED */
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
/* #define HAL_FIREWALL_MODULE_ENABLED */
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_I2C_MODULE_ENABLED
|
||||||
|
/* #define HAL_I2S_MODULE_ENABLED */
|
||||||
|
#define HAL_IWDG_MODULE_ENABLED
|
||||||
|
#define HAL_LCD_MODULE_ENABLED
|
||||||
|
#define HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
#define HAL_RNG_MODULE_ENABLED
|
||||||
|
#define HAL_RTC_MODULE_ENABLED
|
||||||
|
#define HAL_SPI_MODULE_ENABLED
|
||||||
|
#define HAL_TIM_MODULE_ENABLED
|
||||||
|
/* #define HAL_TSC_MODULE_ENABLED */
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
#define HAL_USART_MODULE_ENABLED
|
||||||
|
#define HAL_IRDA_MODULE_ENABLED
|
||||||
|
#define HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#define HAL_SMBUS_MODULE_ENABLED
|
||||||
|
#define HAL_WWDG_MODULE_ENABLED
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
/* #define HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* ########################## Oscillator Values adaptation ####################*/
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT ((uint32_t)200) /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Multiple Speed oscillator (MSI) default value.
|
||||||
|
* This value is the default MSI range value after Reset.
|
||||||
|
*/
|
||||||
|
#if !defined (MSI_VALUE)
|
||||||
|
#define MSI_VALUE ((uint32_t)2000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* MSI_VALUE */
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator for USB (HSI48) value.
|
||||||
|
*/
|
||||||
|
#if !defined (HSI48_VALUE)
|
||||||
|
#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz.
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature. */
|
||||||
|
#endif /* HSI48_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Low Speed oscillator (LSI) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
#define LSI_VALUE ((uint32_t)37000) /*!< LSI Typical Value in Hz*/
|
||||||
|
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature.*/
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ########################### System Configuration ######################### */
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY (((uint32_t)1<<__NVIC_PRIO_BITS) - 1) /*!< tick interrupt priority */
|
||||||
|
#define USE_RTOS 0
|
||||||
|
#define PREFETCH_ENABLE 1
|
||||||
|
#define PREREAD_ENABLE 0
|
||||||
|
#define BUFFER_CACHE_DISABLE 0
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
/* #define USE_FULL_ASSERT 1 */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include module's header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_adc.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_COMP_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_comp.h"
|
||||||
|
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_cryp.h"
|
||||||
|
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FIREWALL_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_firewall.h"
|
||||||
|
#endif /* HAL_FIREWALL_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LCD_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_lcd.h"
|
||||||
|
#endif /* HAL_LCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_lptim.h"
|
||||||
|
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RNG_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_rng.h"
|
||||||
|
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TSC_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_tsc.h"
|
||||||
|
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_smbus.h"
|
||||||
|
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32l0xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for function's parameters check.
|
||||||
|
* @param expr: If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t* file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32L0xx_HAL_CONF_H */
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,534 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32l0xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.5.0
|
||||||
|
* @date 8-January-2016
|
||||||
|
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
|
||||||
|
*
|
||||||
|
* This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32l0xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* This file configures the system clock as follows:
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
|
||||||
|
* | (external 8 MHz clock) | (internal 16 MHz)
|
||||||
|
* | 2- PLL_HSE_XTAL |
|
||||||
|
* | (external 8 MHz xtal) |
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(MHz) | 32 | 32
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* AHBCLK (MHz) | 32 | 32
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB1CLK (MHz) | 32 | 32
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB2CLK (MHz) | 32 | 32
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* USB capable (48 MHz precise clock) | YES | YES
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l0xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32l0xx.h"
|
||||||
|
#include "hal_tick.h"
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (MSI_VALUE)
|
||||||
|
#define MSI_VALUE ((uint32_t)2000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* MSI_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/************************* Miscellaneous Configuration ************************/
|
||||||
|
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
|
||||||
|
#define USE_PLL_HSE_EXTC (0) /* Use external clock */
|
||||||
|
#define USE_PLL_HSE_XTAL (0) /* Use external xtal */
|
||||||
|
#define USE_MSI_OSC (0) /* Use multi-speed internal RC oscillator */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 32000000;
|
||||||
|
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void);
|
||||||
|
uint8_t SetSysClock_MSI(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit (void)
|
||||||
|
{
|
||||||
|
/*!< Set MSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000100;
|
||||||
|
|
||||||
|
/*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
|
||||||
|
RCC->CFGR &= (uint32_t) 0x88FF400C;
|
||||||
|
|
||||||
|
/*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFF6;
|
||||||
|
|
||||||
|
/*!< Reset HSI48ON bit */
|
||||||
|
RCC->CRRCR &= (uint32_t)0xFFFFFFFE;
|
||||||
|
|
||||||
|
/*!< Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
|
||||||
|
RCC->CFGR &= (uint32_t)0xFF02FFFF;
|
||||||
|
|
||||||
|
/*!< Disable all interrupts */
|
||||||
|
RCC->CIER = 0x00000000;
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure the Cube driver */
|
||||||
|
SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
|
||||||
|
HAL_Init();
|
||||||
|
|
||||||
|
/* Configure the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
AHB/APBx prescalers and Flash settings */
|
||||||
|
SetSysClock();
|
||||||
|
|
||||||
|
/* Reset the timer to avoid issues after the RAM initialization */
|
||||||
|
TIM_MST_RESET_ON;
|
||||||
|
TIM_MST_RESET_OFF;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock according to Clock Register Values
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
|
||||||
|
* value as defined by the MSI range.
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
|
||||||
|
* 16 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
|
||||||
|
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
|
switch (tmp)
|
||||||
|
{
|
||||||
|
case 0x00: /* MSI used as system clock */
|
||||||
|
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||||
|
SystemCoreClock = (32768 * (1 << (msirange + 1)));
|
||||||
|
break;
|
||||||
|
case 0x04: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x08: /* HSE used as system clock */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x0C: /* PLL used as system clock */
|
||||||
|
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||||
|
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||||
|
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
|
||||||
|
pllmul = PLLMulTable[(pllmul >> 18)];
|
||||||
|
plldiv = (plldiv >> 22) + 1;
|
||||||
|
|
||||||
|
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||||
|
|
||||||
|
if (pllsource == 0x00)
|
||||||
|
{
|
||||||
|
/* HSI oscillator clock selected as PLL clock entry */
|
||||||
|
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* HSE selected as PLL clock entry */
|
||||||
|
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default: /* MSI used as system clock */
|
||||||
|
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||||
|
SystemCoreClock = (32768 * (1 << (msirange + 1)));
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
/* 1- Try to start with HSE and external clock */
|
||||||
|
#if USE_PLL_HSE_EXTC != 0
|
||||||
|
if (SetSysClock_PLL_HSE(1) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
/* 2- If fail try to start with HSE and external xtal */
|
||||||
|
#if USE_PLL_HSE_XTAL != 0
|
||||||
|
if (SetSysClock_PLL_HSE(0) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
/* 3- If fail try to start with MSI */
|
||||||
|
#if USE_MSI_OSC != 0
|
||||||
|
if (SetSysClock_MSI() == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
/* 4- If fail start with HSI clock */
|
||||||
|
if (SetSysClock_PLL_HSI() == 0)
|
||||||
|
{
|
||||||
|
while(1)
|
||||||
|
{
|
||||||
|
// [TODO] Put something here to tell the user that a problem occured...
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI48, RCC_MCODIV_1);
|
||||||
|
}
|
||||||
|
|
||||||
|
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSE) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
/* Used to gain time after DeepSleep in case HSI is used */
|
||||||
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__PWR_CLK_ENABLE();
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
|
||||||
|
if (bypass == 0)
|
||||||
|
{
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
|
}
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||||
|
#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) && \
|
||||||
|
!defined (STM32L011xx) && !defined (STM32L021xx)
|
||||||
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */
|
||||||
|
#endif
|
||||||
|
// PLLCLK = (8 MHz * 8)/2 = 32 MHz
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_8;
|
||||||
|
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//if (bypass == 0)
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
|
||||||
|
//else
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSI) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__PWR_CLK_ENABLE();
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSI and HSI48 oscillators and activate PLL with HSI as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) && \
|
||||||
|
!defined (STM32L011xx) && !defined (STM32L021xx)
|
||||||
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */
|
||||||
|
#endif
|
||||||
|
// PLLCLK = (16 MHz * 4)/2 = 32 MHz
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* MSI (4Mhz) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_MSI(void)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
/* Enable MSI Oscillator */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
|
||||||
|
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
|
||||||
|
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
|
||||||
|
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
|
||||||
|
{
|
||||||
|
/* Initialization Error */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select MSI as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||||
|
clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; // 4 MHz
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 4 MHz
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 4 MHz
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 4 MHz
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0)!= HAL_OK)
|
||||||
|
{
|
||||||
|
/* Initialization Error */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
|
||||||
|
|
||||||
|
/* Disable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_DISABLE();
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,123 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32l0xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.5.0
|
||||||
|
* @date 8-January-2016
|
||||||
|
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Header File.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l0xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32L0XX_H
|
||||||
|
#define __SYSTEM_STM32L0XX_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
extern void SetSysClock(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32L0XX_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
Loading…
Reference in New Issue