ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

MPU - use higher-level calls, fix ARMv8-M error 

Switch to higher-level calls and macros, and fix an error in the ARMv8-M
version - "inner" attributes were not being set correctly due to a
copy/paste error - "outer" was being set twice.

This means RAM would have been marked WTRA rather than WBWA for the
inner cache.

Slightly reduces ARMv7-M init code size by feeding region number
into RBAR instead of using RNR.
pull/9208/head
Kevin Bracey 2018-12-11 18:21:28 +02:00 committed by Cruz Monrreal II
parent 60451368a8
commit 263129a300
2 changed files with 89 additions and 87 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

66
hal/mpu/mbed_mpu_v7m.c
View File

@ -74,13 +74,12 @@ void mbed_mpu_init()
* 0xE0000000 - 0xFFFFFFFF System No * 0xE0000000 - 0xFFFFFFFF System No
*/ */
// Select region 1 and used it for the WT rom region // Select region 0 and use it for the WT read-only rom region
// - RAM 0x00000000 to MBED_MPU_ROM_END // - Code 0x00000000 to MBED_MPU_ROM_END
MPU->RNR = 0; ARM_MPU_SetRegion(
// Set address to 0 ARM_MPU_RBAR(
MPU->RBAR = 0; 0, // Region
// Configure and enable region 0x00000000), // Base
MPU->RASR =
ARM_MPU_RASR( ARM_MPU_RASR(
0, // DisableExec 0, // DisableExec
ARM_MPU_AP_RO, // AccessPermission ARM_MPU_AP_RO, // AccessPermission
@ -97,16 +96,15 @@ void mbed_mpu_init()
((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) | ((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) |
((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) | ((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) |
((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)), ((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)),
ARM_MPU_REGION_SIZE_512MB // Size ARM_MPU_REGION_SIZE_512MB) // Size
); );
// Select region 1 and used it for the WT rom region // Select region 1 and use it for a WT ram region in the Code area
// - RAM MBED_MPU_ROM_END + 1 to 0x1FFFFFFF // - Code MBED_MPU_ROM_END + 1 to 0x1FFFFFFF
MPU->RNR = 1; ARM_MPU_SetRegion(
// Set address to 0 ARM_MPU_RBAR(
MPU->RBAR = 0; 1, // Region
// Configure and enable region 0x00000000), // Base
MPU->RASR =
ARM_MPU_RASR( ARM_MPU_RASR(
1, // DisableExec 1, // DisableExec
ARM_MPU_AP_FULL, // AccessPermission ARM_MPU_AP_FULL, // AccessPermission
@ -123,17 +121,16 @@ void mbed_mpu_init()
((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) | ((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) |
((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) | ((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) |
((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)), ((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)),
ARM_MPU_REGION_SIZE_512MB // Size ARM_MPU_REGION_SIZE_512MB) // Size
); );
// Select region 2 and used it for WBWA ram regions // Select region 2 and use it for WBWA ram regions
// - SRAM 0x20000000 to 0x3FFFFFFF // - SRAM 0x20000000 to 0x3FFFFFFF
// - RAM 0x60000000 to 0x7FFFFFFF // - RAM 0x60000000 to 0x7FFFFFFF
MPU->RNR = 2; ARM_MPU_SetRegion(
// Set address to 0 ARM_MPU_RBAR(
MPU->RBAR = 0; 2, // Region
// Configure and enable region 0x00000000), // Base
MPU->RASR =
ARM_MPU_RASR( ARM_MPU_RASR(
1, // DisableExec 1, // DisableExec
ARM_MPU_AP_FULL, // AccessPermission ARM_MPU_AP_FULL, // AccessPermission
@ -150,16 +147,15 @@ void mbed_mpu_init()
(1 << 5) | // Disable Sub-region (1 << 5) | // Disable Sub-region
(1 << 6) | // Disable Sub-region (1 << 6) | // Disable Sub-region
(1 << 7), // Disable Sub-region (1 << 7), // Disable Sub-region
ARM_MPU_REGION_SIZE_4GB // Size ARM_MPU_REGION_SIZE_4GB) // Size
); );
// Select region 3 and used it for the WT ram region // Select region 3 and use it for the WT ram region
// - RAM RAM 0x80000000 to 0x9FFFFFFF // - RAM 0x80000000 to 0x9FFFFFFF
MPU->RNR = 3; ARM_MPU_SetRegion(
// Set address ARM_MPU_RBAR(
MPU->RBAR = 0x80000000; 3, // Region
// Configure and enable region 0x80000000), // Base
MPU->RASR =
ARM_MPU_RASR( ARM_MPU_RASR(
1, // DisableExec 1, // DisableExec
ARM_MPU_AP_FULL, // AccessPermission ARM_MPU_AP_FULL, // AccessPermission
@ -168,8 +164,8 @@ void mbed_mpu_init()
1, // IsCacheable 1, // IsCacheable
0, // IsBufferable 0, // IsBufferable
~0U, // SubRegionDisable ~0U, // SubRegionDisable
ARM_MPU_REGION_SIZE_512MB // Size ARM_MPU_REGION_SIZE_512MB) // Size
); );
// Enable the MPU // Enable the MPU
MPU->CTRL = MPU->CTRL =

110
hal/mpu/mbed_mpu_v8m.c
View File

@ -47,7 +47,7 @@ void mbed_mpu_init()
// Reset all mapping // Reset all mapping
for (uint32_t i = 0; i < regions; i++) { for (uint32_t i = 0; i < regions; i++) {
ARM_MPU_ClrRegionEx(MPU, i); ARM_MPU_ClrRegion(i);
} }
/* /*
@ -64,61 +64,67 @@ void mbed_mpu_init()
* 0xE0000000 - 0xFFFFFFFF System No * 0xE0000000 - 0xFFFFFFFF System No
*/ */
uint32_t region; const uint8_t WTRA = ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate
uint8_t outer; const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate
uint8_t inner; enum {
AttrIndex_WTRA,
AttrIndex_WBWARA,
};
region = 0; ARM_MPU_SetMemAttr(AttrIndex_WTRA, ARM_MPU_ATTR(WTRA, WTRA));
MPU->RNR = region; ARM_MPU_SetMemAttr(AttrIndex_WBWARA, ARM_MPU_ATTR(WBWARA, WBWARA));
outer = 0xA; // Write-Through, Non-transient, Read-allocate
inner = 0xA; // Write-Through, Non-transient, Read-allocate
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0));
MPU->RBAR = (0x00000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x00000000
(0 << MPU_RBAR_SH_Pos) | // Not shareable
(3 << MPU_RBAR_AP_Pos) | // RO allowed by all privilege levels
(0 << MPU_RBAR_XN_Pos); // Execute Never disabled
MPU->RLAR = (0x1FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x1FFFFFFF
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number
(1 << MPU_RLAR_EN_Pos); // Region enabled
region = 1; ARM_MPU_SetRegion(
MPU->RNR = region; 0, // Region
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate ARM_MPU_RBAR(
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate 0x00000000, // Base
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); ARM_MPU_SH_NON, // Non-shareable
MPU->RBAR = (0x20000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x20000000 1, // Read-Only
(0 << MPU_RBAR_SH_Pos) | // Not shareable 1, // Non-Privileged
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels 0), // Execute Never disabled
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled ARM_MPU_RLAR(
MPU->RLAR = (0x3FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x3FFFFFFF 0x1FFFFFFF, // Limit
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
(1 << MPU_RLAR_EN_Pos); // Region enabled );
region = 2; ARM_MPU_SetRegion(
MPU->RNR = region; 1, // Region
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate ARM_MPU_RBAR(
outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate 0x20000000, // Base
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); ARM_MPU_SH_NON, // Non-shareable
MPU->RBAR = (0x60000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x60000000 0, // Read-Write
(0 << MPU_RBAR_SH_Pos) | // Not shareable 1, // Non-Privileged
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels 1), // Execute Never enabled
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled ARM_MPU_RLAR(
MPU->RLAR = (0x7FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x7FFFFFFF 0x3FFFFFFF, // Limit
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
(1 << MPU_RLAR_EN_Pos); // Region enabled );
region = 3; ARM_MPU_SetRegion(
MPU->RNR = region; 2, // Region
outer = 0xA; // Write-Through, Non-transient, Read-allocate ARM_MPU_RBAR(
inner = 0xA; // Write-Through, Non-transient, Read-allocate 0x60000000, // Base
ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); ARM_MPU_SH_NON, // Non-shareable
MPU->RBAR = (0x80000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x80000000 0, // Read-Write
(0 << MPU_RBAR_SH_Pos) | // Not shareable 1, // Non-Privileged
(1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels 1), // Execute Never enabled
(1 << MPU_RBAR_XN_Pos); // Execute Never enabled ARM_MPU_RLAR(
MPU->RLAR = (0x9FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x9FFFFFFF 0x7FFFFFFF, // Limit
(region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
(1 << MPU_RLAR_EN_Pos); // Region enabled );
ARM_MPU_SetRegion(
3, // Region
ARM_MPU_RBAR(
0x80000000, // Base
ARM_MPU_SH_NON, // Non-shareable
0, // Read-Write
1, // Non-Privileged
1), // Execute Never enabled
ARM_MPU_RLAR(
0x9FFFFFFF, // Limit
AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
);
// Enable the MPU // Enable the MPU
MPU->CTRL = MPU->CTRL =