diff --git a/hal/mpu/mbed_mpu_v7m.c b/hal/mpu/mbed_mpu_v7m.c index 51112a6707..57c63f4c4d 100644 --- a/hal/mpu/mbed_mpu_v7m.c +++ b/hal/mpu/mbed_mpu_v7m.c @@ -74,13 +74,12 @@ void mbed_mpu_init() * 0xE0000000 - 0xFFFFFFFF System No */ - // Select region 1 and used it for the WT rom region - // - RAM 0x00000000 to MBED_MPU_ROM_END - MPU->RNR = 0; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = + // Select region 0 and use it for the WT read-only rom region + // - Code 0x00000000 to MBED_MPU_ROM_END + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 0, // Region + 0x00000000), // Base ARM_MPU_RASR( 0, // DisableExec ARM_MPU_AP_RO, // AccessPermission @@ -97,16 +96,15 @@ void mbed_mpu_init() ((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) | ((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) | ((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)), - ARM_MPU_REGION_SIZE_512MB // Size - ); + ARM_MPU_REGION_SIZE_512MB) // Size + ); - // Select region 1 and used it for the WT rom region - // - RAM MBED_MPU_ROM_END + 1 to 0x1FFFFFFF - MPU->RNR = 1; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = + // Select region 1 and use it for a WT ram region in the Code area + // - Code MBED_MPU_ROM_END + 1 to 0x1FFFFFFF + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 1, // Region + 0x00000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -123,17 +121,16 @@ void mbed_mpu_init() ((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) | ((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) | ((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)), - ARM_MPU_REGION_SIZE_512MB // Size - ); + ARM_MPU_REGION_SIZE_512MB) // Size + ); - // Select region 2 and used it for WBWA ram regions + // Select region 2 and use it for WBWA ram regions // - SRAM 0x20000000 to 0x3FFFFFFF // - RAM 0x60000000 to 0x7FFFFFFF - MPU->RNR = 2; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 2, // Region + 0x00000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -150,16 +147,15 @@ void mbed_mpu_init() (1 << 5) | // Disable Sub-region (1 << 6) | // Disable Sub-region (1 << 7), // Disable Sub-region - ARM_MPU_REGION_SIZE_4GB // Size - ); + ARM_MPU_REGION_SIZE_4GB) // Size + ); - // Select region 3 and used it for the WT ram region - // - RAM RAM 0x80000000 to 0x9FFFFFFF - MPU->RNR = 3; - // Set address - MPU->RBAR = 0x80000000; - // Configure and enable region - MPU->RASR = + // Select region 3 and use it for the WT ram region + // - RAM 0x80000000 to 0x9FFFFFFF + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 3, // Region + 0x80000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -168,8 +164,8 @@ void mbed_mpu_init() 1, // IsCacheable 0, // IsBufferable ~0U, // SubRegionDisable - ARM_MPU_REGION_SIZE_512MB // Size - ); + ARM_MPU_REGION_SIZE_512MB) // Size + ); // Enable the MPU MPU->CTRL = diff --git a/hal/mpu/mbed_mpu_v8m.c b/hal/mpu/mbed_mpu_v8m.c index b1f98f43bf..4e8ce1100e 100644 --- a/hal/mpu/mbed_mpu_v8m.c +++ b/hal/mpu/mbed_mpu_v8m.c @@ -47,7 +47,7 @@ void mbed_mpu_init() // Reset all mapping for (uint32_t i = 0; i < regions; i++) { - ARM_MPU_ClrRegionEx(MPU, i); + ARM_MPU_ClrRegion(i); } /* @@ -64,61 +64,67 @@ void mbed_mpu_init() * 0xE0000000 - 0xFFFFFFFF System No */ - uint32_t region; - uint8_t outer; - uint8_t inner; + const uint8_t WTRA = ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate + const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate + enum { + AttrIndex_WTRA, + AttrIndex_WBWARA, + }; - region = 0; - MPU->RNR = region; - outer = 0xA; // Write-Through, Non-transient, Read-allocate - inner = 0xA; // Write-Through, Non-transient, Read-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x00000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x00000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (3 << MPU_RBAR_AP_Pos) | // RO allowed by all privilege levels - (0 << MPU_RBAR_XN_Pos); // Execute Never disabled - MPU->RLAR = (0x1FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x1FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetMemAttr(AttrIndex_WTRA, ARM_MPU_ATTR(WTRA, WTRA)); + ARM_MPU_SetMemAttr(AttrIndex_WBWARA, ARM_MPU_ATTR(WBWARA, WBWARA)); - region = 1; - MPU->RNR = region; - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x20000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x20000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x3FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x3FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetRegion( + 0, // Region + ARM_MPU_RBAR( + 0x00000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 1, // Read-Only + 1, // Non-Privileged + 0), // Execute Never disabled + ARM_MPU_RLAR( + 0x1FFFFFFF, // Limit + AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate + ); - region = 2; - MPU->RNR = region; - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x60000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x60000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x7FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x7FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetRegion( + 1, // Region + ARM_MPU_RBAR( + 0x20000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x3FFFFFFF, // Limit + AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate + ); - region = 3; - MPU->RNR = region; - outer = 0xA; // Write-Through, Non-transient, Read-allocate - inner = 0xA; // Write-Through, Non-transient, Read-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x80000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x80000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x9FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x9FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetRegion( + 2, // Region + ARM_MPU_RBAR( + 0x60000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x7FFFFFFF, // Limit + AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate + ); + + ARM_MPU_SetRegion( + 3, // Region + ARM_MPU_RBAR( + 0x80000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x9FFFFFFF, // Limit + AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate + ); // Enable the MPU MPU->CTRL =