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Merge branch 'master' of github.com:mbedmicro/mbed

pull/234/head
Bogdan Marinescu 2014-03-25 11:44:32 +00:00
parent 71b306a2d4 11bc6fdd03
commit 249f016cd8
20 changed files with 650 additions and 563 deletions
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2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.s
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@ -1,6 +1,6 @@
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
;* File Name : startup_stm32f302x8.s
; STM32F302x8 Devices vector table for MDK ARM_MICRO toolchain
; STM32F302x8 Devices vector table for MDK ARM_STD toolchain
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x.h
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@ -112,7 +112,7 @@
can define the HSE value in your toolchain compiler preprocessor.
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External xtal in Hz */
#endif /* HSE_VALUE */
/**

218
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c
View File

@ -40,34 +40,22 @@
* value to your own configuration.
*
* 5. This file configures the system clock as follows:
*=============================================================================
* Supported STM32F30x device
*-----------------------------------------------------------------------------
* System Clock source | PLL(HSI)
* System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
* | (external 8 MHz clock) | (internal 8 MHz)
* | 2- PLL_HSE_XTAL |
* | (external 8 MHz xtal) |
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 64000000
* SYSCLK(MHz) | 72 | 64
*-----------------------------------------------------------------------------
* HCLK(Hz) | 64000000
* AHBCLK (MHz) | 72 | 64
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
* APB1CLK (MHz) | 36 | 32
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
* APB2CLK (MHz) | 72 | 64
*-----------------------------------------------------------------------------
* APB1 Prescaler (Max = 36MHz) | 2 (SPI, ...)
* USB capable (48 MHz precise clock) | YES | NO
*-----------------------------------------------------------------------------
* HSE Frequency(Hz) | 8000000
*----------------------------------------------------------------------------
* PLLMUL | 16
*-----------------------------------------------------------------------------
* PREDIV | 2
*-----------------------------------------------------------------------------
* USB Clock | DISABLE
*-----------------------------------------------------------------------------
* Flash Latency(WS) | 2
*-----------------------------------------------------------------------------
* Prefetch Buffer | OFF
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
@ -97,6 +85,7 @@
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
@ -126,6 +115,7 @@
/** @addtogroup STM32F30x_System_Private_Defines
* @{
*/
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
@ -139,6 +129,10 @@
* @{
*/
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
#define USE_PLL_HSE_EXTC (1) /* Use external clock */
#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
/**
* @}
*/
@ -147,9 +141,9 @@
* @{
*/
uint32_t SystemCoreClock = 64000000;
uint32_t SystemCoreClock = 64000000; /* Default with HSI. Will be updated if HSE is used */
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/**
* @}
@ -161,6 +155,12 @@
void SetSysClock(void);
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
#endif
uint8_t SetSysClock_PLL_HSI(void);
/**
* @}
*/
@ -208,31 +208,16 @@ void SystemInit(void)
/* Disable all interrupts */
RCC->CIR = 0x00000000;
/* Configure the System clock source, PLL Multiplier and Divider factors,
AHB/APBx prescalers and Flash settings ----------------------------------*/
SetSysClock();
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
// ADDED FOR MBED DEBUGGING PURPOSE
/*
// Enable GPIOA clock
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
// Configure MCO pin (PA8)
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
// Select the clock to output
RCC_MCOConfig(RCC_MCOSource_SYSCLK, RCC_MCOPrescaler_1);
*/
/* Configure the System clock source, PLL Multiplier and Divider factors,
AHB/APBx prescalers and Flash settings */
SetSysClock();
}
/**
@ -325,31 +310,137 @@ void SystemCoreClockUpdate (void)
*/
void SetSysClock(void)
{
/* 1- Try to start with HSE and external clock */
#if USE_PLL_HSE_EXTC != 0
if (SetSysClock_PLL_HSE(1) == 0)
#endif
{
/* 2- If fail try to start with HSE and external xtal */
#if USE_PLL_HSE_XTAL != 0
if (SetSysClock_PLL_HSE(0) == 0)
#endif
{
/* 3- If fail start with HSI clock */
if (SetSysClock_PLL_HSI() == 0)
{
while(1)
{
// [TODO] Put something here to tell the user that a problem occured...
}
}
}
}
/* Update SystemCoreClock variable */
SystemCoreClockUpdate();
/* Output SYSCLK on MCO pin(PA8) for debugging purpose */
/*
// Enable GPIOA clock
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
// Configure MCO pin (PA8)
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
// Select the clock to output
RCC_MCOConfig(RCC_MCOSource_SYSCLK, RCC_MCOPrescaler_1);
*/
}
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
__IO uint32_t StartUpCounter = 0;
__IO uint32_t HSEStatus = 0;
/* Bypass HSE: can be done only if HSE is OFF */
if (bypass != 0)
{
RCC->CR &= ((uint32_t)~RCC_CR_HSEON); /* To be sure HSE is OFF */
RCC->CR |= ((uint32_t)RCC_CR_HSEBYP);
}
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
/* Wait till HSE is ready */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
/* Check if HSE has started correctly */
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
/* Enable prefetch buffer and set flash latency
0WS for 0 < SYSCLK <= 24 MHz
1WS for 24 < SYSCLK <= 48 MHz
2WS for 48 < SYSCLK <= 72 MHz */
FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; /* 2 WS */
/* Warning: values are obtained with external xtal or clock = 8 MHz */
/* SYSCLK = 72 MHz (8 MHz * 9) */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9
| RCC_CFGR_HPRE_DIV1 /* HCLK = 72 MHz */
| RCC_CFGR_PPRE2_DIV1 /* PCLK2 = 72 MHz */
| RCC_CFGR_PPRE1_DIV2); /* PCLK1 = 36 MHz */
/* USBCLK = 48 MHz (72 MHz / 1.5) --> USB OK */
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
{
}
return 1; // OK
}
else
{
return 0; // FAIL
}
}
#endif
/******************************************************************************/
/* PLL (clocked by HSI) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSI(void)
{
/* At this stage the HSI is already enabled and used as System clock source */
/* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
/* Enable prefetch buffer and set flash latency
0WS for 0 < SYSCLK <= 24 MHz
1WS for 24 < SYSCLK <= 48 MHz
2WS for 48 < SYSCLK <= 72 MHz */
FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; /* 2 WS */
/* Disable Prefetch Buffer and set Flash Latency */
FLASH->ACR = (uint32_t)FLASH_ACR_LATENCY_1;
/* HCLK = 64 MHz */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK2 = 64 MHz */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
/* PCLK1 = 32 MHz (SPI, ...) */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
/* PLL configuration
SYSCLK = 4 MHz * 16 = 64 MHz
*/
/* SYSCLK = 64 MHz (8 MHz / 2 * 16) */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL16);
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL16
| RCC_CFGR_HPRE_DIV1 /* HCLK = 64 MHz */
| RCC_CFGR_PPRE2_DIV1 /* PCLK2 = 64 MHz */
| RCC_CFGR_PPRE1_DIV2); /* PCLK1 = 32 MHz */
/* USBCLK = 42.667 MHz (64 MHz / 1.5) --> USB NOT POSSIBLE */
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
@ -367,6 +458,8 @@ void SetSysClock(void)
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
{
}
return 1; // OK
}
/**
@ -382,4 +475,3 @@ void SetSysClock(void)
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

186
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h
View File

@ -57,106 +57,106 @@ typedef enum {
} PinDirection;
typedef enum {
PA_0 = 0x00,
PA_1 = 0x01,
PA_2 = 0x02,
PA_3 = 0x03,
PA_4 = 0x04,
PA_5 = 0x05,
PA_6 = 0x06,
PA_7 = 0x07,
PA_8 = 0x08,
PA_9 = 0x09,
PA_10 = 0x0A,
PA_11 = 0x0B,
PA_12 = 0x0C,
PA_13 = 0x0D,
PA_14 = 0x0E,
PA_15 = 0x0F,
PA_0 = 0x00,
PA_1 = 0x01,
PA_2 = 0x02,
PA_3 = 0x03,
PA_4 = 0x04,
PA_5 = 0x05,
PA_6 = 0x06,
PA_7 = 0x07,
PA_8 = 0x08,
PA_9 = 0x09,
PA_10 = 0x0A,
PA_11 = 0x0B,
PA_12 = 0x0C,
PA_13 = 0x0D,
PA_14 = 0x0E,
PA_15 = 0x0F,
PB_0 = 0x10,
PB_1 = 0x11,
PB_2 = 0x12,
PB_3 = 0x13,
PB_4 = 0x14,
PB_5 = 0x15,
PB_6 = 0x16,
PB_7 = 0x17,
PB_8 = 0x18,
PB_9 = 0x19,
PB_10 = 0x1A,
PB_11 = 0x1B,
PB_12 = 0x1C,
PB_13 = 0x1D,
PB_14 = 0x1E,
PB_15 = 0x1F,
PB_0 = 0x10,
PB_1 = 0x11,
PB_2 = 0x12,
PB_3 = 0x13,
PB_4 = 0x14,
PB_5 = 0x15,
PB_6 = 0x16,
PB_7 = 0x17,
PB_8 = 0x18,
PB_9 = 0x19,
PB_10 = 0x1A,
PB_11 = 0x1B,
PB_12 = 0x1C,
PB_13 = 0x1D,
PB_14 = 0x1E,
PB_15 = 0x1F,
PC_0 = 0x20,
PC_1 = 0x21,
PC_2 = 0x22,
PC_3 = 0x23,
PC_4 = 0x24,
PC_5 = 0x25,
PC_6 = 0x26,
PC_7 = 0x27,
PC_8 = 0x28,
PC_9 = 0x29,
PC_10 = 0x2A,
PC_11 = 0x2B,
PC_12 = 0x2C,
PC_13 = 0x2D,
PC_14 = 0x2E,
PC_15 = 0x2F,
PC_0 = 0x20,
PC_1 = 0x21,
PC_2 = 0x22,
PC_3 = 0x23,
PC_4 = 0x24,
PC_5 = 0x25,
PC_6 = 0x26,
PC_7 = 0x27,
PC_8 = 0x28,
PC_9 = 0x29,
PC_10 = 0x2A,
PC_11 = 0x2B,
PC_12 = 0x2C,
PC_13 = 0x2D,
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_2 = 0x32,
PD_2 = 0x32,
PF_0 = 0x50,
PF_1 = 0x51,
PF_0 = 0x50,
PF_1 = 0x51,
// Arduino connector namings
A0 = PA_0,
A1 = PA_1,
A2 = PA_4,
A3 = PB_0,
A4 = PC_1,
A5 = PC_0,
D0 = PA_3,
D1 = PA_2,
D2 = PA_10,
D3 = PB_3,
D4 = PB_5,
D5 = PB_4,
D6 = PB_10,
D7 = PA_8,
D8 = PA_9,
D9 = PC_7,
D10 = PB_6,
D11 = PA_7,
D12 = PA_6,
D13 = PA_5,
D14 = PB_9,
D15 = PB_8,
// Arduino connector namings
A0 = PA_0,
A1 = PA_1,
A2 = PA_4,
A3 = PB_0,
A4 = PC_1,
A5 = PC_0,
D0 = PA_3,
D1 = PA_2,
D2 = PA_10,
D3 = PB_3,
D4 = PB_5,
D5 = PB_4,
D6 = PB_10,
D7 = PA_8,
D8 = PA_9,
D9 = PC_7,
D10 = PB_6,
D11 = PA_7,
D12 = PA_6,
D13 = PA_5,
D14 = PB_9,
D15 = PB_8,
// Generic signals namings
LED1 = PA_5,
LED2 = PA_5,
LED3 = PA_5,
LED4 = PA_5,
USER_BUTTON = PC_13,
SERIAL_TX = PA_2,
SERIAL_RX = PA_3,
USBTX = PA_2,
USBRX = PA_3,
I2C_SCL = PB_8,
I2C_SDA = PB_9,
SPI_MOSI = PA_7,
SPI_MISO = PA_6,
SPI_SCK = PA_5,
SPI_CS = PB_6,
PWM_OUT = PB_3,
// Generic signals namings
LED1 = PA_5,
LED2 = PA_5,
LED3 = PA_5,
LED4 = PA_5,
USER_BUTTON = PC_13,
SERIAL_TX = PA_2,
SERIAL_RX = PA_3,
USBTX = PA_2,
USBRX = PA_3,
I2C_SCL = PB_8,
I2C_SDA = PB_9,
SPI_MOSI = PB_15,
SPI_MISO = PB_14,
SPI_SCK = PB_13,
SPI_CS = PB_6,
PWM_OUT = PB_3,
// Not connected
NC = (int)0xFFFFFFFF
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {

126
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogin_api.c
View File

@ -65,7 +65,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
if (obj->adc == (ADCName)NC) {
error("ADC pin mapping failed");
error("ADC pin mapping failed");
}
// Configure GPIO
@ -90,7 +90,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
wait_us(10);
ADC_SelectCalibrationMode(adc, ADC_CalibrationMode_Single);
ADC_StartCalibration(adc);
while (ADC_GetCalibrationStatus(adc) != RESET ) {}
while (ADC_GetCalibrationStatus(adc) != RESET) {}
// Configure ADC
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
@ -113,82 +113,82 @@ void analogin_init(analogin_t *obj, PinName pin) {
// Enable ADC
ADC_Cmd(adc, ENABLE);
while(!ADC_GetFlagStatus(adc, ADC_FLAG_RDY)) {}
while (!ADC_GetFlagStatus(adc, ADC_FLAG_RDY)) {}
}
}
static inline uint16_t adc_read(analogin_t *obj) {
// Get ADC registers structure address
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
uint8_t channel = 0;
// Get ADC registers structure address
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
uint8_t channel = 0;
// Configure ADC channel
switch (obj->pin) {
case PA_0:
channel = ADC_Channel_1;
break;
case PA_1:
channel = ADC_Channel_2;
break;
case PA_2:
channel = ADC_Channel_3;
break;
case PA_3:
channel = ADC_Channel_4;
break;
case PA_4:
channel = ADC_Channel_5;
break;
case PC_0:
channel = ADC_Channel_6;
break;
case PC_1:
channel = ADC_Channel_7;
break;
case PC_2:
channel = ADC_Channel_8;
break;
case PC_3:
channel = ADC_Channel_9;
break;
case PA_6:
channel = ADC_Channel_10;
break;
case PB_0:
channel = ADC_Channel_11;
break;
case PB_1:
channel = ADC_Channel_12;
break;
case PB_13:
channel = ADC_Channel_13;
break;
case PB_11:
channel = ADC_Channel_14;
break;
case PA_7:
channel = ADC_Channel_15;
break;
default:
return 0;
}
// Configure ADC channel
switch (obj->pin) {
case PA_0:
channel = ADC_Channel_1;
break;
case PA_1:
channel = ADC_Channel_2;
break;
case PA_2:
channel = ADC_Channel_3;
break;
case PA_3:
channel = ADC_Channel_4;
break;
case PA_4:
channel = ADC_Channel_5;
break;
case PC_0:
channel = ADC_Channel_6;
break;
case PC_1:
channel = ADC_Channel_7;
break;
case PC_2:
channel = ADC_Channel_8;
break;
case PC_3:
channel = ADC_Channel_9;
break;
case PA_6:
channel = ADC_Channel_10;
break;
case PB_0:
channel = ADC_Channel_11;
break;
case PB_1:
channel = ADC_Channel_12;
break;
case PB_13:
channel = ADC_Channel_13;
break;
case PB_11:
channel = ADC_Channel_14;
break;
case PA_7:
channel = ADC_Channel_15;
break;
default:
return 0;
}
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_7Cycles5);
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_7Cycles5);
ADC_StartConversion(adc); // Start conversion
ADC_StartConversion(adc); // Start conversion
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
while (ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
return(ADC_GetConversionValue(adc)); // Get conversion value
return (ADC_GetConversionValue(adc)); // Get conversion value
}
uint16_t analogin_read_u16(analogin_t *obj) {
return(adc_read(obj));
return (adc_read(obj));
}
float analogin_read(analogin_t *obj) {
uint16_t value = adc_read(obj);
return (float)value * (1.0f / (float)0xFFF); // 12 bits range
uint16_t value = adc_read(obj);
return (float)value * (1.0f / (float)0xFFF); // 12 bits range
}
#endif

7
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogout_api.c
View File

@ -95,10 +95,9 @@ void analogout_write(dac_t *obj, float value) {
void analogout_write_u16(dac_t *obj, uint16_t value) {
if (value > (uint16_t)RANGE_12BIT) {
dac_write(obj, (uint16_t)RANGE_12BIT); // Max value
}
else {
dac_write(obj, value);
dac_write(obj, (uint16_t)RANGE_12BIT); // Max value
} else {
dac_write(obj, value);
}
}

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_api.c
View File

@ -65,8 +65,7 @@ void gpio_mode(gpio_t *obj, PinMode mode) {
void gpio_dir(gpio_t *obj, PinDirection direction) {
if (direction == PIN_OUTPUT) {
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF));
}
else { // PIN_INPUT
} else { // PIN_INPUT
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
}
}

50
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_irq_api.c
View File

@ -53,8 +53,7 @@ static void handle_interrupt_in(uint32_t irq_index) {
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
// Clear interrupt flag
if (EXTI_GetITStatus(channel_pin[irq_index]) != RESET)
{
if (EXTI_GetITStatus(channel_pin[irq_index]) != RESET) {
EXTI_ClearITPendingBit(channel_pin[irq_index]);
}
@ -63,20 +62,38 @@ static void handle_interrupt_in(uint32_t irq_index) {
// Check which edge has generated the irq
if ((gpio->IDR & pin) == 0) {
irq_handler(channel_ids[irq_index], IRQ_FALL);
}
else {
} else {
irq_handler(channel_ids[irq_index], IRQ_RISE);
}
}
// The irq_index is passed to the function
static void gpio_irq0(void) {handle_interrupt_in(0);} // EXTI line 0
static void gpio_irq1(void) {handle_interrupt_in(1);} // EXTI line 1
static void gpio_irq2(void) {handle_interrupt_in(2);} // EXTI line 2
static void gpio_irq3(void) {handle_interrupt_in(3);} // EXTI line 3
static void gpio_irq4(void) {handle_interrupt_in(4);} // EXTI line 4
static void gpio_irq5(void) {handle_interrupt_in(5);} // EXTI lines 5 to 9
static void gpio_irq6(void) {handle_interrupt_in(6);} // EXTI lines 10 to 15
static void gpio_irq0(void) {
handle_interrupt_in(0); // EXTI line 0
}
static void gpio_irq1(void) {
handle_interrupt_in(1); // EXTI line 1
}
static void gpio_irq2(void) {
handle_interrupt_in(2); // EXTI line 2
}
static void gpio_irq3(void) {
handle_interrupt_in(3); // EXTI line 3
}
static void gpio_irq4(void) {
handle_interrupt_in(4); // EXTI line 4
}
static void gpio_irq5(void) {
handle_interrupt_in(5); // EXTI lines 5 to 9
}
static void gpio_irq6(void) {
handle_interrupt_in(6); // EXTI lines 10 to 15
}
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
@ -203,8 +220,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or RISE
} else { // NONE or RISE
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
obj->event = EDGE_RISE;
}
@ -214,8 +230,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or FALL
} else { // NONE or FALL
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
obj->event = EDGE_FALL;
}
@ -223,8 +238,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if (enable) {
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
}
else {
} else {
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
}

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_object.h
View File

@ -50,8 +50,7 @@ typedef struct {
static inline void gpio_write(gpio_t *obj, int value) {
if (value) {
*obj->reg_set = obj->mask;
}
else {
} else {
*obj->reg_clr = obj->mask;
}
}

48
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c
View File

@ -120,28 +120,28 @@ void i2c_frequency(i2c_t *obj, int hz) {
- Fall time = 10ns
*/
switch (hz) {
case 100000:
tim = 0x00201D2B; // Standard mode
break;
case 200000:
tim = 0x0010021E; // Fast Mode
break;
case 400000:
tim = 0x0010020A; // Fast Mode
break;
case 1000000:
tim = 0x00100001; // Fast Mode Plus
// Enable the Fast Mode Plus capability
if (obj->i2c == I2C_1) {
SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
}
if (obj->i2c == I2C_2) {
SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE);
}
break;
default:
error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported.");
break;
case 100000:
tim = 0x00201D2B; // Standard mode
break;
case 200000:
tim = 0x0010021E; // Fast Mode
break;
case 400000:
tim = 0x0010020A; // Fast Mode
break;
case 1000000:
tim = 0x00100001; // Fast Mode Plus
// Enable the Fast Mode Plus capability
if (obj->i2c == I2C_1) {
SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
}
if (obj->i2c == I2C_2) {
SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE);
}
break;
default:
error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported.");
break;
}
// I2C configuration
@ -214,7 +214,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
// Configure slave address, nbytes, reload, end mode and start or stop generation
//if (stop) {
I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write);
I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write);
//}
//else {
// I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Write);
@ -326,7 +326,7 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) {
int i2c_slave_receive(i2c_t *obj) {
// TO BE DONE
return(0);
return (0);
}
int i2c_slave_read(i2c_t *obj, char *data, int length) {

8
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/port_api.c
View File

@ -39,7 +39,7 @@ extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
// high nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
// low nibble = pin number
PinName port_pin(PortName port, int pin_n) {
return (PinName)(pin_n + (port << 4));
return (PinName)(pin_n + (port << 4));
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
@ -66,8 +66,7 @@ void port_dir(port_t *obj, PinDirection dir) {
if (obj->mask & (1 << i)) { // If the pin is used
if (dir == PIN_OUTPUT) {
pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF));
}
else { // PIN_INPUT
} else { // PIN_INPUT
pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
}
}
@ -90,8 +89,7 @@ void port_write(port_t *obj, int value) {
int port_read(port_t *obj) {
if (obj->direction == PIN_OUTPUT) {
return (*obj->reg_out & obj->mask);
}
else { // PIN_INPUT
} else { // PIN_INPUT
return (*obj->reg_in & obj->mask);
}
}

60
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pwmout_api.c
View File

@ -35,44 +35,44 @@
// TIM2 cannot be used because already used by the us_ticker
static const PinMap PinMap_PWM[] = {
//{PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
//{PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
// {PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
// {PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
{PA_1, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1N
{PA_2, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1
{PA_3, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH2
//{PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
// {PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
{PA_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
{PA_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
//{PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
// {PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
{PA_8, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1
{PA_9, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2
//{PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3
// {PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3
{PA_10, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3
//{PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4
// {PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4
{PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_11)}, // TIM1_CH4
//{PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
// {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
{PA_12, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
//{PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
// {PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
{PA_13, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
//{PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
// {PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
{PB_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
{PB_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N
//{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
// {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
{PB_4, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
{PB_5, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM17_CH1
{PB_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
{PB_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1N
{PB_8, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
{PB_9, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
//{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3
//{PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4
// {PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3
// {PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4
{PB_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
{PB_14, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH1
//{PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
// {PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
{PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH2
//{PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N
//{PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N
// {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N
// {PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N
{PC_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH1
{PC_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH2
@ -136,14 +136,14 @@ void pwmout_write(pwmout_t* obj, float value) {
switch (obj->pin) {
// Channels 1
//case PA_0:
// case PA_0:
case PA_2:
//case PA_5:
// case PA_5:
case PA_6:
case PA_7:
case PA_8:
case PA_12:
//case PA_15:
// case PA_15:
case PB_4:
case PB_5:
case PB_8:
@ -156,23 +156,23 @@ void pwmout_write(pwmout_t* obj, float value) {
break;
// Channels 1N
case PA_1:
//case PA_7:
//case PA_11:
// case PA_7:
// case PA_11:
case PA_13:
case PB_6:
case PB_7:
case PB_13:
//case PB_15:
// case PB_15:
case PC_13:
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC1Init(tim, &TIM_OCInitStructure);
break;
// Channels 2
//case PA_1:
// case PA_1:
case PA_3:
case PA_9:
//case PB_3:
// case PB_3:
case PB_15:
case PC_1:
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
@ -180,17 +180,17 @@ void pwmout_write(pwmout_t* obj, float value) {
TIM_OC2Init(tim, &TIM_OCInitStructure);
break;
// Channels 2N
//case PA_12:
// case PA_12:
case PB_0:
//case PB_14:
// case PB_14:
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC2Init(tim, &TIM_OCInitStructure);
break;
// Channels 3
//case PA_9:
// case PA_9:
case PA_10:
//case PB_10:
// case PB_10:
case PC_2:
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
@ -199,15 +199,15 @@ void pwmout_write(pwmout_t* obj, float value) {
// Channels 3N
case PB_1:
case PF_0:
//case PB_15:
// case PB_15:
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC3Init(tim, &TIM_OCInitStructure);
break;
// Channels 4
//case PA_10:
// case PA_10:
case PA_11:
//case PB_11:
// case PB_11:
case PC_3:
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);

2
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c
View File

@ -56,7 +56,7 @@ void rtc_init(void) {
RTC_InitTypeDef RTC_InitStructure;
RTC_InitStructure.RTC_AsynchPrediv = 127;
RTC_InitStructure.RTC_SynchPrediv = (lsi_freq / 128) - 1;
RTC_InitStructure.RTC_SynchPrediv = (lsi_freq / 128) - 1;
RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
RTC_Init(&RTC_InitStructure);

58
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/serial_api.c
View File

@ -147,29 +147,27 @@ void serial_baud(serial_t *obj, int baudrate) {
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
if (data_bits == 8) {
obj->databits = USART_WordLength_8b;
}
else {
} else {
obj->databits = USART_WordLength_9b;
}
switch (parity) {
case ParityOdd:
case ParityForced0:
obj->parity = USART_Parity_Odd;
break;
case ParityEven:
case ParityForced1:
obj->parity = USART_Parity_Even;
break;
default: // ParityNone
obj->parity = USART_Parity_No;
break;
case ParityOdd:
case ParityForced0:
obj->parity = USART_Parity_Odd;
break;
case ParityEven:
case ParityForced1:
obj->parity = USART_Parity_Even;
break;
default: // ParityNone
obj->parity = USART_Parity_No;
break;
}
if (stop_bits == 2) {
obj->stopbits = USART_StopBits_2;
}
else {
} else {
obj->stopbits = USART_StopBits_1;
}
@ -194,9 +192,15 @@ static void uart_irq(USART_TypeDef* usart, int id) {
}
}
static void uart1_irq(void) {uart_irq((USART_TypeDef*)UART_1, 0);}
static void uart2_irq(void) {uart_irq((USART_TypeDef*)UART_2, 1);}
static void uart3_irq(void) {uart_irq((USART_TypeDef*)UART_3, 2);}
static void uart1_irq(void) {
uart_irq((USART_TypeDef*)UART_1, 0);
}
static void uart2_irq(void) {
uart_irq((USART_TypeDef*)UART_2, 1);
}
static void uart3_irq(void) {
uart_irq((USART_TypeDef*)UART_3, 2);
}
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
irq_handler = handler;
@ -209,26 +213,25 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
USART_TypeDef *usart = (USART_TypeDef *)(obj->uart);
if (obj->uart == UART_1) {
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
}
if (obj->uart == UART_2) {
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
}
if (obj->uart == UART_3) {
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
}
if (enable) {
if (irq == RxIrq) {
USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
}
else { // TxIrq
} else { // TxIrq
USART_ITConfig(usart, USART_IT_TC, ENABLE);
}
@ -243,8 +246,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
// Check if TxIrq is disabled too
if ((usart->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
}
else { // TxIrq
} else { // TxIrq
USART_ITConfig(usart, USART_IT_TXE, DISABLE);
// Check if RxIrq is disabled too
if ((usart->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;

6
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c
View File

@ -34,8 +34,7 @@
extern void SetSysClock(void);
// MCU SLEEP mode
void sleep(void)
{
void sleep(void) {
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
@ -44,8 +43,7 @@ void sleep(void)
}
// MCU STOP mode
void deepsleep(void)
{
void deepsleep(void) {
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);

100
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c
View File

@ -74,15 +74,15 @@ static void init_spi(spi_t *obj) {
SPI_Cmd(spi, DISABLE);
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(spi, &SPI_InitStructure);
SPI_RxFIFOThresholdConfig(spi, SPI_RxFIFOThreshold_QF);
@ -128,8 +128,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
if (ssel == NC) { // Master
obj->mode = SPI_Mode_Master;
obj->nss = SPI_NSS_Soft;
}
else { // Slave
} else { // Slave
pinmap_pinout(ssel, PinMap_SPI_SSEL);
obj->mode = SPI_Mode_Slave;
obj->nss = SPI_NSS_Soft;
@ -147,35 +146,33 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
// Save new values
if (bits == 8) {
obj->bits = SPI_DataSize_8b;
}
else {
} else {
obj->bits = SPI_DataSize_16b;
}
switch (mode) {
case 0:
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_1Edge;
break;
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_1Edge;
break;
case 1:
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_2Edge;
break;
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_2Edge;
break;
case 2:
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_1Edge;
break;
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_1Edge;
break;
default:
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_2Edge;
break;
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_2Edge;
break;
}
if (slave == 0) {
obj->mode = SPI_Mode_Master;
obj->nss = SPI_NSS_Soft;
}
else {
} else {
obj->mode = SPI_Mode_Slave;
obj->nss = SPI_NSS_Hard;
}
@ -184,30 +181,23 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
}
void spi_frequency(spi_t *obj, int hz) {
// Note: The frequencies are obtained with SPI2 clock = 32 MHz (APB1 clock)
// Values depend of PCLK1: 32 MHz if HSI is used, 36 MHz if HSE is used
if (hz < 250000) {
obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz
}
else if ((hz >= 250000) && (hz < 500000)) {
obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz
}
else if ((hz >= 500000) && (hz < 1000000)) {
obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz
}
else if ((hz >= 1000000) && (hz < 2000000)) {
obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz
}
else if ((hz >= 2000000) && (hz < 4000000)) {
obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz
}
else if ((hz >= 4000000) && (hz < 8000000)) {
obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz
}
else if ((hz >= 8000000) && (hz < 16000000)) {
obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz
}
else { // >= 16000000
obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz
obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz - 141 kHz
} else if ((hz >= 250000) && (hz < 500000)) {
obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz - 280 kHz
} else if ((hz >= 500000) && (hz < 1000000)) {
obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz - 560 kHz
} else if ((hz >= 1000000) && (hz < 2000000)) {
obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz - 1.13 MHz
} else if ((hz >= 2000000) && (hz < 4000000)) {
obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz - 2.25 MHz
} else if ((hz >= 4000000) && (hz < 8000000)) {
obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz - 4.5 MHz
} else if ((hz >= 8000000) && (hz < 16000000)) {
obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz - 9 MHz
} else { // >= 16000000
obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz - 18 MHz
}
init_spi(obj);
}
@ -233,8 +223,7 @@ static inline void ssp_write(spi_t *obj, int value) {
while (!ssp_writeable(obj));
if (obj->bits == SPI_DataSize_8b) {
SPI_SendData8(spi, (uint8_t)value);
}
else {
} else {
SPI_I2S_SendData16(spi, (uint16_t)value);
}
}
@ -244,8 +233,7 @@ static inline int ssp_read(spi_t *obj) {
while (!ssp_readable(obj));
if (obj->bits == SPI_DataSize_8b) {
return (int)SPI_ReceiveData8(spi);
}
else {
} else {
return (int)SPI_I2S_ReceiveData16(spi);
}
}
@ -270,8 +258,7 @@ int spi_slave_read(spi_t *obj) {
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
if (obj->bits == SPI_DataSize_8b) {
return (int)SPI_ReceiveData8(spi);
}
else {
} else {
return (int)SPI_I2S_ReceiveData16(spi);
}
}
@ -281,8 +268,7 @@ void spi_slave_write(spi_t *obj, int value) {
while (!ssp_writeable(obj));
if (obj->bits == SPI_DataSize_8b) {
SPI_SendData8(spi, (uint8_t)value);
}
else {
} else {
SPI_I2S_SendData16(spi, (uint16_t)value);
}
}

6
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/us_ticker.c
View File

@ -47,10 +47,10 @@ void us_ticker_init(void) {
// Configure time base
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure);
NVIC_SetVector(TIM_MST_IRQ, (uint32_t)us_ticker_irq_handler);