From a5090fa63623610079e4c893b26af376420cde39 Mon Sep 17 00:00:00 2001 From: bcostm Date: Sat, 22 Mar 2014 15:50:50 +0100 Subject: [PATCH 1/2] [NUCLEO_F302R8] Code formatting --- .../TOOLCHAIN_ARM_STD/startup_stm32f302x8.s | 2 +- .../TARGET_NUCLEO_F302R8/PeripheralNames.h | 2 +- .../TARGET_NUCLEO_F302R8/PinNames.h | 190 +++++++++--------- .../TARGET_NUCLEO_F302R8/analogin_api.c | 148 +++++++------- .../TARGET_NUCLEO_F302R8/analogout_api.c | 9 +- .../TARGET_NUCLEO_F302R8/gpio_api.c | 9 +- .../TARGET_NUCLEO_F302R8/gpio_irq_api.c | 78 ++++--- .../TARGET_NUCLEO_F302R8/gpio_object.h | 3 +- .../TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c | 112 +++++------ .../TARGET_STM/TARGET_NUCLEO_F302R8/objects.h | 4 +- .../TARGET_STM/TARGET_NUCLEO_F302R8/pinmap.c | 8 +- .../TARGET_NUCLEO_F302R8/port_api.c | 16 +- .../TARGET_NUCLEO_F302R8/pwmout_api.c | 102 +++++----- .../TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c | 34 ++-- .../TARGET_NUCLEO_F302R8/serial_api.c | 102 +++++----- .../TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c | 12 +- .../TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c | 124 +++++------- .../TARGET_NUCLEO_F302R8/us_ticker.c | 16 +- 18 files changed, 483 insertions(+), 488 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.s index 174d389aea..c8247ea376 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.s +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.s @@ -1,6 +1,6 @@ ;******************** (C) COPYRIGHT 2014 STMicroelectronics ******************** ;* File Name : startup_stm32f302x8.s -; STM32F302x8 Devices vector table for MDK ARM_MICRO toolchain +; STM32F302x8 Devices vector table for MDK ARM_STD toolchain ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics ; All rights reserved. diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PeripheralNames.h index 0d4991d952..594c682ba4 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PeripheralNames.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PeripheralNames.h @@ -45,7 +45,7 @@ typedef enum { } DACName; typedef enum { - UART_1 = (int)USART1_BASE, + UART_1 = (int)USART1_BASE, UART_2 = (int)USART2_BASE, UART_3 = (int)USART3_BASE } UARTName; diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h index fab170819e..0315fab643 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h @@ -50,113 +50,113 @@ extern "C" { // Low nibble = pin number #define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF) #define STM_PIN(X) ((uint32_t)(X) & 0xF) - + typedef enum { PIN_INPUT, PIN_OUTPUT } PinDirection; typedef enum { - PA_0 = 0x00, - PA_1 = 0x01, - PA_2 = 0x02, - PA_3 = 0x03, - PA_4 = 0x04, - PA_5 = 0x05, - PA_6 = 0x06, - PA_7 = 0x07, - PA_8 = 0x08, - PA_9 = 0x09, - PA_10 = 0x0A, - PA_11 = 0x0B, - PA_12 = 0x0C, - PA_13 = 0x0D, - PA_14 = 0x0E, - PA_15 = 0x0F, + PA_0 = 0x00, + PA_1 = 0x01, + PA_2 = 0x02, + PA_3 = 0x03, + PA_4 = 0x04, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, - PB_0 = 0x10, - PB_1 = 0x11, - PB_2 = 0x12, - PB_3 = 0x13, - PB_4 = 0x14, - PB_5 = 0x15, - PB_6 = 0x16, - PB_7 = 0x17, - PB_8 = 0x18, - PB_9 = 0x19, - PB_10 = 0x1A, - PB_11 = 0x1B, - PB_12 = 0x1C, - PB_13 = 0x1D, - PB_14 = 0x1E, - PB_15 = 0x1F, + PB_0 = 0x10, + PB_1 = 0x11, + PB_2 = 0x12, + PB_3 = 0x13, + PB_4 = 0x14, + PB_5 = 0x15, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_9 = 0x19, + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_15 = 0x1F, - PC_0 = 0x20, - PC_1 = 0x21, - PC_2 = 0x22, - PC_3 = 0x23, - PC_4 = 0x24, - PC_5 = 0x25, - PC_6 = 0x26, - PC_7 = 0x27, - PC_8 = 0x28, - PC_9 = 0x29, - PC_10 = 0x2A, - PC_11 = 0x2B, - PC_12 = 0x2C, - PC_13 = 0x2D, - PC_14 = 0x2E, - PC_15 = 0x2F, + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_7 = 0x27, + PC_8 = 0x28, + PC_9 = 0x29, + PC_10 = 0x2A, + PC_11 = 0x2B, + PC_12 = 0x2C, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, - PD_2 = 0x32, + PD_2 = 0x32, - PF_0 = 0x50, - PF_1 = 0x51, + PF_0 = 0x50, + PF_1 = 0x51, - // Arduino connector namings - A0 = PA_0, - A1 = PA_1, - A2 = PA_4, - A3 = PB_0, - A4 = PC_1, - A5 = PC_0, - D0 = PA_3, - D1 = PA_2, - D2 = PA_10, - D3 = PB_3, - D4 = PB_5, - D5 = PB_4, - D6 = PB_10, - D7 = PA_8, - D8 = PA_9, - D9 = PC_7, - D10 = PB_6, - D11 = PA_7, - D12 = PA_6, - D13 = PA_5, - D14 = PB_9, - D15 = PB_8, + // Arduino connector namings + A0 = PA_0, + A1 = PA_1, + A2 = PA_4, + A3 = PB_0, + A4 = PC_1, + A5 = PC_0, + D0 = PA_3, + D1 = PA_2, + D2 = PA_10, + D3 = PB_3, + D4 = PB_5, + D5 = PB_4, + D6 = PB_10, + D7 = PA_8, + D8 = PA_9, + D9 = PC_7, + D10 = PB_6, + D11 = PA_7, + D12 = PA_6, + D13 = PA_5, + D14 = PB_9, + D15 = PB_8, - // Generic signals namings - LED1 = PA_5, - LED2 = PA_5, - LED3 = PA_5, - LED4 = PA_5, - USER_BUTTON = PC_13, - SERIAL_TX = PA_2, - SERIAL_RX = PA_3, - USBTX = PA_2, - USBRX = PA_3, - I2C_SCL = PB_8, - I2C_SDA = PB_9, - SPI_MOSI = PA_7, - SPI_MISO = PA_6, - SPI_SCK = PA_5, - SPI_CS = PB_6, - PWM_OUT = PB_3, - - // Not connected - NC = (int)0xFFFFFFFF + // Generic signals namings + LED1 = PA_5, + LED2 = PA_5, + LED3 = PA_5, + LED4 = PA_5, + USER_BUTTON = PC_13, + SERIAL_TX = PA_2, + SERIAL_RX = PA_3, + USBTX = PA_2, + USBRX = PA_3, + I2C_SCL = PB_8, + I2C_SDA = PB_9, + SPI_MOSI = PA_7, + SPI_MISO = PA_6, + SPI_SCK = PA_5, + SPI_CS = PB_6, + PWM_OUT = PB_3, + + // Not connected + NC = (int)0xFFFFFFFF } PinName; typedef enum { diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogin_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogin_api.c index c6e200ef8c..1733895d99 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogin_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogin_api.c @@ -56,16 +56,16 @@ static const PinMap PinMap_ADC[] = { int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) { - + ADC_TypeDef *adc; ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; - + // Get the peripheral name from the pin and assign it to the object obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - + if (obj->adc == (ADCName)NC) { - error("ADC pin mapping failed"); + error("ADC pin mapping failed"); } // Configure GPIO @@ -80,7 +80,7 @@ void analogin_init(analogin_t *obj, PinName pin) { // Get ADC registers structure address adc = (ADC_TypeDef *)(obj->adc); - + // Enable ADC clock RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div1); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_ADC12, ENABLE); @@ -90,8 +90,8 @@ void analogin_init(analogin_t *obj, PinName pin) { wait_us(10); ADC_SelectCalibrationMode(adc, ADC_CalibrationMode_Single); ADC_StartCalibration(adc); - while (ADC_GetCalibrationStatus(adc) != RESET ) {} - + while (ADC_GetCalibrationStatus(adc) != RESET) {} + // Configure ADC ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Clock = ADC_Clock_AsynClkMode; @@ -99,7 +99,7 @@ void analogin_init(analogin_t *obj, PinName pin) { ADC_CommonInitStructure.ADC_DMAMode = ADC_DMAMode_OneShot; ADC_CommonInitStructure.ADC_TwoSamplingDelay = 0; ADC_CommonInit(adc, &ADC_CommonInitStructure); - + ADC_InitStructure.ADC_ContinuousConvMode = ADC_ContinuousConvMode_Disable; ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0; @@ -112,83 +112,83 @@ void analogin_init(analogin_t *obj, PinName pin) { // Enable ADC ADC_Cmd(adc, ENABLE); - - while(!ADC_GetFlagStatus(adc, ADC_FLAG_RDY)) {} + + while (!ADC_GetFlagStatus(adc, ADC_FLAG_RDY)) {} } } static inline uint16_t adc_read(analogin_t *obj) { - // Get ADC registers structure address - ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc); - uint8_t channel = 0; - - // Configure ADC channel - switch (obj->pin) { - case PA_0: - channel = ADC_Channel_1; - break; - case PA_1: - channel = ADC_Channel_2; - break; - case PA_2: - channel = ADC_Channel_3; - break; - case PA_3: - channel = ADC_Channel_4; - break; - case PA_4: - channel = ADC_Channel_5; - break; - case PC_0: - channel = ADC_Channel_6; - break; - case PC_1: - channel = ADC_Channel_7; - break; - case PC_2: - channel = ADC_Channel_8; - break; - case PC_3: - channel = ADC_Channel_9; - break; - case PA_6: - channel = ADC_Channel_10; - break; - case PB_0: - channel = ADC_Channel_11; - break; - case PB_1: - channel = ADC_Channel_12; - break; - case PB_13: - channel = ADC_Channel_13; - break; - case PB_11: - channel = ADC_Channel_14; - break; - case PA_7: - channel = ADC_Channel_15; - break; - default: - return 0; - } + // Get ADC registers structure address + ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc); + uint8_t channel = 0; - ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_7Cycles5); - - ADC_StartConversion(adc); // Start conversion - - while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion - - return(ADC_GetConversionValue(adc)); // Get conversion value + // Configure ADC channel + switch (obj->pin) { + case PA_0: + channel = ADC_Channel_1; + break; + case PA_1: + channel = ADC_Channel_2; + break; + case PA_2: + channel = ADC_Channel_3; + break; + case PA_3: + channel = ADC_Channel_4; + break; + case PA_4: + channel = ADC_Channel_5; + break; + case PC_0: + channel = ADC_Channel_6; + break; + case PC_1: + channel = ADC_Channel_7; + break; + case PC_2: + channel = ADC_Channel_8; + break; + case PC_3: + channel = ADC_Channel_9; + break; + case PA_6: + channel = ADC_Channel_10; + break; + case PB_0: + channel = ADC_Channel_11; + break; + case PB_1: + channel = ADC_Channel_12; + break; + case PB_13: + channel = ADC_Channel_13; + break; + case PB_11: + channel = ADC_Channel_14; + break; + case PA_7: + channel = ADC_Channel_15; + break; + default: + return 0; + } + + ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_7Cycles5); + + ADC_StartConversion(adc); // Start conversion + + while (ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion + + return (ADC_GetConversionValue(adc)); // Get conversion value } uint16_t analogin_read_u16(analogin_t *obj) { - return(adc_read(obj)); + return (adc_read(obj)); } float analogin_read(analogin_t *obj) { - uint16_t value = adc_read(obj); - return (float)value * (1.0f / (float)0xFFF); // 12 bits range + uint16_t value = adc_read(obj); + return (float)value * (1.0f / (float)0xFFF); // 12 bits range } #endif diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogout_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogout_api.c index 030c14ed18..cd768bc739 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogout_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/analogout_api.c @@ -63,7 +63,7 @@ void analogout_init(dac_t *obj, PinName pin) { RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE); // Configure and enable DAC channel - DAC_StructInit(&DAC_InitStructure); + DAC_StructInit(&DAC_InitStructure); DAC_Init(dac, DAC_Channel_1, &DAC_InitStructure); DAC_Cmd(dac, DAC_Channel_1, ENABLE); @@ -95,10 +95,9 @@ void analogout_write(dac_t *obj, float value) { void analogout_write_u16(dac_t *obj, uint16_t value) { if (value > (uint16_t)RANGE_12BIT) { - dac_write(obj, (uint16_t)RANGE_12BIT); // Max value - } - else { - dac_write(obj, value); + dac_write(obj, (uint16_t)RANGE_12BIT); // Max value + } else { + dac_write(obj, value); } } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_api.c index 443c99f57b..5686e79d03 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_api.c @@ -33,7 +33,7 @@ extern uint32_t Set_GPIO_Clock(uint32_t port_idx); -uint32_t gpio_set(PinName pin) { +uint32_t gpio_set(PinName pin) { if (pin == NC) return 0; pin_function(pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF)); @@ -45,11 +45,11 @@ void gpio_init(gpio_t *obj, PinName pin) { if (pin == NC) return; uint32_t port_index = STM_PORT(pin); - + // Enable GPIO clock uint32_t gpio_add = Set_GPIO_Clock(port_index); GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add; - + // Fill GPIO object structure for future use obj->pin = pin; obj->mask = gpio_set(pin); @@ -65,8 +65,7 @@ void gpio_mode(gpio_t *obj, PinMode mode) { void gpio_dir(gpio_t *obj, PinDirection direction) { if (direction == PIN_OUTPUT) { pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)); - } - else { // PIN_INPUT + } else { // PIN_INPUT pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF)); } } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_irq_api.c index a6801249dc..626918194c 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_irq_api.c @@ -53,30 +53,47 @@ static void handle_interrupt_in(uint32_t irq_index) { uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]); // Clear interrupt flag - if (EXTI_GetITStatus(channel_pin[irq_index]) != RESET) - { + if (EXTI_GetITStatus(channel_pin[irq_index]) != RESET) { EXTI_ClearITPendingBit(channel_pin[irq_index]); } - + if (channel_ids[irq_index] == 0) return; - + // Check which edge has generated the irq if ((gpio->IDR & pin) == 0) { irq_handler(channel_ids[irq_index], IRQ_FALL); - } - else { + } else { irq_handler(channel_ids[irq_index], IRQ_RISE); } } -// The irq_index is passed to the function -static void gpio_irq0(void) {handle_interrupt_in(0);} // EXTI line 0 -static void gpio_irq1(void) {handle_interrupt_in(1);} // EXTI line 1 -static void gpio_irq2(void) {handle_interrupt_in(2);} // EXTI line 2 -static void gpio_irq3(void) {handle_interrupt_in(3);} // EXTI line 3 -static void gpio_irq4(void) {handle_interrupt_in(4);} // EXTI line 4 -static void gpio_irq5(void) {handle_interrupt_in(5);} // EXTI lines 5 to 9 -static void gpio_irq6(void) {handle_interrupt_in(6);} // EXTI lines 10 to 15 +static void gpio_irq0(void) { + handle_interrupt_in(0); // EXTI line 0 +} + +static void gpio_irq1(void) { + handle_interrupt_in(1); // EXTI line 1 +} + +static void gpio_irq2(void) { + handle_interrupt_in(2); // EXTI line 2 +} + +static void gpio_irq3(void) { + handle_interrupt_in(3); // EXTI line 3 +} + +static void gpio_irq4(void) { + handle_interrupt_in(4); // EXTI line 4 +} + +static void gpio_irq5(void) { + handle_interrupt_in(5); // EXTI lines 5 to 9 +} + +static void gpio_irq6(void) { + handle_interrupt_in(6); // EXTI lines 10 to 15 +} extern uint32_t Set_GPIO_Clock(uint32_t port_idx); @@ -146,18 +163,18 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 // Enable SYSCFG clock RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); - + // Connect EXTI line to pin SYSCFG_EXTILineConfig(port_index, pin_index); // Configure EXTI line - EXTI_InitTypeDef EXTI_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; EXTI_InitStructure.EXTI_Line = pin_index; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); - + // Enable and set EXTI interrupt to the lowest priority NVIC_InitTypeDef NVIC_InitStructure; NVIC_InitStructure.NVIC_IRQChannel = irq_n; @@ -165,7 +182,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); - + NVIC_SetVector(irq_n, vector); NVIC_EnableIRQ(irq_n); @@ -176,9 +193,9 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 channel_ids[irq_index] = id; channel_gpio[irq_index] = gpio_add; channel_pin[irq_index] = pin_index; - - irq_handler = handler; - + + irq_handler = handler; + return 0; } @@ -189,7 +206,7 @@ void gpio_irq_free(gpio_irq_t *obj) { // Disable EXTI line EXTI_InitTypeDef EXTI_InitStructure; EXTI_StructInit(&EXTI_InitStructure); - EXTI_Init(&EXTI_InitStructure); + EXTI_Init(&EXTI_InitStructure); obj->event = EDGE_NONE; } @@ -198,36 +215,33 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { EXTI_InitStructure.EXTI_Line = channel_pin[obj->irq_index]; EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - + if (event == IRQ_RISE) { if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) { EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; obj->event = EDGE_BOTH; - } - else { // NONE or RISE + } else { // NONE or RISE EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; obj->event = EDGE_RISE; } } - + if (event == IRQ_FALL) { if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) { EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; obj->event = EDGE_BOTH; - } - else { // NONE or FALL + } else { // NONE or FALL EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; obj->event = EDGE_FALL; } } - + if (enable) { EXTI_InitStructure.EXTI_LineCmd = ENABLE; - } - else { + } else { EXTI_InitStructure.EXTI_LineCmd = DISABLE; } - + EXTI_Init(&EXTI_InitStructure); } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_object.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_object.h index ac414c2162..46fdf92515 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_object.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/gpio_object.h @@ -50,8 +50,7 @@ typedef struct { static inline void gpio_write(gpio_t *obj, int value) { if (value) { *obj->reg_set = obj->mask; - } - else { + } else { *obj->reg_clr = obj->mask; } } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c index b9bead1146..c6e24a6e91 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c @@ -36,8 +36,8 @@ #include "error.h" /* Timeout values for flags and events waiting loops. These timeouts are - not based on accurate values, they just guarantee that the application will - not remain stuck if the I2C communication is corrupted. */ + not based on accurate values, they just guarantee that the application will + not remain stuck if the I2C communication is corrupted. */ #define FLAG_TIMEOUT ((int)0x1000) #define LONG_TIMEOUT ((int)0x8000) @@ -62,19 +62,19 @@ static const PinMap PinMap_I2C_SCL[] = { {NC, NC, 0} }; -void i2c_init(i2c_t *obj, PinName sda, PinName scl) { +void i2c_init(i2c_t *obj, PinName sda, PinName scl) { // Determine the I2C to use I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl); - + if (obj->i2c == (I2CName)NC) { error("I2C pin mapping failed"); } // Enable I2C clock - if (obj->i2c == I2C_1) { + if (obj->i2c == I2C_1) { RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); } if (obj->i2c == I2C_2) { @@ -83,18 +83,18 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) { if (obj->i2c == I2C_3) { RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C3, ENABLE); } - + // Configure I2C pins pinmap_pinout(scl, PinMap_I2C_SCL); pin_mode(scl, OpenDrain); pinmap_pinout(sda, PinMap_I2C_SDA); pin_mode(sda, OpenDrain); - + // Reset to clear pending flags if any i2c_reset(obj); - + // I2C configuration - i2c_frequency(obj, 100000); // 100 kHz per default + i2c_frequency(obj, 100000); // 100 kHz per default } void i2c_frequency(i2c_t *obj, int hz) { @@ -106,7 +106,7 @@ void i2c_frequency(i2c_t *obj, int hz) { RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // Enable SYSCFG clock SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, DISABLE); SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, DISABLE); - + /* Values calculated with I2C_Timing_Configuration_V1.0.1.xls file (see AN4235) * Standard mode (up to 100 kHz) @@ -120,30 +120,30 @@ void i2c_frequency(i2c_t *obj, int hz) { - Fall time = 10ns */ switch (hz) { - case 100000: - tim = 0x00201D2B; // Standard mode - break; - case 200000: - tim = 0x0010021E; // Fast Mode - break; - case 400000: - tim = 0x0010020A; // Fast Mode - break; - case 1000000: - tim = 0x00100001; // Fast Mode Plus - // Enable the Fast Mode Plus capability - if (obj->i2c == I2C_1) { - SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE); - } - if (obj->i2c == I2C_2) { - SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE); - } - break; - default: - error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported."); - break; + case 100000: + tim = 0x00201D2B; // Standard mode + break; + case 200000: + tim = 0x0010021E; // Fast Mode + break; + case 400000: + tim = 0x0010020A; // Fast Mode + break; + case 1000000: + tim = 0x00100001; // Fast Mode Plus + // Enable the Fast Mode Plus capability + if (obj->i2c == I2C_1) { + SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE); + } + if (obj->i2c == I2C_2) { + SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE); + } + break; + default: + error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported."); + break; } - + // I2C configuration I2C_DeInit(i2c); I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; @@ -154,7 +154,7 @@ void i2c_frequency(i2c_t *obj, int hz) { I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; I2C_InitStructure.I2C_Timing = tim; I2C_Init(i2c, &I2C_InitStructure); - + I2C_Cmd(i2c, ENABLE); } @@ -178,9 +178,9 @@ inline int i2c_start(i2c_t *obj) { inline int i2c_stop(i2c_t *obj) { I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); - + I2C_GenerateSTOP(i2c, ENABLE); - + return 0; } @@ -188,18 +188,18 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); int count; int value; - + if (length == 0) return 0; // Configure slave address, nbytes, reload, end mode and start or stop generation I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Read); - + // Read all bytes for (count = 0; count < length; count++) { value = i2c_byte_read(obj, 0); data[count] = (char)value; } - + return length; } @@ -207,19 +207,19 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); //int timeout; int count; - + if (length == 0) return 0; // [TODO] The stop is always sent even with I2C_SoftEnd_Mode. To be corrected. // Configure slave address, nbytes, reload, end mode and start or stop generation //if (stop) { - I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write); + I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write); //} //else { // I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Write); //} - + // Write all bytes for (count = 0; count < length; count++) { if (i2c_byte_write(obj, data[count]) != 1) { @@ -242,7 +242,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { I2C_ClearFlag(i2c, I2C_ICR_STOPCF); } */ - + return count; } @@ -250,9 +250,9 @@ int i2c_byte_read(i2c_t *obj, int last) { I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); uint8_t data; int timeout; - + // Wait until the byte is received - timeout = FLAG_TIMEOUT; + timeout = FLAG_TIMEOUT; while (I2C_GetFlagStatus(i2c, I2C_ISR_RXNE) == RESET) { timeout--; if (timeout == 0) { @@ -261,7 +261,7 @@ int i2c_byte_read(i2c_t *obj, int last) { } data = I2C_ReceiveData(i2c); - + return (int)data; } @@ -277,14 +277,14 @@ int i2c_byte_write(i2c_t *obj, int data) { return 0; } } - + I2C_SendData(i2c, (uint8_t)data); - + return 1; } void i2c_reset(i2c_t *obj) { - if (obj->i2c == I2C_1) { + if (obj->i2c == I2C_1) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); } @@ -294,7 +294,7 @@ void i2c_reset(i2c_t *obj) { } if (obj->i2c == I2C_3) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE); } } @@ -303,7 +303,7 @@ void i2c_reset(i2c_t *obj) { void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); uint16_t tmpreg; - + // Get the old register value tmpreg = i2c->OAR1; // Reset address bits @@ -326,28 +326,28 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) { int i2c_slave_receive(i2c_t *obj) { // TO BE DONE - return(0); + return (0); } int i2c_slave_read(i2c_t *obj, char *data, int length) { int count = 0; - + // Read all bytes for (count = 0; count < length; count++) { data[count] = i2c_byte_read(obj, 0); } - + return count; } int i2c_slave_write(i2c_t *obj, const char *data, int length) { int count = 0; - + // Write all bytes for (count = 0; count < length; count++) { i2c_byte_write(obj, data[count]); } - + return count; } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/objects.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/objects.h index 5bbd4ed4fc..5b8c7ad918 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/objects.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/objects.h @@ -48,7 +48,7 @@ struct gpio_irq_s { struct port_s { PortName port; uint32_t mask; - PinDirection direction; + PinDirection direction; __IO uint16_t *reg_in; __IO uint16_t *reg_out; }; @@ -69,7 +69,7 @@ struct serial_s { uint32_t baudrate; uint32_t databits; uint32_t stopbits; - uint32_t parity; + uint32_t parity; }; struct spi_s { diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pinmap.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pinmap.c index db8882aa33..889ee7321a 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pinmap.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pinmap.c @@ -86,7 +86,7 @@ void pin_function(PinName pin, int data) { if (afnum != 0xFF) { GPIO_PinAFConfig(gpio, (uint16_t)pin_index, afnum); } - + // Configure GPIO GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index); @@ -95,7 +95,7 @@ void pin_function(PinName pin, int data) { GPIO_InitStructure.GPIO_OType = (GPIOOType_TypeDef)otype; GPIO_InitStructure.GPIO_PuPd = (GPIOPuPd_TypeDef)pupd; GPIO_Init(gpio, &GPIO_InitStructure); - + // [TODO] Disconnect JTAG-DP + SW-DP signals. // Warning: Need to reconnect under reset //if ((pin == PA_13) || (pin == PA_14)) { @@ -103,7 +103,7 @@ void pin_function(PinName pin, int data) { //} //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) { // - //} + //} } /** @@ -124,5 +124,5 @@ void pin_mode(PinName pin, PinMode mode) { if (pupd > 2) pupd = 0; // Open-drain = No pull-up/No pull-down gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2))); gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2)); - + } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/port_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/port_api.c index 7ac6b29095..b257b612d6 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/port_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/port_api.c @@ -39,7 +39,7 @@ extern uint32_t Set_GPIO_Clock(uint32_t port_idx); // high nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...) // low nibble = pin number PinName port_pin(PortName port, int pin_n) { - return (PinName)(pin_n + (port << 4)); + return (PinName)(pin_n + (port << 4)); } void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { @@ -52,9 +52,9 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { // Fill PORT object structure for future use obj->port = port; obj->mask = mask; - obj->direction = dir; + obj->direction = dir; obj->reg_in = &gpio->IDR; - obj->reg_out = &gpio->ODR; + obj->reg_out = &gpio->ODR; port_dir(obj, dir); } @@ -66,16 +66,15 @@ void port_dir(port_t *obj, PinDirection dir) { if (obj->mask & (1 << i)) { // If the pin is used if (dir == PIN_OUTPUT) { pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)); - } - else { // PIN_INPUT + } else { // PIN_INPUT pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF)); } } - } + } } void port_mode(port_t *obj, PinMode mode) { - uint32_t i; + uint32_t i; for (i = 0; i < 16; i++) { // Process all pins if (obj->mask & (1 << i)) { // If the pin is used pin_mode(port_pin(obj->port, i), mode); @@ -90,8 +89,7 @@ void port_write(port_t *obj, int value) { int port_read(port_t *obj) { if (obj->direction == PIN_OUTPUT) { return (*obj->reg_out & obj->mask); - } - else { // PIN_INPUT + } else { // PIN_INPUT return (*obj->reg_in & obj->mask); } } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pwmout_api.c index a7da7b2e7b..1d83cdb6e2 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pwmout_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/pwmout_api.c @@ -35,77 +35,77 @@ // TIM2 cannot be used because already used by the us_ticker static const PinMap PinMap_PWM[] = { - //{PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 - //{PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2 +// {PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 +// {PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2 {PA_1, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1N {PA_2, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1 {PA_3, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH2 - //{PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 +// {PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 {PA_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1 {PA_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1 - //{PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N +// {PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N {PA_8, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1 {PA_9, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2 - //{PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3 +// {PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3 {PA_10, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3 - //{PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4 +// {PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4 {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_11)}, // TIM1_CH4 - //{PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N +// {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N {PA_12, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1 - //{PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N +// {PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N {PA_13, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N - //{PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 - +// {PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1 + {PB_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N {PB_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N - //{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2 +// {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2 {PB_4, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1 {PB_5, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM17_CH1 {PB_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N {PB_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1N {PB_8, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1 {PB_9, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1 - //{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3 - //{PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4 +// {PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3 +// {PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4 {PB_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N {PB_14, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH1 - //{PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N +// {PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH2 - //{PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N - //{PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N - +// {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N +// {PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N + {PC_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH1 {PC_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH2 {PC_2, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH3 {PC_3, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH4 {PC_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH1N - + {PF_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N - + {NC, NC, 0} }; -void pwmout_init(pwmout_t* obj, PinName pin) { +void pwmout_init(pwmout_t* obj, PinName pin) { // Get the peripheral name from the pin and assign it to the object obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM); - + if (obj->pwm == (PWMName)NC) { error("PWM pinout mapping failed"); } - + // Enable TIM clock if (obj->pwm == PWM_1) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); if (obj->pwm == PWM_15) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE); if (obj->pwm == PWM_16) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM16, ENABLE); if (obj->pwm == PWM_17) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM17, ENABLE); - + // Configure GPIO pinmap_pinout(pin, PinMap_PWM); - + obj->pin = pin; obj->period = 0; obj->pulse = 0; - + pwmout_period_us(obj, 20000); // 20 ms per default } @@ -117,33 +117,33 @@ void pwmout_free(pwmout_t* obj) { void pwmout_write(pwmout_t* obj, float value) { TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm); TIM_OCInitTypeDef TIM_OCInitStructure; - + if (value < (float)0.0) { value = (float)0.0; } else if (value > (float)1.0) { value = (float)1.0; } - + obj->pulse = (uint32_t)((float)obj->period * value); - // Configure channels + // Configure channels TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; TIM_OCInitStructure.TIM_Pulse = obj->pulse; TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCPolarity_High; TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset; TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset; - + switch (obj->pin) { // Channels 1 - //case PA_0: +// case PA_0: case PA_2: - //case PA_5: +// case PA_5: case PA_6: case PA_7: case PA_8: case PA_12: - //case PA_15: +// case PA_15: case PB_4: case PB_5: case PB_8: @@ -156,23 +156,23 @@ void pwmout_write(pwmout_t* obj, float value) { break; // Channels 1N case PA_1: - //case PA_7: - //case PA_11: +// case PA_7: +// case PA_11: case PA_13: case PB_6: case PB_7: case PB_13: - //case PB_15: +// case PB_15: case PC_13: TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable); TIM_OC1Init(tim, &TIM_OCInitStructure); break; // Channels 2 - //case PA_1: +// case PA_1: case PA_3: case PA_9: - //case PB_3: +// case PB_3: case PB_15: case PC_1: TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; @@ -180,17 +180,17 @@ void pwmout_write(pwmout_t* obj, float value) { TIM_OC2Init(tim, &TIM_OCInitStructure); break; // Channels 2N - //case PA_12: +// case PA_12: case PB_0: - //case PB_14: +// case PB_14: TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable); TIM_OC2Init(tim, &TIM_OCInitStructure); break; // Channels 3 - //case PA_9: +// case PA_9: case PA_10: - //case PB_10: +// case PB_10: case PC_2: TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable); @@ -199,15 +199,15 @@ void pwmout_write(pwmout_t* obj, float value) { // Channels 3N case PB_1: case PF_0: - //case PB_15: +// case PB_15: TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable); TIM_OC3Init(tim, &TIM_OCInitStructure); break; // Channels 4 - //case PA_10: +// case PA_10: case PA_11: - //case PB_11: +// case PB_11: case PC_3: TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable); @@ -215,7 +215,7 @@ void pwmout_write(pwmout_t* obj, float value) { break; default: return; - } + } } float pwmout_read(pwmout_t* obj) { @@ -239,10 +239,10 @@ void pwmout_period_us(pwmout_t* obj, int us) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; float dc = pwmout_read(obj); - TIM_Cmd(tim, DISABLE); - + TIM_Cmd(tim, DISABLE); + obj->period = us; - + TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); TIM_TimeBaseStructure.TIM_Period = obj->period - 1; TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick @@ -252,14 +252,14 @@ void pwmout_period_us(pwmout_t* obj, int us) { // Set duty cycle again pwmout_write(obj, dc); - + TIM_ARRPreloadConfig(tim, ENABLE); - + // Warning: Main Output must be enabled on TIM1, TIM8, TIM5, TIM6 and TIM17 if ((obj->pwm == PWM_1) || (obj->pwm == PWM_15) || (obj->pwm == PWM_16) || (obj->pwm == PWM_17)) { TIM_CtrlPWMOutputs(tim, ENABLE); } - + TIM_Cmd(tim, ENABLE); } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c index 37602273c1..76720b00f4 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/rtc_api.c @@ -39,27 +39,27 @@ void rtc_init(void) { // Be sure to start correctly RCC_BackupResetCmd(ENABLE); RCC_BackupResetCmd(DISABLE); - + // Note: the LSI is used as RTC source clock // The RTC Clock may vary due to LSI frequency dispersion. RCC_LSICmd(ENABLE); // Enable LSI - + while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) {} // Wait until ready - + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); // Select LSI as RTC Clock Source - - RCC_RTCCLKCmd(ENABLE); // Enable RTC Clock - + + RCC_RTCCLKCmd(ENABLE); // Enable RTC Clock + RTC_WaitForSynchro(); // Wait for RTC registers synchronization uint32_t lsi_freq = 40000; // [TODO] To be measured precisely using a timer input capture RTC_InitTypeDef RTC_InitStructure; RTC_InitStructure.RTC_AsynchPrediv = 127; - RTC_InitStructure.RTC_SynchPrediv = (lsi_freq / 128) - 1; + RTC_InitStructure.RTC_SynchPrediv = (lsi_freq / 128) - 1; RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24; RTC_Init(&RTC_InitStructure); - + rtc_inited = 1; } @@ -93,11 +93,11 @@ time_t rtc_read(void) { RTC_DateTypeDef dateStruct; RTC_TimeTypeDef timeStruct; struct tm timeinfo; - + // Read actual date and time RTC_GetTime(RTC_Format_BIN, &timeStruct); RTC_GetDate(RTC_Format_BIN, &dateStruct); - + // Setup a tm structure based on the RTC timeinfo.tm_wday = dateStruct.RTC_WeekDay; timeinfo.tm_mon = dateStruct.RTC_Month - 1; @@ -106,11 +106,11 @@ time_t rtc_read(void) { timeinfo.tm_hour = timeStruct.RTC_Hours; timeinfo.tm_min = timeStruct.RTC_Minutes; timeinfo.tm_sec = timeStruct.RTC_Seconds; - + // Convert to timestamp time_t t = mktime(&timeinfo); - - return t; + + return t; } void rtc_write(time_t t) { @@ -119,7 +119,7 @@ void rtc_write(time_t t) { // Convert the time into a tm struct tm *timeinfo = localtime(&t); - + // Fill RTC structures dateStruct.RTC_WeekDay = timeinfo->tm_wday; dateStruct.RTC_Month = timeinfo->tm_mon + 1; @@ -129,10 +129,10 @@ void rtc_write(time_t t) { timeStruct.RTC_Minutes = timeinfo->tm_min; timeStruct.RTC_Seconds = timeinfo->tm_sec; timeStruct.RTC_H12 = RTC_HourFormat_24; - + // Change the RTC current date/time - PWR_BackupAccessCmd(ENABLE); // Enable access to RTC + PWR_BackupAccessCmd(ENABLE); // Enable access to RTC RTC_SetDate(RTC_Format_BIN, &dateStruct); - RTC_SetTime(RTC_Format_BIN, &timeStruct); + RTC_SetTime(RTC_Format_BIN, &timeStruct); PWR_BackupAccessCmd(DISABLE); // Disable access to RTC } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/serial_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/serial_api.c index f03797ecbd..b7a8181240 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/serial_api.c @@ -71,7 +71,7 @@ serial_t stdio_uart; static void init_usart(serial_t *obj) { USART_TypeDef *usart = (USART_TypeDef *)(obj->uart); USART_InitTypeDef USART_InitStructure; - + USART_Cmd(usart, DISABLE); USART_InitStructure.USART_BaudRate = obj->baudrate; @@ -81,15 +81,15 @@ static void init_usart(serial_t *obj) { USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(usart, &USART_InitStructure); - + USART_Cmd(usart, ENABLE); } -void serial_init(serial_t *obj, PinName tx, PinName rx) { +void serial_init(serial_t *obj, PinName tx, PinName rx) { // Determine the UART to use UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); - + // Get the peripheral name from the pin and assign it to the object obj->uart = (UARTName)pinmap_merge(uart_tx, uart_rx); @@ -99,15 +99,15 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { // Enable USART clock if (obj->uart == UART_1) { - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); } if (obj->uart == UART_2) { - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); } if (obj->uart == UART_3) { - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); } - + // Configure the UART pins pinmap_pinout(tx, PinMap_UART_TX); pinmap_pinout(rx, PinMap_UART_RX); @@ -118,7 +118,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { obj->baudrate = 9600; obj->databits = USART_WordLength_8b; obj->stopbits = USART_StopBits_1; - obj->parity = USART_Parity_No; + obj->parity = USART_Parity_No; init_usart(obj); @@ -126,13 +126,13 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { if (obj->uart == UART_1) obj->index = 0; if (obj->uart == UART_2) obj->index = 1; if (obj->uart == UART_3) obj->index = 2; - + // For stdio management if (obj->uart == STDIO_UART) { stdio_uart_inited = 1; memcpy(&stdio_uart, obj, sizeof(serial_t)); } - + } void serial_free(serial_t *obj) { @@ -147,29 +147,27 @@ void serial_baud(serial_t *obj, int baudrate) { void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { if (data_bits == 8) { obj->databits = USART_WordLength_8b; - } - else { + } else { obj->databits = USART_WordLength_9b; } switch (parity) { - case ParityOdd: - case ParityForced0: - obj->parity = USART_Parity_Odd; - break; - case ParityEven: - case ParityForced1: - obj->parity = USART_Parity_Even; - break; - default: // ParityNone - obj->parity = USART_Parity_No; - break; + case ParityOdd: + case ParityForced0: + obj->parity = USART_Parity_Odd; + break; + case ParityEven: + case ParityForced1: + obj->parity = USART_Parity_Even; + break; + default: // ParityNone + obj->parity = USART_Parity_No; + break; } - + if (stop_bits == 2) { obj->stopbits = USART_StopBits_2; - } - else { + } else { obj->stopbits = USART_StopBits_1; } @@ -194,9 +192,15 @@ static void uart_irq(USART_TypeDef* usart, int id) { } } -static void uart1_irq(void) {uart_irq((USART_TypeDef*)UART_1, 0);} -static void uart2_irq(void) {uart_irq((USART_TypeDef*)UART_2, 1);} -static void uart3_irq(void) {uart_irq((USART_TypeDef*)UART_3, 2);} +static void uart1_irq(void) { + uart_irq((USART_TypeDef*)UART_1, 0); +} +static void uart2_irq(void) { + uart_irq((USART_TypeDef*)UART_2, 1); +} +static void uart3_irq(void) { + uart_irq((USART_TypeDef*)UART_3, 2); +} void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { irq_handler = handler; @@ -209,50 +213,48 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { USART_TypeDef *usart = (USART_TypeDef *)(obj->uart); if (obj->uart == UART_1) { - irq_n = USART1_IRQn; - vector = (uint32_t)&uart1_irq; + irq_n = USART1_IRQn; + vector = (uint32_t)&uart1_irq; } if (obj->uart == UART_2) { - irq_n = USART2_IRQn; - vector = (uint32_t)&uart2_irq; + irq_n = USART2_IRQn; + vector = (uint32_t)&uart2_irq; } if (obj->uart == UART_3) { - irq_n = USART3_IRQn; - vector = (uint32_t)&uart3_irq; + irq_n = USART3_IRQn; + vector = (uint32_t)&uart3_irq; } if (enable) { - + if (irq == RxIrq) { USART_ITConfig(usart, USART_IT_RXNE, ENABLE); - } - else { // TxIrq + } else { // TxIrq USART_ITConfig(usart, USART_IT_TC, ENABLE); - } - + } + NVIC_SetVector(irq_n, vector); NVIC_EnableIRQ(irq_n); - + } else { // disable - + int all_disabled = 0; - + if (irq == RxIrq) { USART_ITConfig(usart, USART_IT_RXNE, DISABLE); // Check if TxIrq is disabled too if ((usart->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1; - } - else { // TxIrq + } else { // TxIrq USART_ITConfig(usart, USART_IT_TXE, DISABLE); // Check if RxIrq is disabled too - if ((usart->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1; + if ((usart->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1; } - + if (all_disabled) NVIC_DisableIRQ(irq_n); - - } + + } } /****************************************************************************** diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c index 6be6d3acb8..2ce5b2ecf9 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/sleep.c @@ -34,24 +34,22 @@ extern void SetSysClock(void); // MCU SLEEP mode -void sleep(void) -{ +void sleep(void) { // Enable PWR clock - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); // Request to enter SLEEP mode PWR_EnterSleepMode(PWR_SLEEPEntry_WFI); } // MCU STOP mode -void deepsleep(void) -{ +void deepsleep(void) { // Enable PWR clock RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); // Enter Stop Mode - PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); - + PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); + // After wake-up from STOP reconfigure the PLL SetSysClock(); } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c index a2ab72afbf..55ec837546 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c @@ -74,19 +74,19 @@ static void init_spi(spi_t *obj) { SPI_Cmd(spi, DISABLE); - SPI_InitStructure.SPI_Mode = obj->mode; - SPI_InitStructure.SPI_NSS = obj->nss; - SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; - SPI_InitStructure.SPI_DataSize = obj->bits; - SPI_InitStructure.SPI_CPOL = obj->cpol; - SPI_InitStructure.SPI_CPHA = obj->cpha; + SPI_InitStructure.SPI_Mode = obj->mode; + SPI_InitStructure.SPI_NSS = obj->nss; + SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStructure.SPI_DataSize = obj->bits; + SPI_InitStructure.SPI_CPOL = obj->cpol; + SPI_InitStructure.SPI_CPHA = obj->cpha; SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc; - SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; - SPI_InitStructure.SPI_CRCPolynomial = 7; + SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; + SPI_InitStructure.SPI_CRCPolynomial = 7; SPI_Init(spi, &SPI_InitStructure); - SPI_RxFIFOThresholdConfig(spi, SPI_RxFIFOThreshold_QF); - + SPI_RxFIFOThresholdConfig(spi, SPI_RxFIFOThreshold_QF); + SPI_Cmd(spi, ENABLE); } @@ -96,40 +96,39 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO); SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK); SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL); - + SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso); SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel); - + obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl); - + if (obj->spi == (SPIName)NC) { error("SPI pinout mapping failed"); } - + // Enable SPI clock if (obj->spi == SPI_2) { - RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); } if (obj->spi == SPI_3) { - RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE); } - + // Configure the SPI pins pinmap_pinout(mosi, PinMap_SPI_MOSI); pinmap_pinout(miso, PinMap_SPI_MISO); pinmap_pinout(sclk, PinMap_SPI_SCLK); - + // Save new values obj->bits = SPI_DataSize_8b; obj->cpol = SPI_CPOL_Low; obj->cpha = SPI_CPHA_1Edge; obj->br_presc = SPI_BaudRatePrescaler_256; - + if (ssel == NC) { // Master obj->mode = SPI_Mode_Master; obj->nss = SPI_NSS_Soft; - } - else { // Slave + } else { // Slave pinmap_pinout(ssel, PinMap_SPI_SSEL); obj->mode = SPI_Mode_Slave; obj->nss = SPI_NSS_Soft; @@ -143,43 +142,41 @@ void spi_free(spi_t *obj) { SPI_I2S_DeInit(spi); } -void spi_format(spi_t *obj, int bits, int mode, int slave) { +void spi_format(spi_t *obj, int bits, int mode, int slave) { // Save new values if (bits == 8) { obj->bits = SPI_DataSize_8b; - } - else { + } else { obj->bits = SPI_DataSize_16b; } - + switch (mode) { case 0: - obj->cpol = SPI_CPOL_Low; - obj->cpha = SPI_CPHA_1Edge; - break; + obj->cpol = SPI_CPOL_Low; + obj->cpha = SPI_CPHA_1Edge; + break; case 1: - obj->cpol = SPI_CPOL_Low; - obj->cpha = SPI_CPHA_2Edge; - break; + obj->cpol = SPI_CPOL_Low; + obj->cpha = SPI_CPHA_2Edge; + break; case 2: - obj->cpol = SPI_CPOL_High; - obj->cpha = SPI_CPHA_1Edge; - break; + obj->cpol = SPI_CPOL_High; + obj->cpha = SPI_CPHA_1Edge; + break; default: - obj->cpol = SPI_CPOL_High; - obj->cpha = SPI_CPHA_2Edge; - break; + obj->cpol = SPI_CPOL_High; + obj->cpha = SPI_CPHA_2Edge; + break; } - + if (slave == 0) { obj->mode = SPI_Mode_Master; obj->nss = SPI_NSS_Soft; - } - else { + } else { obj->mode = SPI_Mode_Slave; - obj->nss = SPI_NSS_Hard; + obj->nss = SPI_NSS_Hard; } - + init_spi(obj); } @@ -187,26 +184,19 @@ void spi_frequency(spi_t *obj, int hz) { // Note: The frequencies are obtained with SPI2 clock = 32 MHz (APB1 clock) if (hz < 250000) { obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz - } - else if ((hz >= 250000) && (hz < 500000)) { + } else if ((hz >= 250000) && (hz < 500000)) { obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz - } - else if ((hz >= 500000) && (hz < 1000000)) { + } else if ((hz >= 500000) && (hz < 1000000)) { obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz - } - else if ((hz >= 1000000) && (hz < 2000000)) { + } else if ((hz >= 1000000) && (hz < 2000000)) { obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz - } - else if ((hz >= 2000000) && (hz < 4000000)) { + } else if ((hz >= 2000000) && (hz < 4000000)) { obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz - } - else if ((hz >= 4000000) && (hz < 8000000)) { + } else if ((hz >= 4000000) && (hz < 8000000)) { obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz - } - else if ((hz >= 8000000) && (hz < 16000000)) { + } else if ((hz >= 8000000) && (hz < 16000000)) { obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz - } - else { // >= 16000000 + } else { // >= 16000000 obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz } init_spi(obj); @@ -217,7 +207,7 @@ static inline int ssp_readable(spi_t *obj) { SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); // Check if data is received status = ((SPI_I2S_GetFlagStatus(spi, SPI_I2S_FLAG_RXNE) != RESET) ? 1 : 0); - return status; + return status; } static inline int ssp_writeable(spi_t *obj) { @@ -229,23 +219,21 @@ static inline int ssp_writeable(spi_t *obj) { } static inline void ssp_write(spi_t *obj, int value) { - SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); + SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); while (!ssp_writeable(obj)); if (obj->bits == SPI_DataSize_8b) { SPI_SendData8(spi, (uint8_t)value); - } - else { + } else { SPI_I2S_SendData16(spi, (uint16_t)value); } } static inline int ssp_read(spi_t *obj) { - SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); + SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); while (!ssp_readable(obj)); if (obj->bits == SPI_DataSize_8b) { return (int)SPI_ReceiveData8(spi); - } - else { + } else { return (int)SPI_I2S_ReceiveData16(spi); } } @@ -270,19 +258,17 @@ int spi_slave_read(spi_t *obj) { SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); if (obj->bits == SPI_DataSize_8b) { return (int)SPI_ReceiveData8(spi); - } - else { + } else { return (int)SPI_I2S_ReceiveData16(spi); } } void spi_slave_write(spi_t *obj, int value) { - SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); - while (!ssp_writeable(obj)); + SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi); + while (!ssp_writeable(obj)); if (obj->bits == SPI_DataSize_8b) { SPI_SendData8(spi, (uint8_t)value); - } - else { + } else { SPI_I2S_SendData16(spi, (uint16_t)value); } } diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/us_ticker.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/us_ticker.c index 9487baea3d..e2ffaeb3c3 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/us_ticker.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/us_ticker.c @@ -38,24 +38,24 @@ static int us_ticker_inited = 0; void us_ticker_init(void) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; - + if (us_ticker_inited) return; us_ticker_inited = 1; - + // Enable timer clock TIM_MST_RCC; - + // Configure time base TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); - TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF; - TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick + TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF; + TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick TIM_TimeBaseStructure.TIM_ClockDivision = 0; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure); - + NVIC_SetVector(TIM_MST_IRQ, (uint32_t)us_ticker_irq_handler); NVIC_EnableIRQ(TIM_MST_IRQ); - + // Enable timer TIM_Cmd(TIM_MST, ENABLE); } From c675516f517a74cf39e26ffdb020cdc18b24cdb0 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 25 Mar 2014 10:24:44 +0100 Subject: [PATCH 2/2] [NUCLEO_F302R8] Add automatic HSE/HSI clock configuration + change spi default pins The clock configuration is first tried with external 8MHz clock, if fail then tried with 8MHz xtal and finally with HSI. --- .../TARGET_NUCLEO_F302R8/stm32f30x.h | 2 +- .../TARGET_NUCLEO_F302R8/system_stm32f30x.c | 222 +++++++++++++----- .../TARGET_NUCLEO_F302R8/PinNames.h | 6 +- .../TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c | 18 +- 4 files changed, 170 insertions(+), 78 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x.h index 101fd845a5..3ea807e150 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/stm32f30x.h @@ -112,7 +112,7 @@ can define the HSE value in your toolchain compiler preprocessor. */ #if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External xtal in Hz */ #endif /* HSE_VALUE */ /** diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c index c521cbf11d..5dbe51ea75 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c @@ -40,34 +40,22 @@ * value to your own configuration. * * 5. This file configures the system clock as follows: - *============================================================================= - * Supported STM32F30x device *----------------------------------------------------------------------------- - * System Clock source | PLL(HSI) + * System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI + * | (external 8 MHz clock) | (internal 8 MHz) + * | 2- PLL_HSE_XTAL | + * | (external 8 MHz xtal) | *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 64000000 + * SYSCLK(MHz) | 72 | 64 *----------------------------------------------------------------------------- - * HCLK(Hz) | 64000000 + * AHBCLK (MHz) | 72 | 64 *----------------------------------------------------------------------------- - * AHB Prescaler | 1 + * APB1CLK (MHz) | 36 | 32 *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 + * APB2CLK (MHz) | 72 | 64 *----------------------------------------------------------------------------- - * APB1 Prescaler (Max = 36MHz) | 2 (SPI, ...) - *----------------------------------------------------------------------------- - * HSE Frequency(Hz) | 8000000 - *---------------------------------------------------------------------------- - * PLLMUL | 16 - *----------------------------------------------------------------------------- - * PREDIV | 2 - *----------------------------------------------------------------------------- - * USB Clock | DISABLE - *----------------------------------------------------------------------------- - * Flash Latency(WS) | 2 - *----------------------------------------------------------------------------- - * Prefetch Buffer | OFF - *----------------------------------------------------------------------------- - *============================================================================= + * USB capable (48 MHz precise clock) | YES | NO + *----------------------------------------------------------------------------- ****************************************************************************** * @attention * @@ -97,6 +85,7 @@ * ****************************************************************************** */ + /** @addtogroup CMSIS * @{ */ @@ -126,6 +115,7 @@ /** @addtogroup STM32F30x_System_Private_Defines * @{ */ + /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ @@ -139,6 +129,10 @@ * @{ */ +/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */ +#define USE_PLL_HSE_EXTC (1) /* Use external clock */ +#define USE_PLL_HSE_XTAL (1) /* Use external xtal */ + /** * @} */ @@ -147,9 +141,9 @@ * @{ */ - uint32_t SystemCoreClock = 64000000; +uint32_t SystemCoreClock = 64000000; /* Default with HSI. Will be updated if HSE is used */ - __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; /** * @} @@ -161,6 +155,12 @@ void SetSysClock(void); +#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0) +uint8_t SetSysClock_PLL_HSE(uint8_t bypass); +#endif + +uint8_t SetSysClock_PLL_HSI(void); + /** * @} */ @@ -208,31 +208,16 @@ void SystemInit(void) /* Disable all interrupts */ RCC->CIR = 0x00000000; - /* Configure the System clock source, PLL Multiplier and Divider factors, - AHB/APBx prescalers and Flash settings ----------------------------------*/ - SetSysClock(); - + /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ #endif - // ADDED FOR MBED DEBUGGING PURPOSE - /* - // Enable GPIOA clock - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); - // Configure MCO pin (PA8) - GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - // Select the clock to output - RCC_MCOConfig(RCC_MCOSource_SYSCLK, RCC_MCOPrescaler_1); - */ + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings */ + SetSysClock(); } /** @@ -325,31 +310,137 @@ void SystemCoreClockUpdate (void) */ void SetSysClock(void) { + /* 1- Try to start with HSE and external clock */ +#if USE_PLL_HSE_EXTC != 0 + if (SetSysClock_PLL_HSE(1) == 0) +#endif + { + /* 2- If fail try to start with HSE and external xtal */ + #if USE_PLL_HSE_XTAL != 0 + if (SetSysClock_PLL_HSE(0) == 0) + #endif + { + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == 0) + { + while(1) + { + // [TODO] Put something here to tell the user that a problem occured... + } + } + } + } + + /* Update SystemCoreClock variable */ + SystemCoreClockUpdate(); + + /* Output SYSCLK on MCO pin(PA8) for debugging purpose */ + /* + // Enable GPIOA clock + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); + // Configure MCO pin (PA8) + GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + // Select the clock to output + RCC_MCOConfig(RCC_MCOSource_SYSCLK, RCC_MCOPrescaler_1); + */ +} + +#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0) +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSE(uint8_t bypass) +{ + __IO uint32_t StartUpCounter = 0; + __IO uint32_t HSEStatus = 0; + + /* Bypass HSE: can be done only if HSE is OFF */ + if (bypass != 0) + { + RCC->CR &= ((uint32_t)~RCC_CR_HSEON); /* To be sure HSE is OFF */ + RCC->CR |= ((uint32_t)RCC_CR_HSEBYP); + } + + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + /* Check if HSE has started correctly */ + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + /* Enable prefetch buffer and set flash latency + 0WS for 0 < SYSCLK <= 24 MHz + 1WS for 24 < SYSCLK <= 48 MHz + 2WS for 48 < SYSCLK <= 72 MHz */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; /* 2 WS */ + + /* Warning: values are obtained with external xtal or clock = 8 MHz */ + /* SYSCLK = 72 MHz (8 MHz * 9) */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9 + | RCC_CFGR_HPRE_DIV1 /* HCLK = 72 MHz */ + | RCC_CFGR_PPRE2_DIV1 /* PCLK2 = 72 MHz */ + | RCC_CFGR_PPRE1_DIV2); /* PCLK1 = 36 MHz */ + /* USBCLK = 48 MHz (72 MHz / 1.5) --> USB OK */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + + return 1; // OK + } + else + { + return 0; // FAIL + } +} +#endif + /******************************************************************************/ /* PLL (clocked by HSI) used as System clock source */ /******************************************************************************/ - +uint8_t SetSysClock_PLL_HSI(void) +{ /* At this stage the HSI is already enabled and used as System clock source */ - /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/ - - /* Disable Prefetch Buffer and set Flash Latency */ - FLASH->ACR = (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = 64 MHz */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = 64 MHz */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = 32 MHz (SPI, ...) */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - - /* PLL configuration - SYSCLK = 4 MHz * 16 = 64 MHz - */ + /* Enable prefetch buffer and set flash latency + 0WS for 0 < SYSCLK <= 24 MHz + 1WS for 24 < SYSCLK <= 48 MHz + 2WS for 48 < SYSCLK <= 72 MHz */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; /* 2 WS */ + + /* SYSCLK = 64 MHz (8 MHz / 2 * 16) */ RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL16); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL16 + | RCC_CFGR_HPRE_DIV1 /* HCLK = 64 MHz */ + | RCC_CFGR_PPRE2_DIV1 /* PCLK2 = 64 MHz */ + | RCC_CFGR_PPRE1_DIV2); /* PCLK1 = 32 MHz */ + /* USBCLK = 42.667 MHz (64 MHz / 1.5) --> USB NOT POSSIBLE */ /* Enable PLL */ RCC->CR |= RCC_CR_PLLON; @@ -367,6 +458,8 @@ void SetSysClock(void) while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) { } + + return 1; // OK } /** @@ -382,4 +475,3 @@ void SetSysClock(void) */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h index 0315fab643..2b2e346ede 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/PinNames.h @@ -149,9 +149,9 @@ typedef enum { USBRX = PA_3, I2C_SCL = PB_8, I2C_SDA = PB_9, - SPI_MOSI = PA_7, - SPI_MISO = PA_6, - SPI_SCK = PA_5, + SPI_MOSI = PB_15, + SPI_MISO = PB_14, + SPI_SCK = PB_13, SPI_CS = PB_6, PWM_OUT = PB_3, diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c index 55ec837546..67d890ccbe 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/spi_api.c @@ -181,23 +181,23 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) { } void spi_frequency(spi_t *obj, int hz) { - // Note: The frequencies are obtained with SPI2 clock = 32 MHz (APB1 clock) + // Values depend of PCLK1: 32 MHz if HSI is used, 36 MHz if HSE is used if (hz < 250000) { - obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz + obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz - 141 kHz } else if ((hz >= 250000) && (hz < 500000)) { - obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz + obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz - 280 kHz } else if ((hz >= 500000) && (hz < 1000000)) { - obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz + obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz - 560 kHz } else if ((hz >= 1000000) && (hz < 2000000)) { - obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz + obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz - 1.13 MHz } else if ((hz >= 2000000) && (hz < 4000000)) { - obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz + obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz - 2.25 MHz } else if ((hz >= 4000000) && (hz < 8000000)) { - obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz + obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz - 4.5 MHz } else if ((hz >= 8000000) && (hz < 16000000)) { - obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz + obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz - 9 MHz } else { // >= 16000000 - obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz + obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz - 18 MHz } init_spi(obj); }