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NUCLEO_F103RB: update channels management in analogin api

pull/118/head
bcostm 2013-11-27 15:39:57 +01:00
parent dd292a7e71
commit 1159845529
2 changed files with 62 additions and 32 deletions
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59
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/analogin_api.c
View File

@ -29,12 +29,14 @@ static const PinMap PinMap_ADC[] = {
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PB_0, ADC_2, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PC_1, ADC_2, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PC_0, ADC_2, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
{NC, NC, 0}
};
int adc_inited = 0;
void analogin_init(analogin_t *obj, PinName pin) {
ADC_TypeDef *adc;
@ -47,15 +49,22 @@ void analogin_init(analogin_t *obj, PinName pin) {
error("ADC pin mapping failed");
}
// Configure GPIO
pinmap_pinout(pin, PinMap_ADC);
// Save pin number for the read function
obj->pin = pin;
// The ADC initialization is done once
if (adc_inited == 0) {
adc_inited = 1;
// Get ADC registers structure address
adc = (ADC_TypeDef *)(obj->adc);
// Enable ADC clock
RCC_ADCCLKConfig(RCC_PCLK2_Div4);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE);
// Configure GPIO
pinmap_pinout(pin, PinMap_ADC);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
// Configure ADC
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
@ -66,14 +75,6 @@ void analogin_init(analogin_t *obj, PinName pin) {
ADC_InitStructure.ADC_NbrOfChannel = 1;
ADC_Init(adc, &ADC_InitStructure);
// Configure ADC channel
if (pin == PA_0) { ADC_RegularChannelConfig(adc, ADC_Channel_0, 1, ADC_SampleTime_7Cycles5); }
if (pin == PA_1) { ADC_RegularChannelConfig(adc, ADC_Channel_1, 1, ADC_SampleTime_7Cycles5); }
if (pin == PA_4) { ADC_RegularChannelConfig(adc, ADC_Channel_4, 1, ADC_SampleTime_7Cycles5); }
if (pin == PB_0) { ADC_RegularChannelConfig(adc, ADC_Channel_8, 1, ADC_SampleTime_7Cycles5); }
if (pin == PC_1) { ADC_RegularChannelConfig(adc, ADC_Channel_11, 1, ADC_SampleTime_7Cycles5); }
if (pin == PC_0) { ADC_RegularChannelConfig(adc, ADC_Channel_10, 1, ADC_SampleTime_7Cycles5); }
// Enable ADC
ADC_Cmd(adc, ENABLE);
@ -82,13 +83,41 @@ void analogin_init(analogin_t *obj, PinName pin) {
while(ADC_GetResetCalibrationStatus(adc));
ADC_StartCalibration(adc);
while(ADC_GetCalibrationStatus(adc));
}
}
static inline uint16_t adc_read(analogin_t *obj) {
// Get ADC registers structure address
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
// Configure ADC channel
switch (obj->pin) {
case PA_0:
ADC_RegularChannelConfig(adc, ADC_Channel_0, 1, ADC_SampleTime_7Cycles5);
break;
case PA_1:
ADC_RegularChannelConfig(adc, ADC_Channel_1, 1, ADC_SampleTime_7Cycles5);
break;
case PA_4:
ADC_RegularChannelConfig(adc, ADC_Channel_4, 1, ADC_SampleTime_7Cycles5);
break;
case PB_0:
ADC_RegularChannelConfig(adc, ADC_Channel_8, 1, ADC_SampleTime_7Cycles5);
break;
case PC_1:
ADC_RegularChannelConfig(adc, ADC_Channel_11, 1, ADC_SampleTime_7Cycles5);
break;
case PC_0:
ADC_RegularChannelConfig(adc, ADC_Channel_10, 1, ADC_SampleTime_7Cycles5);
break;
default:
return 0;
}
ADC_SoftwareStartConvCmd(adc, ENABLE); // Start conversion
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
return(ADC_GetConversionValue(adc)); // Get conversion value
}

1
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/objects.h
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@ -41,6 +41,7 @@ struct port_s {
struct analogin_s {
ADCName adc;
PinName pin;
};
struct serial_s {