mirror of https://github.com/ARMmbed/mbed-os.git
284 lines
5.7 KiB
C
284 lines
5.7 KiB
C
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/*
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* mbed Microcontroller Library
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* Copyright (c) 2017-2018 Future Electronics
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* Copyright (c) 2019 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#include "PinNames.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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#if defined(SCB0_BASE) && (SCB0_UART == 1)
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UART_0 = (int)SCB0_BASE,
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#endif
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#if defined(SCB1_BASE) && (SCB1_UART == 1)
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UART_1 = (int)SCB1_BASE,
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#endif
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#if defined(SCB2_BASE) && (SCB2_UART == 1)
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UART_2 = (int)SCB2_BASE,
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#endif
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#if defined(SCB3_BASE) && (SCB3_UART == 1)
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UART_3 = (int)SCB3_BASE,
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#endif
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#if defined(SCB4_BASE) && (SCB4_UART == 1)
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UART_4 = (int)SCB4_BASE,
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#endif
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#if defined(SCB5_BASE) && (SCB5_UART == 1)
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UART_5 = (int)SCB5_BASE,
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#endif
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#if defined(SCB6_BASE) && (SCB6_UART == 1)
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UART_6 = (int)SCB6_BASE,
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#endif
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#if defined(SCB7_BASE) && (SCB7_UART == 1)
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UART_7 = (int)SCB7_BASE,
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#endif
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#if defined(SCB8_BASE) && (SCB8_UART == 1)
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UART_8 = (int)SCB8_BASE,
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#endif
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#if defined(SCB9_BASE) && (SCB9_UART == 1)
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UART_9 = (int)SCB9_BASE,
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#endif
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#if defined(SCB10_BASE) && (SCB10_UART == 1)
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UART_10 = (int)SCB10_BASE,
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#endif
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#if defined(SCB11_BASE) && (SCB11_UART == 1)
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UART_11 = (int)SCB11_BASE,
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#endif
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#if defined(SCB12_BASE) && (SCB12_UART == 1)
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UART_12 = (int)SCB12_BASE,
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#endif
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} UARTName;
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#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
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typedef enum {
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#if defined(SCB0_BASE) && (SCB0_SPI == 1)
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SPI_0 = (int)SCB0_BASE,
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#endif
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#if defined(SCB1_BASE) && (SCB1_SPI == 1)
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SPI_1 = (int)SCB1_BASE,
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#endif
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#if defined(SCB2_BASE) && (SCB2_SPI == 1)
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SPI_2 = (int)SCB2_BASE,
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#endif
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#if defined(SCB3_BASE) && (SCB3_SPI == 1)
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SPI_3 = (int)SCB3_BASE,
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#endif
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#if defined(SCB4_BASE) && (SCB4_SPI == 1)
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SPI_4 = (int)SCB4_BASE,
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#endif
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#if defined(SCB5_BASE) && (SCB5_SPI == 1)
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SPI_5 = (int)SCB5_BASE,
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#endif
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#if defined(SCB6_BASE) && (SCB6_SPI == 1)
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SPI_6 = (int)SCB6_BASE,
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#endif
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#if defined(SCB7_BASE) && (SCB7_SPI == 1)
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SPI_7 = (int)SCB7_BASE,
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#endif
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#if defined(SCB8_BASE) && (SCB8_SPI == 1)
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SPI_8 = (int)SCB8_BASE,
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#endif
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#if defined(SCB9_BASE) && (SCB9_SPI == 1)
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SPI_9 = (int)SCB9_BASE,
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#endif
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#if defined(SCB10_BASE) && (SCB10_SPI == 1)
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SPI_10 = (int)SCB10_BASE,
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#endif
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#if defined(SCB11_BASE) && (SCB11_SPI == 1)
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SPI_11 = (int)SCB11_BASE,
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#endif
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#if defined(SCB12_BASE) && (SCB12_SPI == 1)
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SPI_12 = (int)SCB12_BASE,
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#endif
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} SPIName;
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typedef enum {
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#if defined(SCB0_BASE) && (SCB0_I2C == 1)
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I2C_0 = (int)SCB0_BASE,
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#endif
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#if defined(SCB1_BASE) && (SCB1_I2C == 1)
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I2C_1 = (int)SCB1_BASE,
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#endif
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#if defined(SCB2_BASE) && (SCB2_I2C == 1)
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I2C_2 = (int)SCB2_BASE,
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#endif
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#if defined(SCB3_BASE) && (SCB3_I2C == 1)
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I2C_3 = (int)SCB3_BASE,
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#endif
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#if defined(SCB4_BASE) && (SCB4_I2C == 1)
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I2C_4 = (int)SCB4_BASE,
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#endif
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#if defined(SCB5_BASE) && (SCB5_I2C == 1)
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I2C_5 = (int)SCB5_BASE,
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#endif
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#if defined(SCB6_BASE) && (SCB6_I2C == 1)
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I2C_6 = (int)SCB6_BASE,
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#endif
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#if defined(SCB7_BASE) && (SCB7_I2C == 1)
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I2C_7 = (int)SCB7_BASE,
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#endif
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#if defined(SCB8_BASE) && (SCB8_I2C == 1)
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I2C_8 = (int)SCB8_BASE,
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#endif
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#if defined(SCB9_BASE) && (SCB9_I2C == 1)
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I2C_9 = (int)SCB9_BASE,
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#endif
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#if defined(SCB10_BASE) && (SCB10_I2C == 1)
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I2C_10 = (int)SCB10_BASE,
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#endif
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#if defined(SCB11_BASE) && (SCB11_I2C == 1)
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I2C_11 = (int)SCB11_BASE,
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#endif
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#if defined(SCB12_BASE) && (SCB12_I2C == 1)
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I2C_12 = (int)SCB12_BASE,
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#endif
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} I2CName;
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typedef enum {
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#ifdef TCPWM0_BASE
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#ifdef TCPWM0_CNT0
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PWM_32b_0 = TCPWM0_BASE,
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#endif
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#ifdef TCPWM0_CNT1
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PWM_32b_1,
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#endif
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#ifdef TCPWM0_CNT2
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PWM_32b_2,
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#endif
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#ifdef TCPWM0_CNT3
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PWM_32b_3,
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#endif
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#ifdef TCPWM0_CNT4
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PWM_32b_4,
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#endif
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#ifdef TCPWM0_CNT5
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PWM_32b_5,
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#endif
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#ifdef TCPWM0_CNT6
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PWM_32b_6,
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#endif
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#ifdef TCPWM0_CNT7
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PWM_32b_7,
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#endif
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#endif
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#ifdef TCPWM1_BASE
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#ifdef TCPWM1_CNT0
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PWM_16b_0 = TCPWM1_BASE,
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#endif
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#ifdef TCPWM1_CNT1
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PWM_16b_1,
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#endif
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#ifdef TCPWM1_CNT2
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PWM_16b_2,
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#endif
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#ifdef TCPWM1_CNT3
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PWM_16b_3,
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#endif
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#ifdef TCPWM1_CNT4
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PWM_16b_4,
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#endif
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#ifdef TCPWM1_CNT5
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PWM_16b_5,
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#endif
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#ifdef TCPWM1_CNT6
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PWM_16b_6,
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#endif
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#ifdef TCPWM1_CNT7
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PWM_16b_7,
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#endif
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#ifdef TCPWM1_CNT8
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PWM_16b_8,
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#endif
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#ifdef TCPWM1_CNT9
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PWM_16b_9,
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#endif
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#ifdef TCPWM1_CNT10
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PWM_16b_10,
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#endif
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#ifdef TCPWM1_CNT11
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PWM_16b_11,
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#endif
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#ifdef TCPWM1_CNT12
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PWM_16b_12,
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#endif
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#ifdef TCPWM1_CNT13
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PWM_16b_13,
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#endif
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#ifdef TCPWM1_CNT14
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PWM_16b_14,
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#endif
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#ifdef TCPWM1_CNT15
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PWM_16b_15,
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#endif
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#ifdef TCPWM1_CNT16
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PWM_16b_16,
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#endif
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#ifdef TCPWM1_CNT17
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PWM_16b_17,
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#endif
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#ifdef TCPWM1_CNT18
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PWM_16b_18,
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#endif
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#ifdef TCPWM1_CNT19
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PWM_16b_19,
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#endif
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#ifdef TCPWM1_CNT20
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PWM_16b_20,
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#endif
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#ifdef TCPWM1_CNT21
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PWM_16b_21,
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#endif
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#ifdef TCPWM1_CNT22
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PWM_16b_22,
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#endif
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#ifdef TCPWM1_CNT23
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PWM_16b_23,
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#endif
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#endif
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} PWMName;
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#ifdef SAR_BASE
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typedef enum {
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ADC_0 = (int)SAR_BASE,
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} ADCName;
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#endif
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#ifdef CTDAC0_BASE
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typedef enum {
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DAC_0 = (int)CTDAC0_BASE,
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} DACName;
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#endif
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#ifdef SMIF0_BASE
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typedef enum {
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QSPI_0 = (int)SMIF0_BASE,
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} SMIFName;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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