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Standardize target pin defines in cybsp_types.h. Make PinNames.h/PeripheralNames.h use standard defines

pull/11884/head
Ryan Morse 2019-11-19 07:34:45 -08:00
parent 38719908d1
commit 7fd78bc988
29 changed files with 1016 additions and 1772 deletions
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283
targets/TARGET_Cypress/TARGET_PSOC6/PeripheralNames.h Normal file
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@ -0,0 +1,283 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
#if defined(SCB0_BASE) && (SCB0_UART == 1)
UART_0 = (int)SCB0_BASE,
#endif
#if defined(SCB1_BASE) && (SCB1_UART == 1)
UART_1 = (int)SCB1_BASE,
#endif
#if defined(SCB2_BASE) && (SCB2_UART == 1)
UART_2 = (int)SCB2_BASE,
#endif
#if defined(SCB3_BASE) && (SCB3_UART == 1)
UART_3 = (int)SCB3_BASE,
#endif
#if defined(SCB4_BASE) && (SCB4_UART == 1)
UART_4 = (int)SCB4_BASE,
#endif
#if defined(SCB5_BASE) && (SCB5_UART == 1)
UART_5 = (int)SCB5_BASE,
#endif
#if defined(SCB6_BASE) && (SCB6_UART == 1)
UART_6 = (int)SCB6_BASE,
#endif
#if defined(SCB7_BASE) && (SCB7_UART == 1)
UART_7 = (int)SCB7_BASE,
#endif
#if defined(SCB8_BASE) && (SCB8_UART == 1)
UART_8 = (int)SCB8_BASE,
#endif
#if defined(SCB9_BASE) && (SCB9_UART == 1)
UART_9 = (int)SCB9_BASE,
#endif
#if defined(SCB10_BASE) && (SCB10_UART == 1)
UART_10 = (int)SCB10_BASE,
#endif
#if defined(SCB11_BASE) && (SCB11_UART == 1)
UART_11 = (int)SCB11_BASE,
#endif
#if defined(SCB12_BASE) && (SCB12_UART == 1)
UART_12 = (int)SCB12_BASE,
#endif
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
#if defined(SCB0_BASE) && (SCB0_SPI == 1)
SPI_0 = (int)SCB0_BASE,
#endif
#if defined(SCB1_BASE) && (SCB1_SPI == 1)
SPI_1 = (int)SCB1_BASE,
#endif
#if defined(SCB2_BASE) && (SCB2_SPI == 1)
SPI_2 = (int)SCB2_BASE,
#endif
#if defined(SCB3_BASE) && (SCB3_SPI == 1)
SPI_3 = (int)SCB3_BASE,
#endif
#if defined(SCB4_BASE) && (SCB4_SPI == 1)
SPI_4 = (int)SCB4_BASE,
#endif
#if defined(SCB5_BASE) && (SCB5_SPI == 1)
SPI_5 = (int)SCB5_BASE,
#endif
#if defined(SCB6_BASE) && (SCB6_SPI == 1)
SPI_6 = (int)SCB6_BASE,
#endif
#if defined(SCB7_BASE) && (SCB7_SPI == 1)
SPI_7 = (int)SCB7_BASE,
#endif
#if defined(SCB8_BASE) && (SCB8_SPI == 1)
SPI_8 = (int)SCB8_BASE,
#endif
#if defined(SCB9_BASE) && (SCB9_SPI == 1)
SPI_9 = (int)SCB9_BASE,
#endif
#if defined(SCB10_BASE) && (SCB10_SPI == 1)
SPI_10 = (int)SCB10_BASE,
#endif
#if defined(SCB11_BASE) && (SCB11_SPI == 1)
SPI_11 = (int)SCB11_BASE,
#endif
#if defined(SCB12_BASE) && (SCB12_SPI == 1)
SPI_12 = (int)SCB12_BASE,
#endif
} SPIName;
typedef enum {
#if defined(SCB0_BASE) && (SCB0_I2C == 1)
I2C_0 = (int)SCB0_BASE,
#endif
#if defined(SCB1_BASE) && (SCB1_I2C == 1)
I2C_1 = (int)SCB1_BASE,
#endif
#if defined(SCB2_BASE) && (SCB2_I2C == 1)
I2C_2 = (int)SCB2_BASE,
#endif
#if defined(SCB3_BASE) && (SCB3_I2C == 1)
I2C_3 = (int)SCB3_BASE,
#endif
#if defined(SCB4_BASE) && (SCB4_I2C == 1)
I2C_4 = (int)SCB4_BASE,
#endif
#if defined(SCB5_BASE) && (SCB5_I2C == 1)
I2C_5 = (int)SCB5_BASE,
#endif
#if defined(SCB6_BASE) && (SCB6_I2C == 1)
I2C_6 = (int)SCB6_BASE,
#endif
#if defined(SCB7_BASE) && (SCB7_I2C == 1)
I2C_7 = (int)SCB7_BASE,
#endif
#if defined(SCB8_BASE) && (SCB8_I2C == 1)
I2C_8 = (int)SCB8_BASE,
#endif
#if defined(SCB9_BASE) && (SCB9_I2C == 1)
I2C_9 = (int)SCB9_BASE,
#endif
#if defined(SCB10_BASE) && (SCB10_I2C == 1)
I2C_10 = (int)SCB10_BASE,
#endif
#if defined(SCB11_BASE) && (SCB11_I2C == 1)
I2C_11 = (int)SCB11_BASE,
#endif
#if defined(SCB12_BASE) && (SCB12_I2C == 1)
I2C_12 = (int)SCB12_BASE,
#endif
} I2CName;
typedef enum {
#ifdef TCPWM0_BASE
#ifdef TCPWM0_CNT0
PWM_32b_0 = TCPWM0_BASE,
#endif
#ifdef TCPWM0_CNT1
PWM_32b_1,
#endif
#ifdef TCPWM0_CNT2
PWM_32b_2,
#endif
#ifdef TCPWM0_CNT3
PWM_32b_3,
#endif
#ifdef TCPWM0_CNT4
PWM_32b_4,
#endif
#ifdef TCPWM0_CNT5
PWM_32b_5,
#endif
#ifdef TCPWM0_CNT6
PWM_32b_6,
#endif
#ifdef TCPWM0_CNT7
PWM_32b_7,
#endif
#endif
#ifdef TCPWM1_BASE
#ifdef TCPWM1_CNT0
PWM_16b_0 = TCPWM1_BASE,
#endif
#ifdef TCPWM1_CNT1
PWM_16b_1,
#endif
#ifdef TCPWM1_CNT2
PWM_16b_2,
#endif
#ifdef TCPWM1_CNT3
PWM_16b_3,
#endif
#ifdef TCPWM1_CNT4
PWM_16b_4,
#endif
#ifdef TCPWM1_CNT5
PWM_16b_5,
#endif
#ifdef TCPWM1_CNT6
PWM_16b_6,
#endif
#ifdef TCPWM1_CNT7
PWM_16b_7,
#endif
#ifdef TCPWM1_CNT8
PWM_16b_8,
#endif
#ifdef TCPWM1_CNT9
PWM_16b_9,
#endif
#ifdef TCPWM1_CNT10
PWM_16b_10,
#endif
#ifdef TCPWM1_CNT11
PWM_16b_11,
#endif
#ifdef TCPWM1_CNT12
PWM_16b_12,
#endif
#ifdef TCPWM1_CNT13
PWM_16b_13,
#endif
#ifdef TCPWM1_CNT14
PWM_16b_14,
#endif
#ifdef TCPWM1_CNT15
PWM_16b_15,
#endif
#ifdef TCPWM1_CNT16
PWM_16b_16,
#endif
#ifdef TCPWM1_CNT17
PWM_16b_17,
#endif
#ifdef TCPWM1_CNT18
PWM_16b_18,
#endif
#ifdef TCPWM1_CNT19
PWM_16b_19,
#endif
#ifdef TCPWM1_CNT20
PWM_16b_20,
#endif
#ifdef TCPWM1_CNT21
PWM_16b_21,
#endif
#ifdef TCPWM1_CNT22
PWM_16b_22,
#endif
#ifdef TCPWM1_CNT23
PWM_16b_23,
#endif
#endif
} PWMName;
#ifdef SAR_BASE
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
#endif
#ifdef CTDAC0_BASE
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
#endif
#ifdef SMIF0_BASE
typedef enum {
QSPI_0 = (int)SMIF0_BASE,
} SMIFName;
#endif
#ifdef __cplusplus
}
#endif
#endif

208
targets/TARGET_Cypress/TARGET_PSOC6/PinNames.h Normal file
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@ -0,0 +1,208 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
#include "cybsp_types.h"
// I2C
#ifdef CYBSP_I2C_SCL
#define I2C_SCL CYBSP_I2C_SCL
#endif
#ifdef CYBSP_I2C_SDA
#define I2C_SDA CYBSP_I2C_SDA
#endif
// SPI
#ifdef CYBSP_SPI_MOSI
#define SPI_MOSI CYBSP_SPI_MOSI
#endif
#ifdef CYBSP_SPI_MISO
#define SPI_MISO CYBSP_SPI_MISO
#endif
#ifdef CYBSP_SPI_CLK
#define SPI_CLK CYBSP_SPI_CLK
#endif
#ifdef CYBSP_SPI_CS
#define SPI_CS CYBSP_SPI_CS
#endif
// UART
#ifdef CYBSP_DEBUG_UART_RX
#define UART_RX CYBSP_DEBUG_UART_RX
#define STDIO_UART_RX CYBSP_DEBUG_UART_RX
#define USBRX CYBSP_DEBUG_UART_RX
#endif
#ifdef CYBSP_DEBUG_UART_TX
#define UART_TX CYBSP_DEBUG_UART_TX
#define STDIO_UART_TX CYBSP_DEBUG_UART_TX
#define USBTX CYBSP_DEBUG_UART_TX
#endif
#ifdef CYBSP_DEBUG_UART_RTS
#define UART_RTS CYBSP_DEBUG_UART_RTS
#define STDIO_UART_RTS CYBSP_DEBUG_UART_RTS
#define USBRTS CYBSP_DEBUG_UART_RTS
#endif
#ifdef CYBSP_DEBUG_UART_CTS
#define UART_CTS CYBSP_DEBUG_UART_CTS
#define STDIO_UART_CTS CYBSP_DEBUG_UART_CTS
#define USBCTS CYBSP_DEBUG_UART_CTS
#endif
// LEDs
#ifdef CYBSP_USER_LED1
#define LED1 CYBSP_USER_LED1
#else
#define LED1 NC
#endif
#ifdef CYBSP_USER_LED2
#define LED2 CYBSP_USER_LED2
#else
#define LED2 NC
#endif
#ifdef CYBSP_USER_LED3
#define LED3 CYBSP_USER_LED3
#else
#define LED3 NC
#endif
#ifdef CYBSP_USER_LED4
#define LED4 CYBSP_USER_LED4
#else
#define LED4 NC
#endif
#ifdef CYBSP_USER_LED5
#define LED5 CYBSP_USER_LED5
#else
#define LED5 NC
#endif
#ifdef CYBSP_LED_RGB_RED
#define LED_RED CYBSP_LED_RGB_RED
#endif
#ifdef CYBSP_LED_RGB_BLUE
#define LED_BLUE CYBSP_LED_RGB_BLUE
#endif
#ifdef CYBSP_LED_RGB_GREEN
#define LED_GREEN CYBSP_LED_RGB_GREEN
#endif
// User button
#ifdef CYBSP_USER_BTN
#define USER_BUTTON CYBSP_USER_BTN
#define BUTTON1 CYBSP_USER_BTN
#endif
// QSPI
#ifdef CYBSP_QSPI_D0
#define QSPI_IO_0 CYBSP_QSPI_D0
#define QSPI_FLASH1_IO0 CYBSP_QSPI_D0
#endif
#ifdef CYBSP_QSPI_D1
#define QSPI_IO_1 CYBSP_QSPI_D1
#define QSPI_FLASH1_IO1 CYBSP_QSPI_D1
#endif
#ifdef CYBSP_QSPI_D2
#define QSPI_IO_2 CYBSP_QSPI_D2
#define QSPI_FLASH1_IO2 CYBSP_QSPI_D2
#endif
#ifdef CYBSP_QSPI_D3
#define QSPI_IO_3 CYBSP_QSPI_D3
#define QSPI_FLASH1_IO3 CYBSP_QSPI_D3
#endif
#ifdef CYBSP_QSPI_SCK
#define QSPI_CLK CYBSP_QSPI_SCK
#define QSPI_FLASH1_SCK CYBSP_QSPI_SCK
#endif
#ifdef CYBSP_QSPI_SS
#define QSPI_SEL CYBSP_QSPI_SS
#define QSPI_FLASH1_CSN CYBSP_QSPI_SS
#endif
// Arduino Header
#ifdef CYBSP_A0
#define A0 CYBSP_A0
#endif
#ifdef CYBSP_A1
#define A1 CYBSP_A1
#endif
#ifdef CYBSP_A2
#define A2 CYBSP_A2
#endif
#ifdef CYBSP_A3
#define A3 CYBSP_A3
#endif
#ifdef CYBSP_A4
#define A4 CYBSP_A4
#endif
#ifdef CYBSP_A5
#define A5 CYBSP_A5
#endif
#ifdef CYBSP_D0
#define D0 CYBSP_D0
#endif
#ifdef CYBSP_D1
#define D1 CYBSP_D1
#endif
#ifdef CYBSP_D2
#define D2 CYBSP_D2
#endif
#ifdef CYBSP_D3
#define D3 CYBSP_D3
#endif
#ifdef CYBSP_D4
#define D4 CYBSP_D4
#endif
#ifdef CYBSP_D5
#define D5 CYBSP_D5
#endif
#ifdef CYBSP_D6
#define D6 CYBSP_D6
#endif
#ifdef CYBSP_D7
#define D7 CYBSP_D7
#endif
#ifdef CYBSP_D8
#define D8 CYBSP_D8
#endif
#ifdef CYBSP_D9
#define D9 CYBSP_D9
#endif
#ifdef CYBSP_D10
#define D10 CYBSP_D10
#endif
#ifdef CYBSP_D11
#define D11 CYBSP_D11
#endif
#ifdef CYBSP_D12
#define D12 CYBSP_D12
#endif
#ifdef CYBSP_D13
#define D13 CYBSP_D13
#endif
#ifdef CYBSP_D14
#define D14 CYBSP_D14
#endif
#ifdef CYBSP_D15
#define D15 CYBSP_D15
#endif
#endif // MBED_PINNAMES_H

84
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/PinNames.h
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@ -1,84 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
#define LED1 P1_1
#define LED2 P0_5
#define LED3 P7_3
#define LED4 P1_5
#define LED5 P11_1
#define LED_RED LED1
#define LED_GREEN LED2
#define LED_BLUE LED3
// Reset pin unavailable
#define SWITCH2 P0_4
#define SWITCH4 P1_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define BUTTON2 SWITCH4
#define CARD_DETECT_1 P13_7
#define CARD_DETECT CARD_DETECT_1
#define SD_CMD P12_4
#define SD_CLK P12_5
#define SD_IO_0 P13_0
#define SD_IO_1 P13_1
#define SD_IO_2 P13_2
#define SD_IO_3 P13_3
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#endif

87
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -184,6 +213,15 @@ extern "C" {
/** Host-wake IRQ event */
#define CYBSP_WIFI_HOST_WAKE_IRQ_EVENT (CYHAL_GPIO_IRQ_RISE)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P12_0)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P12_1)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P12_2)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P12_4)
/** \} group_bsp_pins_comm */
@ -219,11 +257,11 @@ extern "C" {
/** Arduino D6 */
#define CYBSP_D6 (P5_6)
/** Arduino D7 */
#define CYBSP_D7 (P0_2)
#define CYBSP_D7 (P5_7)
/** Arduino D8 */
#define CYBSP_D8 (P13_0)
#define CYBSP_D8 (P7_5)
/** Arduino D9 */
#define CYBSP_D9 (P13_1)
#define CYBSP_D9 (P7_6)
/** Arduino D10 */
#define CYBSP_D10 (P12_3)
/** Arduino D11 */
@ -239,8 +277,51 @@ extern "C" {
/** \} group_bsp_pins_arduino */
/**
* \addtogroup group_bsp_pins_j2 J2 Header Pins
* \{
*/
/** Cypress J2 Header pin 1 */
#define CYBSP_J2_1 (CYBSP_A0)
/** Cypress J2 Header pin 2 */
#define CYBSP_J2_2 (P9_0)
/** Cypress J2 Header pin 3 */
#define CYBSP_J2_3 (CYBSP_A1)
/** Cypress J2 Header pin 4 */
#define CYBSP_J2_4 (P9_1)
/** Cypress J2 Header pin 5 */
#define CYBSP_J2_5 (CYBSP_A2)
/** Cypress J2 Header pin 6 */
#define CYBSP_J2_6 (P9_2)
/** Cypress J2 Header pin 7 */
#define CYBSP_J2_7 (CYBSP_A3)
/** Cypress J2 Header pin 8 */
#define CYBSP_J2_8 (P9_3)
/** Cypress J2 Header pin 9 */
#define CYBSP_J2_9 (CYBSP_A4)
/** Cypress J2 Header pin 10 */
#define CYBSP_J2_10 (P9_4)
/** Cypress J2 Header pin 11 */
#define CYBSP_J2_11 (CYBSP_A5)
/** Cypress J2 Header pin 12 */
#define CYBSP_J2_12 (P9_5)
/** Cypress J2 Header pin 13 */
#define CYBSP_J2_13 (P10_6)
/** Cypress J2 Header pin 14 */
#define CYBSP_J2_14 (P9_6)
/** Cypress J2 Header pin 15 */
#define CYBSP_J2_15 (P10_7)
/** Cypress J2 Header pin 16 */
#define CYBSP_J2_16 (P9_7)
/** \} group_bsp_pins_j2 */
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

118
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/PeripheralNames.h
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@ -1,118 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

79
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/PinNames.h
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@ -1,79 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define SPI_MOSI P12_0
#define SPI_MISO P12_1
#define SPI_CLK P12_2
#define SPI_CS P12_4
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
#define LED1 P0_3
#define LED2 P1_1
#define LED3 P11_1
#define LED4 P1_5
#define LED5 P13_7
#define LED_RED LED1
#define LED_BLUE LED3
#define LED_GREEN LED2
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#define AOUT P9_6
#endif

89
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -137,6 +166,15 @@ extern "C" {
/** Pin: QUAD SPI SCK */
#define CYBSP_QSPI_SCK (P11_7)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P12_0)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P12_1)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P12_2)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P12_4)
/** \} group_bsp_pins_comm */
@ -192,8 +230,59 @@ extern "C" {
/** \} group_bsp_pins_arduino */
/**
* \addtogroup group_bsp_pins_j2 J2 Header Pins
* \{
*/
/** Cypress J2 Header pin 1 */
#define CYBSP_J2_1 (CYBSP_A0)
/** Cypress J2 Header pin 2 */
#define CYBSP_J2_2 (P9_0)
/** Cypress J2 Header pin 3 */
#define CYBSP_J2_3 (CYBSP_A1)
/** Cypress J2 Header pin 4 */
#define CYBSP_J2_4 (P9_1)
/** Cypress J2 Header pin 5 */
#define CYBSP_J2_5 (CYBSP_A2)
/** Cypress J2 Header pin 6 */
#define CYBSP_J2_6 (P9_2)
/** Cypress J2 Header pin 7 */
#define CYBSP_J2_7 (CYBSP_A3)
/** Cypress J2 Header pin 8 */
#define CYBSP_J2_8 (P9_3)
/** Cypress J2 Header pin 9 */
#define CYBSP_J2_9 (CYBSP_A4)
/** Cypress J2 Header pin 10 */
#define CYBSP_J2_10 (P9_4)
/** Cypress J2 Header pin 11 */
#define CYBSP_J2_11 (CYBSP_A5)
/** Cypress J2 Header pin 12 */
#define CYBSP_J2_12 (P9_5)
/** Cypress J2 Header pin 13 */
#define CYBSP_J2_13 (P10_6)
/** Cypress J2 Header pin 14 */
#define CYBSP_J2_14 (NC)
/** Cypress J2 Header pin 15 */
#define CYBSP_J2_15 (P6_2)
/** Cypress J2 Header pin 16 */
#define CYBSP_J2_16 (P9_6)
/** Cypress J2 Header pin 17 */
#define CYBSP_J2_17 (P6_3)
/** Cypress J2 Header pin 18 */
#define CYBSP_J2_18 (P9_7)
/** Cypress J2 Header pin 19 */
#define CYBSP_J2_19 (P13_6)
/** Cypress J2 Header pin 20 */
#define CYBSP_J2_20 (P13_7)
/** \} group_bsp_pins_j2 */
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

118
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/PeripheralNames.h
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@ -1,118 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

80
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/PinNames.h
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@ -1,80 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define SPI_MOSI P12_0
#define SPI_MISO P12_1
#define SPI_CLK P12_2
#define SPI_CS P12_4
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
#define LED1 P0_3
#define LED2 P11_1
#define LED3 P1_1
#define LED4 P1_5
#define LED5 P13_7
#define LED_RED LED1
#define LED_BLUE LED2
#define LED_GREEN LED3
// Reset pin unavailable
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#define AOUT P9_6
#endif

89
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -171,6 +200,15 @@ extern "C" {
/** Pin: QUAD SPI SCK */
#define CYBSP_QSPI_SCK (P11_7)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P12_0)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P12_1)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P12_2)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P12_4)
/** Host-wake GPIO drive mode */
#define CYBSP_WIFI_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_ANALOG)
/** Host-wake IRQ event */
@ -231,8 +269,59 @@ extern "C" {
/** \} group_bsp_pins_arduino */
/**
* \addtogroup group_bsp_pins_j2 J2 Header Pins
* \{
*/
/** Cypress J2 Header pin 1 */
#define CYBSP_J2_1 (CYBSP_A0)
/** Cypress J2 Header pin 2 */
#define CYBSP_J2_2 (P9_0)
/** Cypress J2 Header pin 3 */
#define CYBSP_J2_3 (CYBSP_A1)
/** Cypress J2 Header pin 4 */
#define CYBSP_J2_4 (P9_1)
/** Cypress J2 Header pin 5 */
#define CYBSP_J2_5 (CYBSP_A2)
/** Cypress J2 Header pin 6 */
#define CYBSP_J2_6 (P9_2)
/** Cypress J2 Header pin 7 */
#define CYBSP_J2_7 (CYBSP_A3)
/** Cypress J2 Header pin 8 */
#define CYBSP_J2_8 (P9_3)
/** Cypress J2 Header pin 9 */
#define CYBSP_J2_9 (CYBSP_A4)
/** Cypress J2 Header pin 10 */
#define CYBSP_J2_10 (P9_4)
/** Cypress J2 Header pin 11 */
#define CYBSP_J2_11 (CYBSP_A5)
/** Cypress J2 Header pin 12 */
#define CYBSP_J2_12 (P9_5)
/** Cypress J2 Header pin 13 */
#define CYBSP_J2_13 (P10_6)
/** Cypress J2 Header pin 14 */
#define CYBSP_J2_14 (NC)
/** Cypress J2 Header pin 15 */
#define CYBSP_J2_15 (P6_2)
/** Cypress J2 Header pin 16 */
#define CYBSP_J2_16 (P9_6)
/** Cypress J2 Header pin 17 */
#define CYBSP_J2_17 (P6_3)
/** Cypress J2 Header pin 18 */
#define CYBSP_J2_18 (P9_7)
/** Cypress J2 Header pin 19 */
#define CYBSP_J2_19 (P13_6)
/** Cypress J2 Header pin 20 */
#define CYBSP_J2_20 (P13_7)
/** \} group_bsp_pins_j2 */
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

114
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/PeripheralNames.h
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@ -1,114 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

80
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/PinNames.h
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@ -1,80 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define SPI_MOSI P12_0
#define SPI_MISO P12_1
#define SPI_CLK P12_2
#define SPI_CS P12_4
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
#define LED1 P0_3
#define LED2 P11_1
#define LED3 P1_1
#define LED4 P1_5
#define LED5 P13_7
#define LED_RED LED1
#define LED_BLUE LED2
#define LED_GREEN LED3
// Reset pin unavailable
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#define AOUT P9_6
#endif

84
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/cybsp_types.h
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@ -33,6 +33,32 @@
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -174,6 +200,15 @@ extern "C" {
/** Pin: QUAD SPI SCK */
#define CYBSP_QSPI_SCK (P11_7)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P12_0)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P12_1)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P12_2)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P12_4)
/** Host-wake GPIO drive mode */
#define CYBSP_WIFI_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_ANALOG)
/** Host-wake IRQ event */
@ -234,6 +269,55 @@ extern "C" {
/** \} group_bsp_pins_arduino */
/**
* \addtogroup group_bsp_pins_j2 J2 Header Pins
* \{
*/
/** Cypress J2 Header pin 1 */
#define CYBSP_J2_1 (CYBSP_A0)
/** Cypress J2 Header pin 2 */
#define CYBSP_J2_2 (P9_0)
/** Cypress J2 Header pin 3 */
#define CYBSP_J2_3 (CYBSP_A1)
/** Cypress J2 Header pin 4 */
#define CYBSP_J2_4 (P9_1)
/** Cypress J2 Header pin 5 */
#define CYBSP_J2_5 (CYBSP_A2)
/** Cypress J2 Header pin 6 */
#define CYBSP_J2_6 (P9_2)
/** Cypress J2 Header pin 7 */
#define CYBSP_J2_7 (CYBSP_A3)
/** Cypress J2 Header pin 8 */
#define CYBSP_J2_8 (P9_3)
/** Cypress J2 Header pin 9 */
#define CYBSP_J2_9 (CYBSP_A4)
/** Cypress J2 Header pin 10 */
#define CYBSP_J2_10 (P9_4)
/** Cypress J2 Header pin 11 */
#define CYBSP_J2_11 (CYBSP_A5)
/** Cypress J2 Header pin 12 */
#define CYBSP_J2_12 (P9_5)
/** Cypress J2 Header pin 13 */
#define CYBSP_J2_13 (P10_6)
/** Cypress J2 Header pin 14 */
#define CYBSP_J2_14 (NC)
/** Cypress J2 Header pin 15 */
#define CYBSP_J2_15 (P6_2)
/** Cypress J2 Header pin 16 */
#define CYBSP_J2_16 (P9_6)
/** Cypress J2 Header pin 17 */
#define CYBSP_J2_17 (P6_3)
/** Cypress J2 Header pin 18 */
#define CYBSP_J2_18 (P9_7)
/** Cypress J2 Header pin 19 */
#define CYBSP_J2_19 (P13_6)
/** Cypress J2 Header pin 20 */
#define CYBSP_J2_20 (P13_7)
/** \} group_bsp_pins_j2 */
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */

124
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062S2_43012/PeripheralNames.h
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@ -1,124 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
/* SCB_8 does not support UART mode */
UART_9 = (int)SCB9_BASE,
UART_10 = (int)SCB10_BASE,
UART_11 = (int)SCB11_BASE,
UART_12 = (int)SCB12_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
/* SCB_9 - SCB_12 does not support SPI mode */
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
I2C_9 = (int)SCB9_BASE,
I2C_10 = (int)SCB10_BASE,
I2C_11 = (int)SCB11_BASE,
I2C_12 = (int)SCB12_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

124
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/PeripheralNames.h
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@ -1,124 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
/* SCB_8 does not support UART mode */
UART_9 = (int)SCB9_BASE,
UART_10 = (int)SCB10_BASE,
UART_11 = (int)SCB11_BASE,
UART_12 = (int)SCB12_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
/* SCB_9 - SCB_12 does not support SPI mode */
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
I2C_9 = (int)SCB9_BASE,
I2C_10 = (int)SCB10_BASE,
I2C_11 = (int)SCB11_BASE,
I2C_12 = (int)SCB12_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

89
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/PinNames.h
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@ -1,89 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
// Reset pin unavailable
#define LED1 P13_7
#define LED2 NC
#define LED3 NC
#define LED4 NC
#define LED_RED LED1
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define PDM_DATA P10_5
#define PDM_CLK P10_4
#define THERM_OUT_1 P10_1
#define THERM_OUT_2 P10_2
#define THERM_OUT THERM_OUT_1
#define THERM_VDD P10_3
#define THERM_GND P10_0
#define CARD_DETECT_1 P13_5
#define CARD_DETECT_2 P12_1
#define CARD_DETECT CARD_DETECT_1
#define SD_CMD P12_4
#define SD_CLK P12_5
#define SD_IO_0 P13_0
#define SD_IO_1 P13_1
#define SD_IO_2 P13_2
#define SD_IO_3 P13_3
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#endif

31
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -164,6 +193,8 @@ extern "C" {
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

114
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_063_BLE/PeripheralNames.h
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@ -1,114 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
#ifdef __cplusplus
}
#endif
#endif

47
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_063_BLE/PinNames.h
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@ -1,47 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define UART_RX P5_0
#define UART_TX P5_1
#define I2C_SCL P6_4
#define I2C_SDA P6_5
#define LED1 P6_3
#define LED2 P7_1
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define USBTX UART_TX
#define USBRX UART_RX
#endif

31
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_063_BLE/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -119,6 +148,8 @@ extern "C" {
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

118
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/PeripheralNames.h
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@ -1,118 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
typedef enum {
QSPI_0 = (int)SMIF0_BASE,
} SMIFName;
#ifdef __cplusplus
}
#endif
#endif

102
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/PinNames.h
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@ -1,102 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
typedef cyhal_gpio_t PinName;
// Arduino connector namings
#define A0 P10_0
#define A1 P10_1
#define A2 P10_2
#define A3 P10_3
#define A4 P10_4
#define A5 P10_5
#define D0 P5_0
#define D1 P5_1
#define D2 P5_2
#define D3 P5_3
#define D4 P5_4
#define D5 P5_5
#define D6 P5_6
#define D7 P0_2
#define D8 P13_0
#define D9 P13_1
#define D10 P12_3
#define D11 P12_0
#define D12 P12_1
#define D13 P12_2
#define D14 P6_1
#define D15 P6_0
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define SPI_MOSI P12_0
#define SPI_MISO P12_1
#define SPI_CLK P12_2
#define SPI_CS P12_4
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
// Reset pin unavailable
#define LED1 P13_7
#define LED2 P1_5
#define LED_RED LED1
#define LED_GREEN LED2
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#endif

30
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -134,6 +163,7 @@ extern "C" {
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}

118
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/PeripheralNames.h
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@ -1,118 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

76
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/PinNames.h
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@ -1,76 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P6_0
#define I2C_SDA P6_1
#define SPI_MOSI P12_0
#define SPI_MISO P12_1
#define SPI_CLK P12_2
#define SPI_CS P12_4
#define UART_RX P13_0
#define UART_TX P13_1
#define UART_RTS P13_2
#define UART_CTS P13_3
#define LED1 P0_3
#define LED2 P1_1
#define LED3 P10_6
#define LED_RED LED1
#define LED_GREEN LED2
#define LED_BLUE LED3
#define SWITCH2 P0_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#endif

40
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/cybsp_types.h
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@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -162,6 +191,15 @@ extern "C" {
/** Pin: QUAD SPI SCK */
#define CYBSP_QSPI_SCK (P11_7)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P12_0)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P12_1)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P12_2)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P12_4)
/** Host-wake GPIO drive mode */
#define CYBSP_WIFI_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_ANALOG)
/** Host-wake IRQ event */
@ -224,6 +262,8 @@ extern "C" {
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif

118
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/PeripheralNames.h
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@ -1,118 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)SCB0_BASE,
UART_1 = (int)SCB1_BASE,
UART_2 = (int)SCB2_BASE,
UART_3 = (int)SCB3_BASE,
UART_4 = (int)SCB4_BASE,
UART_5 = (int)SCB5_BASE,
UART_6 = (int)SCB6_BASE,
UART_7 = (int)SCB7_BASE,
} UARTName;
#define DEVICE_SPI_COUNT CY_IP_MXSCB_INSTANCES
typedef enum {
SPI_0 = (int)SCB0_BASE,
SPI_1 = (int)SCB1_BASE,
SPI_2 = (int)SCB2_BASE,
SPI_3 = (int)SCB3_BASE,
SPI_4 = (int)SCB4_BASE,
SPI_5 = (int)SCB5_BASE,
SPI_6 = (int)SCB6_BASE,
SPI_7 = (int)SCB7_BASE,
SPI_8 = (int)SCB8_BASE,
} SPIName;
typedef enum {
I2C_0 = (int)SCB0_BASE,
I2C_1 = (int)SCB1_BASE,
I2C_2 = (int)SCB2_BASE,
I2C_3 = (int)SCB3_BASE,
I2C_4 = (int)SCB4_BASE,
I2C_5 = (int)SCB5_BASE,
I2C_6 = (int)SCB6_BASE,
I2C_7 = (int)SCB7_BASE,
I2C_8 = (int)SCB8_BASE,
} I2CName;
typedef enum {
PWM_32b_0 = TCPWM0_BASE,
PWM_32b_1,
PWM_32b_2,
PWM_32b_3,
PWM_32b_4,
PWM_32b_5,
PWM_32b_6,
PWM_32b_7,
PWM_16b_0 = TCPWM1_BASE,
PWM_16b_1,
PWM_16b_2,
PWM_16b_3,
PWM_16b_4,
PWM_16b_5,
PWM_16b_6,
PWM_16b_7,
PWM_16b_8,
PWM_16b_9,
PWM_16b_10,
PWM_16b_11,
PWM_16b_12,
PWM_16b_13,
PWM_16b_14,
PWM_16b_15,
PWM_16b_16,
PWM_16b_17,
PWM_16b_18,
PWM_16b_19,
PWM_16b_20,
PWM_16b_21,
PWM_16b_22,
PWM_16b_23,
} PWMName;
typedef enum {
ADC_0 = (int)SAR_BASE,
} ADCName;
typedef enum {
DAC_0 = (int)CTDAC0_BASE,
} DACName;
typedef enum {
QSPI_0,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

66
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/PinNames.h
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@ -1,66 +0,0 @@
/*
* mbed Microcontroller Library
* Copyright (c) 2017-2018 Future Electronics
* Copyright (c) 2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "PinNamesTypes.h"
#include "cyhal_pin_package.h"
// Generic signal names
#define I2C_SCL P1_0
#define I2C_SDA P1_1
#define UART_RX P5_0
#define UART_TX P5_1
#define UART_RTS P5_2
#define UART_CTS P5_3
#define LED1 P1_5
#define LED2 P11_0
#define SWITCH2 P1_4
#define USER_BUTTON SWITCH2
#define BUTTON1 USER_BUTTON
#define QSPI_CLK P11_7
#define QSPI_IO_0 P11_6
#define QSPI_IO_1 P11_5
#define QSPI_IO_2 P11_4
#define QSPI_IO_3 P11_3
#define QSPI_SEL P11_2
#define QSPI_FLASH1_IO0 QSPI_IO_0
#define QSPI_FLASH1_IO1 QSPI_IO_1
#define QSPI_FLASH1_IO2 QSPI_IO_2
#define QSPI_FLASH1_IO3 QSPI_IO_3
#define QSPI_FLASH1_SCK QSPI_CLK
#define QSPI_FLASH1_CSN QSPI_SEL
// Standardized interfaces names
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_CTS UART_CTS
#define STDIO_UART_RTS UART_RTS
#define USBTX UART_TX
#define USBRX UART_RX
#endif

47
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/cybsp_types.h
View File

@ -25,12 +25,40 @@
#pragma once
#if defined(CY_USING_HAL)
#include "cyhal_pin_package.h"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_bsp_settings BSP Settings
* \{
*
* <div class="category">Peripheral Default HAL Settings:</div>
* | Resource | Parameter | Value | Remarks |
* | :------: | :-------: | :---: | :------ |
* | ADC | VREF | 1.2 V | |
* | ^ | Measurement type | Single Ended | |
* | ^ | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
* | ^ | Output range | 0x000 to 0x7FF | |
* | DAC | Reference source | VDDA | |
* | ^ | Input range | 0x000 to 0xFFF | |
* | ^ | Output range | 0 to VDDA | |
* | ^ | Output type | Unbuffered output | |
* | I2C | Role | Master | Configurable to slave mode through HAL function |
* | ^ | Data rate | 100 kbps | Configurable through HAL function |
* | ^ | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
* | LpTimer | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
* | SPI | Data rate | 100 kpbs | Configurable through HAL function |
* | ^ | Slave select polarity | Active low | |
* | UART | Flow control | No flow control | Configurable through HAL function |
* | ^ | Data format | 8N1 | Configurable through HAL function |
* | ^ | Baud rate | 115200 | Configurable through HAL function |
*/
/** \} group_bsp_settings */
/**
* \addtogroup group_bsp_pin_state Pin States
@ -49,6 +77,7 @@ extern "C" {
/** \} group_bsp_pin_state */
#if defined(CY_USING_HAL)
/**
* \addtogroup group_bsp_pins Pin Mappings
@ -161,6 +190,15 @@ extern "C" {
/** Pin: QUAD SPI SCK */
#define CYBSP_QSPI_SCK (P11_7)
/** Pin: SPI MOSI */
#define CYBSP_SPI_MOSI (P0_2)
/** Pin: SPI MISO */
#define CYBSP_SPI_MISO (P0_3)
/** Pin: SPI CLK */
#define CYBSP_SPI_CLK (P0_4)
/** Pin: SPI CS */
#define CYBSP_SPI_CS (P0_5)
/** Host-wake GPIO drive mode */
#define CYBSP_WIFI_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_ANALOG)
/** Host-wake IRQ event */
@ -221,8 +259,17 @@ extern "C" {
/** \} group_bsp_pins_arduino */
/**
* \addtogroup group_bsp_pins_j2 J2 Header Pins
* \{
* All the pins, other than A0-A5 are No Connects
* \} group_bsp_pins_j2 */
/** \} group_bsp_pins */
#endif /* defined(CY_USING_HAL) */
#if defined(__cplusplus)
}
#endif