mirror of https://github.com/ARMmbed/mbed-os.git
332 lines
11 KiB
C
332 lines
11 KiB
C
/*
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* Copyright (c) 2013 Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
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* integrated circuit in a product or a software update for such product, must reproduce
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* the above copyright notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
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* used to endorse or promote products derived from this software without specific prior
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* written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary or object form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "us_ticker_api.h"
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#include "common_rtc.h"
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#include "app_util.h"
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#include "nrf_drv_common.h"
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#include "lp_ticker_api.h"
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#include "mbed_critical.h"
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#if defined(NRF52_ERRATA_20)
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#if defined(SOFTDEVICE_PRESENT)
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#include "nrf_sdh.h"
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#define NRF_HAL_US_TICKER_SD_IS_ENABLED() nrf_sdh_is_enabled()
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#else
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#define NRF_HAL_US_TICKER_SD_IS_ENABLED() 0
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#endif
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#endif
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//------------------------------------------------------------------------------
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// Common stuff used also by lp_ticker and rtc_api (see "common_rtc.h").
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//
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#include "app_util_platform.h"
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bool m_common_rtc_enabled = false;
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uint32_t volatile m_common_rtc_overflows = 0;
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// lp/us ticker fire interrupt flag for IRQ handler
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volatile uint8_t m_common_sw_irq_flag = 0;
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__STATIC_INLINE void rtc_ovf_event_check(void)
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{
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if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW)) {
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
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// Don't disable this event. It shall occur periodically.
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++m_common_rtc_overflows;
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}
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}
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#if defined(TARGET_MCU_NRF51822)
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void common_rtc_irq_handler(void)
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#else
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void COMMON_RTC_IRQ_HANDLER(void)
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#endif
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{
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rtc_ovf_event_check();
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if ((m_common_sw_irq_flag & US_TICKER_SW_IRQ_MASK) || nrf_rtc_event_pending(COMMON_RTC_INSTANCE, US_TICKER_EVENT)) {
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us_ticker_irq_handler();
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}
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#if DEVICE_LOWPOWERTIMER
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if (m_common_sw_irq_flag & LP_TICKER_SW_IRQ_MASK) {
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m_common_sw_irq_flag &= ~LP_TICKER_SW_IRQ_MASK;
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lp_ticker_irq_handler();
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}
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if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, LP_TICKER_EVENT)) {
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lp_ticker_irq_handler();
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}
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#endif
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}
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// Function for fix errata 20: RTC Register values are invalid
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__STATIC_INLINE void errata_20(void)
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{
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#if defined(NRF52_ERRATA_20)
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if (!NRF_HAL_US_TICKER_SD_IS_ENABLED())
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{
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NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
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NRF_CLOCK->TASKS_LFCLKSTART = 1;
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while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
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{
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}
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}
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NRF_RTC1->TASKS_STOP = 0;
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#endif
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}
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void RTC1_IRQHandler(void);
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void common_rtc_init(void)
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{
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if (m_common_rtc_enabled) {
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return;
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}
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errata_20();
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NVIC_SetVector(RTC1_IRQn, (uint32_t)RTC1_IRQHandler);
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// RTC is driven by the low frequency (32.768 kHz) clock, a proper request
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// must be made to have it running.
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// Currently this clock is started in 'SystemInit' (see "system_nrf51.c"
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// or "system_nrf52.c", respectively).
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nrf_rtc_prescaler_set(COMMON_RTC_INSTANCE, 0);
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
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#if defined(TARGET_MCU_NRF51822)
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
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#endif
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#if DEVICE_LOWPOWERTIMER
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT);
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#endif
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
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// Interrupts on all related events are enabled permanently. Particular
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// events will be enabled or disabled as needed (such approach is more
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// energy efficient).
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nrf_rtc_int_enable(COMMON_RTC_INSTANCE,
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#if DEVICE_LOWPOWERTIMER
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LP_TICKER_INT_MASK |
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#endif
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US_TICKER_INT_MASK |
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NRF_RTC_INT_OVERFLOW_MASK);
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// This event is enabled permanently, since overflow indications are needed
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// continuously.
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nrf_rtc_event_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
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// All other relevant events are initially disabled.
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nrf_rtc_event_disable(COMMON_RTC_INSTANCE,
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#if defined(TARGET_MCU_NRF51822)
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OS_TICK_INT_MASK |
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#endif
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#if DEVICE_LOWPOWERTIMER
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LP_TICKER_INT_MASK |
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#endif
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US_TICKER_INT_MASK);
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nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE),
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#ifdef NRF51
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APP_IRQ_PRIORITY_LOW
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#elif defined(NRF52) || defined(NRF52840_XXAA)
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APP_IRQ_PRIORITY_LOWEST
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#endif
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);
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nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START);
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m_common_rtc_enabled = true;
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}
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__STATIC_INLINE void rtc_ovf_event_safe_check(void)
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{
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core_util_critical_section_enter();
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rtc_ovf_event_check();
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core_util_critical_section_exit();
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}
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uint32_t common_rtc_32bit_ticks_get(void)
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{
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uint32_t ticks;
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uint32_t prev_overflows;
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do {
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prev_overflows = m_common_rtc_overflows;
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ticks = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
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// The counter used for time measurements is less than 32 bit wide,
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// so its value is complemented with the number of registered overflows
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// of the counter.
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ticks += (m_common_rtc_overflows << RTC_COUNTER_BITS);
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// Check in case that OVF occurred during execution of a RTC handler (apply if call was from RTC handler)
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// m_common_rtc_overflows might been updated in this call.
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rtc_ovf_event_safe_check();
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// If call was made from a low priority level m_common_rtc_overflows might have been updated in RTC handler.
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} while (m_common_rtc_overflows != prev_overflows);
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return ticks;
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}
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uint64_t common_rtc_64bit_us_get(void)
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{
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uint32_t ticks = common_rtc_32bit_ticks_get();
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// [ticks -> microseconds]
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return ROUNDED_DIV(((uint64_t)ticks) * 1000000, RTC_INPUT_FREQ);
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}
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void common_rtc_set_interrupt(uint32_t us_timestamp, uint32_t cc_channel,
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uint32_t int_mask)
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{
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// The internal counter is clocked with a frequency that cannot be easily
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// multiplied to 1 MHz, therefore besides the translation of values
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// (microsecond <-> ticks) a special care of overflows handling must be
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// taken. Here the 32-bit timestamp value is complemented with information
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// about current the system up time of (ticks + number of overflows of tick
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// counter on upper bits, converted to microseconds), and such 64-bit value
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// is then translated to counter ticks. Finally, the lower 24 bits of thus
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// calculated value is written to the counter compare register to prepare
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// the interrupt generation.
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uint64_t current_time64 = common_rtc_64bit_us_get();
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// [add upper 32 bits from the current time to the timestamp value]
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uint64_t timestamp64 = (current_time64 & ~(uint64_t)0xFFFFFFFF) | us_timestamp;
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// [if the original timestamp value happens to be after the 32 bit counter
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// of microsends overflows, correct the upper 32 bits accordingly]
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if (timestamp64 < current_time64) {
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timestamp64 += ((uint64_t)1 << 32);
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}
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// [microseconds -> ticks, always round the result up to avoid too early
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// interrupt generation]
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uint32_t compare_value = RTC_WRAP((uint32_t)CEIL_DIV((timestamp64) * RTC_INPUT_FREQ, 1000000));
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core_util_critical_section_enter();
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// The COMPARE event occurs when the value in compare register is N and
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// the counter value changes from N-1 to N. Therefore, the minimal safe
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// difference between the compare value to be set and the current counter
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// value is 2 ticks. This guarantees that the compare trigger is properly
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// setup before the compare condition occurs.
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uint32_t closest_safe_compare = RTC_WRAP(common_rtc_32bit_ticks_get() + 2);
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if (closest_safe_compare - compare_value < 2) {
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compare_value = closest_safe_compare;
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}
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nrf_rtc_cc_set(COMMON_RTC_INSTANCE, cc_channel, compare_value);
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nrf_rtc_event_enable(COMMON_RTC_INSTANCE, int_mask);
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core_util_critical_section_exit();
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}
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//------------------------------------------------------------------------------
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void us_ticker_init(void)
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{
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common_rtc_init();
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}
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uint32_t us_ticker_read()
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{
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us_ticker_init();
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return (uint32_t)common_rtc_64bit_us_get();
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}
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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common_rtc_set_interrupt(timestamp,
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US_TICKER_CC_CHANNEL, US_TICKER_INT_MASK);
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}
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void us_ticker_fire_interrupt(void)
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{
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core_util_critical_section_enter();
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m_common_sw_irq_flag |= US_TICKER_SW_IRQ_MASK;
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NVIC_SetPendingIRQ(RTC1_IRQn);
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core_util_critical_section_exit();
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}
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void us_ticker_disable_interrupt(void)
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{
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nrf_rtc_event_disable(COMMON_RTC_INSTANCE, US_TICKER_INT_MASK);
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}
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void us_ticker_clear_interrupt(void)
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{
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m_common_sw_irq_flag &= ~US_TICKER_SW_IRQ_MASK;
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nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
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}
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// Since there is no SysTick on NRF51, the RTC1 channel 1 is used as an
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// alternative source of RTOS ticks.
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#if defined(TARGET_MCU_NRF51822)
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#include "mbed_toolchain.h"
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#define MAX_RTC_COUNTER_VAL ((1uL << RTC_COUNTER_BITS) - 1)
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#ifndef RTC1_CONFIG_FREQUENCY
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#define RTC1_CONFIG_FREQUENCY 32678 // [Hz]
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#endif
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void COMMON_RTC_IRQ_HANDLER(void)
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{
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if(!nrf_rtc_event_pending(COMMON_RTC_INSTANCE, OS_TICK_EVENT)) {
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common_rtc_irq_handler();
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}
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}
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IRQn_Type mbed_get_m0_tick_irqn()
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{
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return SWI3_IRQn;
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}
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#endif // defined(TARGET_MCU_NRF51822)
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