mirror of https://github.com/ARMmbed/mbed-os.git
581 lines
23 KiB
C
581 lines
23 KiB
C
/**
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******************************************************************************
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* @file stm32l4xx_hal_hash.h
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* @author MCD Application Team
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* @brief Header file of HASH HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L4xx_HAL_HASH_H
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#define __STM32L4xx_HAL_HASH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal_def.h"
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/** @addtogroup STM32L4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup HASH
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup HASH_Exported_Types HASH Exported Types
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* @{
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*/
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/**
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* @brief HASH Configuration Structure definition
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*/
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typedef struct
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{
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uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit data.
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This parameter can be a value of @ref HASH_Data_Type. */
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uint32_t KeySize; /*!< The key size is used only in HMAC operation. */
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uint8_t* pKey; /*!< The key is used only in HMAC operation. */
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} HASH_InitTypeDef;
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_HASH_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
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HAL_HASH_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
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HAL_HASH_STATE_BUSY = 0x02, /*!< Processing (hashing) is ongoing */
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HAL_HASH_STATE_TIMEOUT = 0x06, /*!< Timeout state */
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HAL_HASH_STATE_ERROR = 0x07, /*!< Error state */
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HAL_HASH_STATE_SUSPENDED = 0x08 /*!< Suspended state */
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}HAL_HASH_StateTypeDef;
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/**
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* @brief HAL phase structures definition
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*/
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typedef enum
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{
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HAL_HASH_PHASE_READY = 0x01, /*!< HASH peripheral is ready to start */
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HAL_HASH_PHASE_PROCESS = 0x02, /*!< HASH peripheral is in HASH processing phase */
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HAL_HASH_PHASE_HMAC_STEP_1 = 0x03, /*!< HASH peripheral is in HMAC step 1 processing phase
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(step 1 consists in entering the inner hash function key) */
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HAL_HASH_PHASE_HMAC_STEP_2 = 0x04, /*!< HASH peripheral is in HMAC step 2 processing phase
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(step 2 consists in entering the message text) */
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HAL_HASH_PHASE_HMAC_STEP_3 = 0x05 /*!< HASH peripheral is in HMAC step 3 processing phase
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(step 3 consists in entering the outer hash function key) */
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}HAL_HASH_PhaseTypeDef;
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/**
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* @brief HAL HASH mode suspend definitions
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*/
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typedef enum
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{
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HAL_HASH_SUSPEND_NONE = 0x00, /*!< HASH peripheral suspension not requested */
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HAL_HASH_SUSPEND = 0x01 /*!< HASH peripheral suspension is requested */
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}HAL_HASH_SuspendTypeDef;
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/**
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* @brief HASH Handle Structure definition
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*/
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typedef struct
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{
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HASH_InitTypeDef Init; /*!< HASH required parameters */
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uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */
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uint8_t *pHashOutBuffPtr; /*!< Pointer to output buffer (digest) */
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uint8_t *pHashKeyBuffPtr; /*!< Pointer to key buffer (HMAC only) */
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uint8_t *pHashMsgBuffPtr; /*!< Pointer to message buffer (HMAC only) */
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uint32_t HashBuffSize; /*!< Size of buffer to be processed */
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__IO uint32_t HashInCount; /*!< Counter of inputted data */
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__IO uint32_t HashITCounter; /*!< Counter of issued interrupts */
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__IO uint32_t HashKeyCount; /*!< Counter for Key inputted data (HMAC only) */
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HAL_StatusTypeDef Status; /*!< HASH peripheral status */
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HAL_HASH_PhaseTypeDef Phase; /*!< HASH peripheral phase */
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DMA_HandleTypeDef *hdmain; /*!< HASH In DMA Handle parameters */
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HAL_LockTypeDef Lock; /*!< Locking object */
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__IO HAL_HASH_StateTypeDef State; /*!< HASH peripheral state */
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HAL_HASH_SuspendTypeDef SuspendRequest; /*!< HASH peripheral suspension request flag */
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FlagStatus DigestCalculationDisable; /*!< Digest calculation phase skip (MDMAT bit control) for multi-buffers DMA-based HMAC computation */
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__IO uint32_t NbWordsAlreadyPushed; /*!< Numbers of words already pushed in FIFO before inputting new block */
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} HASH_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup HASH_Exported_Constants HASH Exported Constants
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* @{
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*/
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/** @defgroup HASH_Algo_Selection HASH algorithm selection
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* @{
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*/
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#define HASH_ALGOSELECTION_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
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#define HASH_ALGOSELECTION_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
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#define HASH_ALGOSELECTION_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
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#define HASH_ALGOSELECTION_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
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/**
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* @}
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*/
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/** @defgroup HASH_Algorithm_Mode HASH algorithm mode
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* @{
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*/
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#define HASH_ALGOMODE_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
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#define HASH_ALGOMODE_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
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/**
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* @}
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*/
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/** @defgroup HASH_Data_Type HASH input data type
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* @{
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*/
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#define HASH_DATATYPE_32B ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
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#define HASH_DATATYPE_16B HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
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#define HASH_DATATYPE_8B HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
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#define HASH_DATATYPE_1B HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
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/**
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* @}
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*/
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/** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode HMAC key length type
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* @{
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*/
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#define HASH_HMAC_KEYTYPE_SHORTKEY ((uint32_t)0x00000000) /*!< HMAC Key size is <= 64 bytes */
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#define HASH_HMAC_KEYTYPE_LONGKEY HASH_CR_LKEY /*!< HMAC Key size is > 64 bytes */
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/**
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* @}
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*/
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/** @defgroup HASH_flags_definition HASH flags definitions
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* @{
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*/
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#define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : a new block can be entered in the IP */
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#define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
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#define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
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#define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy, processing a block of data */
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#define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : the input buffer contains at least one word of data */
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/**
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* @}
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*/
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/** @defgroup HASH_interrupts_definition HASH interrupts definitions
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* @{
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*/
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#define HASH_IT_DINI HASH_IMR_DINIE /*!< A new block can be entered into the input buffer (DIN) */
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#define HASH_IT_DCI HASH_IMR_DCIE /*!< Digest calculation complete */
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/**
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* @}
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*/
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/** @defgroup HASH_alias HASH API alias
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* @{
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*/
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#define HAL_HASHEx_IRQHandler HAL_HASH_IRQHandler /*!< HAL_HASHEx_IRQHandler() is re-directed to HAL_HASH_IRQHandler() for compatibility with legacy code */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup HASH_Exported_Macros HASH Exported Macros
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* @{
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*/
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/** @brief Check whether or not the specified HASH flag is set.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg @ref HASH_FLAG_DINIS A new block can be entered into the input buffer.
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* @arg @ref HASH_FLAG_DCIS Digest calculation complete.
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* @arg @ref HASH_FLAG_DMAS DMA interface is enabled (DMAE=1) or a transfer is ongoing.
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* @arg @ref HASH_FLAG_BUSY The hash core is Busy : processing a block of data.
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* @arg @ref HASH_FLAG_DINNE DIN not empty : the input buffer contains at least one word of data.
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_HASH_GET_FLAG(__FLAG__) (((__FLAG__) > 8U) ? \
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((HASH->CR & (__FLAG__)) == (__FLAG__)) :\
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((HASH->SR & (__FLAG__)) == (__FLAG__)) )
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/** @brief Clear the specified HASH flag.
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* @param __FLAG__: specifies the flag to clear.
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* This parameter can be one of the following values:
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* @arg @ref HASH_FLAG_DINIS A new block can be entered into the input buffer.
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* @arg @ref HASH_FLAG_DCIS Digest calculation complete
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* @retval None
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*/
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#define __HAL_HASH_CLEAR_FLAG(__FLAG__) CLEAR_BIT(HASH->SR, (__FLAG__))
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/** @brief Enable the specified HASH interrupt.
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* @param __INTERRUPT__: specifies the HASH interrupt source to enable.
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* This parameter can be one of the following values:
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* @arg @ref HASH_IT_DINI A new block can be entered into the input buffer (DIN)
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* @arg @ref HASH_IT_DCI Digest calculation complete
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* @retval None
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*/
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#define __HAL_HASH_ENABLE_IT(__INTERRUPT__) SET_BIT(HASH->IMR, (__INTERRUPT__))
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/** @brief Disable the specified HASH interrupt.
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* @param __INTERRUPT__: specifies the HASH interrupt source to disable.
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* This parameter can be one of the following values:
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* @arg @ref HASH_IT_DINI A new block can be entered into the input buffer (DIN)
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* @arg @ref HASH_IT_DCI Digest calculation complete
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* @retval None
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*/
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#define __HAL_HASH_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(HASH->IMR, (__INTERRUPT__))
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/** @brief Reset HASH handle state.
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* @param __HANDLE__: HASH handle.
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* @retval None
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*/
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#define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
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/** @brief Reset HASH handle status.
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* @param __HANDLE__: HASH handle.
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* @retval None
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*/
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#define __HAL_HASH_RESET_HANDLE_STATUS(__HANDLE__) ((__HANDLE__)->Status = HAL_OK)
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/**
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* @brief Enable the multi-buffer DMA transfer mode.
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* @note This bit is set when hashing large files when multiple DMA transfers are needed.
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* @retval None
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*/
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#define __HAL_HASH_SET_MDMAT() SET_BIT(HASH->CR, HASH_CR_MDMAT)
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/**
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* @brief Disable the multi-buffer DMA transfer mode.
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* @retval None
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*/
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#define __HAL_HASH_RESET_MDMAT() CLEAR_BIT(HASH->CR, HASH_CR_MDMAT)
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/**
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* @brief Start the digest computation.
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* @retval None
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*/
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#define __HAL_HASH_START_DIGEST() SET_BIT(HASH->STR, HASH_STR_DCAL)
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/**
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* @brief Set the number of valid bits in the last word written in data register DIN.
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* @param __SIZE__: size in bytes of last data written in Data register.
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* @retval None
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*/
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#define __HAL_HASH_SET_NBVALIDBITS(__SIZE__) MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * ((__SIZE__) % 4))
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/**
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* @brief Reset the HASH core.
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* @retval None
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*/
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#define __HAL_HASH_INIT() SET_BIT(HASH->CR, HASH_CR_INIT)
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/**
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* @}
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*/
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/* Private macros --------------------------------------------------------*/
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/** @defgroup HASH_Private_Macros HASH Private Macros
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* @{
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*/
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/**
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* @brief Return digest length in bytes.
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* @retval Digest length
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*/
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#define HASH_DIGEST_LENGTH() ((READ_BIT(HASH->CR, HASH_CR_ALGO) == HASH_ALGOSELECTION_SHA1) ? 20 : \
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((READ_BIT(HASH->CR, HASH_CR_ALGO) == HASH_ALGOSELECTION_SHA224) ? 28 : \
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((READ_BIT(HASH->CR, HASH_CR_ALGO) == HASH_ALGOSELECTION_SHA256) ? 32 : 16 ) ) )
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/**
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* @brief Return number of words already pushed in the FIFO.
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* @retval Number of words already pushed in the FIFO
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*/
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#define HASH_NBW_PUSHED() ((READ_BIT(HASH->CR, HASH_CR_NBW)) >> 8)
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/**
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* @brief Ensure that HASH input data type is valid.
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* @param __DATATYPE__: HASH input data type.
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* @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid)
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*/
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#define IS_HASH_DATATYPE(__DATATYPE__) (((__DATATYPE__) == HASH_DATATYPE_32B)|| \
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((__DATATYPE__) == HASH_DATATYPE_16B)|| \
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((__DATATYPE__) == HASH_DATATYPE_8B) || \
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((__DATATYPE__) == HASH_DATATYPE_1B))
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/**
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* @brief Ensure that input data buffer size is valid for multi-buffer HASH
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* processing in polling mode.
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* @note This check is valid only for multi-buffer HASH processing in polling mode.
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* @param __SIZE__: input data buffer size.
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* @retval SET (__SIZE__ is valid) or RESET (__SIZE__ is invalid)
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*/
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#define IS_HASH_POLLING_MULTIBUFFER_SIZE(__SIZE__) (((__SIZE__) % 4) == 0)
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/**
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* @brief Ensure that input data buffer size is valid for multi-buffer HASH
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* processing in DMA mode.
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* @note This check is valid only for multi-buffer HASH processing in DMA mode.
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* @param __SIZE__: input data buffer size.
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* @retval SET (__SIZE__ is valid) or RESET (__SIZE__ is invalid)
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*/
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#define IS_HASH_DMA_MULTIBUFFER_SIZE(__SIZE__) ((READ_BIT(HASH->CR, HASH_CR_MDMAT) == RESET) || (((__SIZE__) % 4) == 0))
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/**
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* @brief Ensure that input data buffer size is valid for multi-buffer HMAC
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* processing in DMA mode.
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* @note This check is valid only for multi-buffer HMAC processing in DMA mode.
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* @param __HANDLE__: HASH handle.
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* @param __SIZE__: input data buffer size.
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* @retval SET (__SIZE__ is valid) or RESET (__SIZE__ is invalid)
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*/
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#define IS_HMAC_DMA_MULTIBUFFER_SIZE(__HANDLE__,__SIZE__) ((((__HANDLE__)->DigestCalculationDisable) == RESET) || (((__SIZE__) % 4) == 0))
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/**
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* @brief Ensure that handle phase is set to HASH processing.
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* @param __HANDLE__: HASH handle.
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* @retval SET (handle phase is set to HASH processing) or RESET (handle phase is not set to HASH processing)
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*/
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#define IS_HASH_PROCESSING(__HANDLE__) ((__HANDLE__)->Phase == HAL_HASH_PHASE_PROCESS)
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/**
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* @brief Ensure that handle phase is set to HMAC processing.
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* @param __HANDLE__: HASH handle.
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* @retval SET (handle phase is set to HMAC processing) or RESET (handle phase is not set to HMAC processing)
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*/
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#define IS_HMAC_PROCESSING(__HANDLE__) (((__HANDLE__)->Phase == HAL_HASH_PHASE_HMAC_STEP_1) || \
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((__HANDLE__)->Phase == HAL_HASH_PHASE_HMAC_STEP_2) || \
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((__HANDLE__)->Phase == HAL_HASH_PHASE_HMAC_STEP_3))
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/**
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* @}
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*/
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/* Include HASH HAL Extended module */
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#include "stm32l4xx_hal_hash_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup HASH_Exported_Functions HASH Exported Functions
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* @{
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*/
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/** @addtogroup HASH_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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/* Initialization/de-initialization methods **********************************/
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HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash);
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HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash);
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void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash);
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void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash);
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void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash);
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void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash);
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void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group2 HASH processing functions in polling mode
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* @{
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*/
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/* HASH processing using polling *********************************************/
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HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
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HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
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HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group3 HASH processing functions in interrupt mode
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* @{
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*/
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/* HASH processing using IT **************************************************/
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HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
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HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
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void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group4 HASH processing functions in DMA mode
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* @{
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*/
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/* HASH processing using DMA *************************************************/
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HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
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HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group5 HMAC processing functions in polling mode
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* @{
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*/
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/* HASH-MAC processing using polling *****************************************/
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HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
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HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group6 HMAC processing functions in interrupt mode
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* @{
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*/
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HAL_StatusTypeDef HAL_HMAC_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
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HAL_StatusTypeDef HAL_HMAC_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group7 HMAC processing functions in DMA mode
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* @{
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*/
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/* HASH-HMAC processing using DMA ********************************************/
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HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
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/**
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* @}
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*/
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/** @addtogroup HASH_Exported_Functions_Group8 Peripheral states functions
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* @{
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*/
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/* Peripheral State methods **************************************************/
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HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash);
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HAL_StatusTypeDef HAL_HASH_GetStatus(HASH_HandleTypeDef *hhash);
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void HAL_HASH_ContextSaving(HASH_HandleTypeDef *hhash, uint8_t* pMemBuffer);
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void HAL_HASH_ContextRestoring(HASH_HandleTypeDef *hhash, uint8_t* pMemBuffer);
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void HAL_HASH_SwFeed_ProcessSuspend(HASH_HandleTypeDef *hhash);
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HAL_StatusTypeDef HAL_HASH_DMAFeed_ProcessSuspend(HASH_HandleTypeDef *hhash);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private functions -----------------------------------------------------------*/
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/** @addtogroup HASH_Private_Functions HASH Private Functions
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* @{
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*/
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/* Private functions */
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HAL_StatusTypeDef HASH_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout, uint32_t Algorithm);
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HAL_StatusTypeDef HASH_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm);
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HAL_StatusTypeDef HASH_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Algorithm);
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HAL_StatusTypeDef HASH_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm);
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HAL_StatusTypeDef HASH_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
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HAL_StatusTypeDef HMAC_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout, uint32_t Algorithm);
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HAL_StatusTypeDef HMAC_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Algorithm);
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HAL_StatusTypeDef HMAC_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint32_t Algorithm);
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/**
|
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* @}
|
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*/
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/**
|
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* @}
|
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*/
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/**
|
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* @}
|
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*/
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#endif /* defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32L4xx_HAL_HASH_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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