mirror of https://github.com/ARMmbed/mbed-os.git
330 lines
9.5 KiB
C
330 lines
9.5 KiB
C
/* mbed Microcontroller Library
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*******************************************************************************
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
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* All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include "spi_api.h"
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#include "mbed_error.h"
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#include "pinmap.h"
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#include "gpio_include.h"
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#if DEVICE_SPI_ASYNCH
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#define SPI_S(obj) (struct spi_s *) (&((obj)->spi))
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#else
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#define SPI_S(obj) (struct spi_s *) (obj)
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#endif
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static const PinMap PinMap_SPI_SCLK[] = {
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{PM0, SPI_0, PIN_DATA(3, 1)},
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{PB2, SPI_1, PIN_DATA(3, 1)},
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{PT2, SPI_2, PIN_DATA(1, 1)},
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{PP5, SPI_3, PIN_DATA(1, 1)},
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{PH4, SPI_4, PIN_DATA(1, 1)},
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{NC, NC, 0}
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};
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static const PinMap PinMap_SPI_MOSI[] = {
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{PM1, SPI_0, PIN_DATA(3, 1)},
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{PB3, SPI_1, PIN_DATA(3, 1)},
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{PT3, SPI_2, PIN_DATA(1, 1)},
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{PP4, SPI_3, PIN_DATA(1, 1)},
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{PH5, SPI_4, PIN_DATA(1, 1)},
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{NC, NC, 0}
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};
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static const PinMap PinMap_SPI_MISO[] = {
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{PM2, SPI_0, PIN_DATA(3, 0)},
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{PB4, SPI_1, PIN_DATA(3, 0)},
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{PT4, SPI_2, PIN_DATA(1, 0)},
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{PP3, SPI_3, PIN_DATA(1, 0)},
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{PH6, SPI_4, PIN_DATA(1, 0)},
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{NC, NC, 0}
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};
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static const PinMap PinMap_SPI_SSEL[] = {
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{PM3, SPI_0, PIN_DATA(3, 1)},
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{PB5, SPI_1, PIN_DATA(3, 1)},
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{PT1, SPI_2, PIN_DATA(2, 1)},
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{PP6, SPI_3, PIN_DATA(1, 1)},
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{NC, NC, 0}
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};
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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// Check pin parameters
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SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
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SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
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SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
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SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
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SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
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obj_s->module = (SPIName)pinmap_merge(spi_data, spi_cntl);
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spi = obj_s->spi;
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switch ((int)obj_s->module) {
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case SPI_0:
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TSB_CG_FSYSENA_IPENA11 = ENABLE;
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TSB_CG_FSYSENB_IPENB00 = ENABLE;
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spi = TSB_TSPI0;
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break;
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case SPI_1:
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TSB_CG_FSYSENA_IPENA01 = ENABLE;
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TSB_CG_FSYSENB_IPENB01 = ENABLE;
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spi = TSB_TSPI1;
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break;
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case SPI_2:
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TSB_CG_FSYSENA_IPENA15 = ENABLE;
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TSB_CG_FSYSENB_IPENB02 = ENABLE;
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spi = TSB_TSPI2;
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break;
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case SPI_3:
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TSB_CG_FSYSENA_IPENA13 = ENABLE;
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TSB_CG_FSYSENB_IPENB03 = ENABLE;
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spi = TSB_TSPI3;
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break;
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case SPI_4:
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TSB_CG_FSYSENA_IPENA07 = ENABLE;
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TSB_CG_FSYSENB_IPENB04 = ENABLE;
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spi = TSB_TSPI4;
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break;
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default:
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error("Cannot found SPI module corresponding with input pins.");
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break;
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}
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obj_s->spi = spi;
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// pin out the SPI pins
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pinmap_pinout(mosi, PinMap_SPI_MOSI);
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pinmap_pinout(miso, PinMap_SPI_MISO);
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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if (ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL);
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}
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// TTSPI Software Reset
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spi->CR0 = TSPI_RESET10;
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spi->CR0 = TSPI_RESET01;
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// Wait for 2 clocks of reset completion
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__NOP();
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__NOP();
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// Enable the selected TSPI peripheral (TTSPIE)
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spi->CR0 = TSPI_ENABLE;
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spi->CR1 = 0;
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spi->CR1 = TSPI_MASTER_OPEARTION;
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spi->CR2 = 0;
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spi->CR2 = (TSPI_TIDLE_LOW | TSPI_TXDEMP_HI);
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// Format control0 Register Set
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spi->FMTR0 = (TSPI_DATA_DIRECTION_MSB | TSPI_DATA_LENGTH_8 |
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TSPI_MIN_IDLE_TIME_1);
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// Format control1 Register Set
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spi->FMTR1 = 0;
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// Enable the selected TSPI peripheral
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spi->CR0 |= TSPI_ENABLE;
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spi_frequency(obj, 1000000);
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}
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void spi_free(spi_t *obj)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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spi = obj_s->spi;
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spi->CR0 |= TSPI_DISABLE;
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spi->CR2 = TSPI_INT_ALL; // Disable all interrupt
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}
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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obj_s->bits = bits;
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spi = obj_s->spi;
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obj_s->bits = bits;
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spi->CR0 |= TSPI_DISABLE;
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if (bits >= 8 || bits <= 32) {
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spi->FMTR0 |= (bits << 24);
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} else {
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// Do nothing
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}
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spi->FMTR0 |= (((mode >> 1) & 0x1) << 14);
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spi->FMTR0 |= ((mode & 0x01) << 15);
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spi->CR0 |= TSPI_ENABLE;
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}
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void spi_frequency(spi_t *obj, int hz)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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int clk_div = 1;
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uint32_t clocks = ((SystemCoreClock / 2) / hz);
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obj_s->spi->CR0 |= TSPI_DISABLE;
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while (clk_div < 10) {
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if (clocks < 16) {
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break;
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}
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clk_div++;
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clocks >>= 1;
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}
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clk_div--;
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if (clk_div == 0) {
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clocks++;
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}
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spi = obj_s->spi;
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spi->CR0 |= TSPI_DISABLE;
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spi->BR = ((clk_div << 4) | clocks);
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spi->CR0 |= TSPI_ENABLE;
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}
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int spi_master_write(spi_t *obj, int value)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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MBED_ASSERT(obj_s != NULL);
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spi = obj_s->spi;
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spi->CR3 |= TSPI_TX_BUFF_CLR_DONE; // FIFO Cear
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// Check if the TSPI is already enabled
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if((spi->CR0 & TSPI_ENABLE) != TSPI_ENABLE) {
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spi->CR0 |= TSPI_ENABLE;
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}
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// Enable TSPI Transmission Control
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spi->CR1 |= TSPI_TRXE_ENABLE;
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// Check the current fill level
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if(((spi->SR & TSPI_TX_REACH_FILL_LEVEL_MASK) >> 16) <= 7) {
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do {
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spi->DR = (value & TSPI_DR_8BIT_MASK);
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// check complete transmit
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} while ((spi->SR & TSPI_TX_DONE_FLAG) != TSPI_TX_DONE);
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spi->CR3 |= TSPI_TX_BUFF_CLR_DONE;
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spi->CR1 &= TSPI_TRXE_DISABLE_MASK;
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}
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if((spi->CR1 & TSPI_Transfer_Mode_MASK) == TSPI_RX_ONLY) {
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// Enable TSPI Transmission Control
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spi->CR1 |= TSPI_TRXE_ENABLE;
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}
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// Check if the TSPI is already enabled
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if((spi->CR0 & TSPI_ENABLE) != TSPI_ENABLE) {
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// Enable TSPI Transmission Control
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spi->CR0 |= TSPI_ENABLE;
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}
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value = 0;
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// Wait until Receive Complete Flag is set to receive data
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if((spi->SR & TSPI_RX_DONE_FLAG) == TSPI_RX_DONE) {
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// Check the remain data exist
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if((spi->SR & TSPI_RX_REACH_FILL_LEVEL_MASK) != 0) {
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value = (spi->DR & TSPI_DR_8BIT_MASK);
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}
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spi->SR |= TSPI_RX_DONE_CLR; // Receive Complete Flag is clear
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spi->CR2 |= TSPI_RX_BUFF_CLR_DONE; // FIFO Clear
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spi->CR1 &= TSPI_TRXE_DISABLE_MASK;
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}
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return value;
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}
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
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char *rx_buffer, int rx_length, char write_fill)
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{
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int total = (tx_length > rx_length) ? tx_length : rx_length;
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for (int i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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}
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}
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return total;
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}
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int spi_busy(spi_t *obj)
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{
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struct spi_s *obj_s = SPI_S(obj);
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TSB_TSPI_TypeDef* spi;
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uint8_t result = 0;
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spi = obj_s->spi;
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if( (spi->SR & (1<<7)) || (spi->SR & (1<<23))) {
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result = 1;
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} else {
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result = 0;
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}
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return result;
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}
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uint8_t spi_get_module(spi_t *obj)
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{
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struct spi_s *obj_s = SPI_S(obj);
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return (uint8_t)(obj_s->module);
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}
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const PinMap *spi_master_mosi_pinmap()
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{
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return PinMap_SPI_MOSI;
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}
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const PinMap *spi_master_miso_pinmap()
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{
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return PinMap_SPI_MISO;
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}
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const PinMap *spi_master_clk_pinmap()
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{
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return PinMap_SPI_SCLK;
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}
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const PinMap *spi_master_cs_pinmap()
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{
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return PinMap_SPI_SSEL;
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}
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const PinMap *spi_slave_mosi_pinmap()
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{
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return PinMap_SPI_MOSI;
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}
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const PinMap *spi_slave_miso_pinmap()
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{
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return PinMap_SPI_MISO;
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}
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const PinMap *spi_slave_clk_pinmap()
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{
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return PinMap_SPI_SCLK;
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}
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const PinMap *spi_slave_cs_pinmap()
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{
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return PinMap_SPI_SSEL;
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}
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