mirror of https://github.com/ARMmbed/mbed-os.git
179 lines
7.2 KiB
C
179 lines
7.2 KiB
C
/**************************************************************************//**
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* @file ebi.c
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* @version V3.00
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* $Revision: 9 $
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* $Date: 15/08/11 10:26a $
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* @brief M451 series EBI driver source file
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*
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* @note
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* Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include "M451Series.h"
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup EBI_Driver EBI Driver
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@{
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*/
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/** @addtogroup EBI_EXPORTED_FUNCTIONS EBI Exported Functions
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@{
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*/
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/**
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* @brief Initialize EBI for specify Bank
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*
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* @param[in] u32DataWidth Data bus width. Valid values are:
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* - \ref EBI_BUSWIDTH_8BIT
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* - \ref EBI_BUSWIDTH_16BIT
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* @param[in] u32TimingClass Default timing configuration. Valid values are:
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* - \ref EBI_TIMING_FASTEST
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* - \ref EBI_TIMING_VERYFAST
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* - \ref EBI_TIMING_FAST
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* - \ref EBI_TIMING_NORMAL
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* - \ref EBI_TIMING_SLOW
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* - \ref EBI_TIMING_VERYSLOW
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* - \ref EBI_TIMING_SLOWEST
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* @param[in] u32BusMode Enable EBI separate mode. This parameter is current not used.
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* @param[in] u32CSActiveLevel CS is active High/Low. Valid values are:
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* - \ref EBI_CS_ACTIVE_HIGH
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* - \ref EBI_CS_ACTIVE_LOW
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*
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* @return none
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*
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* @details This function is used to open specify EBI bank with different bus width, timing setting and \n
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* active level of CS pin to access EBI device.
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* @note Write Buffer Enable(WBUFEN) and Extend Time Of ALE(TALE) are only available in EBI bank0 control register.
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*/
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void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
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{
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volatile uint32_t *pu32EBICTL = (uint32_t *)((uint32_t)&EBI->CTL0 + (u32Bank * 0x10));
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volatile uint32_t *pu32EBITCTL = (uint32_t *)((uint32_t)&EBI->TCTL0 + (u32Bank * 0x10));
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if(u32DataWidth == EBI_BUSWIDTH_8BIT)
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*pu32EBICTL &= ~EBI_CTL0_DW16_Msk;
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else
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*pu32EBICTL |= EBI_CTL0_DW16_Msk;
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switch(u32TimingClass)
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{
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case EBI_TIMING_FASTEST:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_1 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk;
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*pu32EBITCTL = 0x0;
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break;
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case EBI_TIMING_VERYFAST:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_1 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk |
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(0x3 << EBI_CTL0_TALE_Pos) ;
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*pu32EBITCTL = 0x03003318;
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break;
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case EBI_TIMING_FAST:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_2 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk;
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*pu32EBITCTL = 0x0;
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break;
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case EBI_TIMING_NORMAL:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_2 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk |
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(0x3 << EBI_CTL0_TALE_Pos) ;
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*pu32EBITCTL = 0x03003318;
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break;
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case EBI_TIMING_SLOW:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_2 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk |
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(0x7 << EBI_CTL0_TALE_Pos) ;
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*pu32EBITCTL = 0x07007738;
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break;
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case EBI_TIMING_VERYSLOW:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_4 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk |
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(0x7 << EBI_CTL0_TALE_Pos) ;
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*pu32EBITCTL = 0x07007738;
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break;
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case EBI_TIMING_SLOWEST:
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*pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL0_MCLKDIV_Msk | EBI_CTL0_TALE_Msk)) |
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(EBI_MCLKDIV_8 << EBI_CTL0_MCLKDIV_Pos) |
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(u32CSActiveLevel << EBI_CTL0_CSPOLINV_Pos) | EBI_CTL0_EN_Msk |
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(0x7 << EBI_CTL0_TALE_Pos) ;
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*pu32EBITCTL = 0x07007738;
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break;
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default:
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*pu32EBICTL &= ~EBI_CTL0_EN_Msk;
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break;
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}
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}
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/**
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* @brief Disable EBI on specify Bank
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*
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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*
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* @return none
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*
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* @details This function is used to close specify EBI function.
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*/
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void EBI_Close(uint32_t u32Bank)
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{
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volatile uint32_t *pu32EBICTL = (uint32_t *)((uint32_t)&EBI->CTL0 + (u32Bank * 0x10));
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*pu32EBICTL &= ~EBI_CTL0_EN_Msk;
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}
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/**
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* @brief Set EBI Bus Timing for specify Bank
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*
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* @param[in] u32TimingConfig Configure EBI timing settings, includes TACC, TAHD, W2X and R2R setting.
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* @param[in] u32MclkDiv Divider for MCLK. Valid values are:
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* - \ref EBI_MCLKDIV_1
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* - \ref EBI_MCLKDIV_2
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* - \ref EBI_MCLKDIV_4
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* - \ref EBI_MCLKDIV_8
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* - \ref EBI_MCLKDIV_16
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* - \ref EBI_MCLKDIV_32
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*
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* @return none
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*
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* @details This function is used to configure specify EBI bus timing for access EBI device.
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*/
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void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
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{
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volatile uint32_t *pu32EBICTL = (uint32_t *)((uint32_t)&EBI->CTL0 + (u32Bank * 0x10));
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volatile uint32_t *pu32EBITCTL = (uint32_t *)((uint32_t)&EBI->TCTL0 + (u32Bank * 0x10));
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*pu32EBICTL = (*pu32EBICTL & ~EBI_CTL0_MCLKDIV_Msk) | (u32MclkDiv << EBI_CTL0_MCLKDIV_Pos);
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*pu32EBITCTL = u32TimingConfig;
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}
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/*@}*/ /* end of group EBI_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group EBI_Driver */
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/*@}*/ /* end of group Standard_Driver */
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/*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/
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