mbed-os/features
Kevin Bracey ec2db62fe5 lwIP: Enable TCP out-of-order processing
Our config file for lwIP had TCP_QUEUE_OOSEQ disabled - this can
cause significant performance problems, as observed during testing.

One lost packet can lock an input stream into a mode where the
transmitter keeps thinking packets are being lost, so keeps slowing
down. This caused test failures - a transfer that would normally
take 10s hit a 60s timeout.

Turning this on increases code size, but doesn't significantly increase
static memory use. The memory used for out-of-order packets comes from
the same pbuf pool as for outgoing TCP segments, so there is contention
when running bidirectionally.

Out-of-order processing is on by default for lwIP - this seems to be
another example of us excessively paring it back.
2018-05-11 17:12:00 +03:00
..
FEATURE_BLE Merge pull request #6817 from pan-/fix-crypto_toolbox_f4-parameter-types 2018-05-09 11:33:27 -05:00
FEATURE_LWIP/lwip-interface lwIP: Enable TCP out-of-order processing 2018-05-11 17:12:00 +03:00
FEATURE_UVISOR Update uvisor-tests.txt to disable EFM32 in Jenkins 2018-02-06 18:41:19 +02:00
TESTS/filesystem Add overloaded get_erase_size API with address parameter to all block devices 2018-03-23 00:34:45 +02:00
cellular Merge pull request #6792 from jarvte/cellular_dynamic_alloc_and_destr 2018-05-07 10:28:43 -05:00
filesystem Merge pull request #6774 from geky/littlefs-fix-trailing-dots 2018-05-03 16:26:47 +01:00
frameworks Get rid of FEATURE_COMMON_PAL 2018-04-27 14:38:43 +03:00
lorawan Removing abort from rx in case of FL discrepency 2018-05-08 16:45:27 +03:00
mbedtls Merge pull request #6509 from k-stachowiak/nvseed-check 2018-04-10 14:38:47 +02:00
nanostack Move EFR32 RF driver to TARGET_Silicon_Labs/TARGET_SL_RAIL 2018-04-27 14:38:44 +03:00
netsocket Copy edit UARTCellularInterface.h 2018-04-17 11:51:24 -05:00
nvstore Fix typo with NVStore 2018-04-11 14:34:54 +08:00
storage/FEATURE_STORAGE typos 2018-02-20 20:11:19 -05:00
unsupported Add support for STEVAL-3DP001V1 board, which has an STM32F401VE chip. This support is based on the NUCLEO-F401RE board. Which has the same amount of flash/ram but less pins available on the chip. 2018-02-28 09:37:39 +01:00