mirror of https://github.com/ARMmbed/mbed-os.git
				
				
				
			
		
			
				
	
	
		
			203 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
			
		
		
	
	
			203 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
/*
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 *  Hardware entropy collector for the STM32 families
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 *
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 *  Copyright (C) 2006-2016, ARM Limited, All Rights Reserved
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 *  SPDX-License-Identifier: Apache-2.0
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 *
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 *  Licensed under the Apache License, Version 2.0 (the "License"); you may
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 *  not use this file except in compliance with the License.
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 *  You may obtain a copy of the License at
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 *
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 *  http://www.apache.org/licenses/LICENSE-2.0
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 *
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 *  Unless required by applicable law or agreed to in writing, software
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 *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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 *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 *  See the License for the specific language governing permissions and
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 *  limitations under the License.
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 *
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 */
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#if DEVICE_TRNG
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#include <stdlib.h>
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#include "cmsis.h"
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#include "trng_api.h"
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#include "mbed_error.h"
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#include "mbed_atomic.h"
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#if defined (TARGET_STM32WB)
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/*  Family specific include for WB with HW semaphores */
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#include "hw.h"
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#include "hw_conf.h"
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#endif
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void trng_init(trng_t *obj)
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{
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    uint32_t dummy;
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#if defined(RCC_PERIPHCLK_RNG)
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#if defined(TARGET_STM32WB)
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    /*  No need to configure RngClockSelection as already done in SetSysClock */
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#elif defined(TARGET_STM32H7)
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    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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    /*Select PLLQ output as RNG clock source */
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    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
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    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
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#if defined(DUAL_CORE) && (TARGET_STM32H7)
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    while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
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    }
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#endif /* DUAL_CORE */
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    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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        error("RNG clock configuration error\n");
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    }
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#if defined(DUAL_CORE) && (TARGET_STM32H7)
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    LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
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#endif /* DUAL_CORE */
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#elif defined(TARGET_STM32WL)
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    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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    /*Select PLLQ output as RNG clock source*/
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    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
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    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_MSI;
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    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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        error("RNG clock configuration error\n");
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    }
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#elif defined(TARGET_STM32L4)
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    /* RNG and USB clocks have the same source, so the common source selection could be already done by USB */
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    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
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    if (__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY)) {
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        /* MSI clock is enabled, MSI selected as RNG clock source if not alredy done */
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        if (__HAL_RCC_GET_RNG_SOURCE() != RCC_RNGCLKSOURCE_MSI) {
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            PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_MSI;
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            if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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                error("RNG clock configuration error\n");
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            }
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        }
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    } else {
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        /* MSI clock is not enabled, PLL selected as RNG clock source */
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        PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
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        if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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            error("RNG clock configuration error\n");
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        }
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    }
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#elif defined(TARGET_STM32G4)
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    /* RNG and USB clocks have the same HSI48 source which has been enabled in SetSysClock */
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    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
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    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
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    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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        error("RNG clock configuration error\n");
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    }
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#elif defined(TARGET_STM32L5) || defined(TARGET_STM32U5)
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    /*  No need to reconfigure RngClockSelection as already done in SetSysClock */
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#else
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#error("RNG clock not configured");
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#endif
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#endif /* defined(RCC_PERIPHCLK_RNG) */
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    /* RNG Peripheral clock enable */
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    __HAL_RCC_RNG_CLK_ENABLE();
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    /* Initialize RNG instance */
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    obj->handle.Instance = RNG;
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    obj->handle.State = HAL_RNG_STATE_RESET;
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    obj->handle.Lock = HAL_UNLOCKED;
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#if defined(RNG_CR_CED)
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    obj->handle.Init.ClockErrorDetection = RNG_CED_ENABLE;
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#endif
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#if defined(CFG_HW_RNG_SEMID)
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    /*  In case RNG is a shared ressource, get the HW semaphore first */
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    while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
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#endif
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    if (HAL_RNG_Init(&obj->handle) != HAL_OK) {
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        error("trng_init: HAL_RNG_Init\n");
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    }
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    /* first random number generated after setting the RNGEN bit should not be used */
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    /* could be executed few times in case of long init (obj->handle.ErrorCode can be checked for debug) */
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    while (HAL_RNG_GenerateRandomNumber(&obj->handle, &dummy) != HAL_OK) {
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    }
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#if defined(CFG_HW_RNG_SEMID)
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    LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);
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#endif
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}
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void trng_free(trng_t *obj)
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{
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#if defined(CFG_HW_RNG_SEMID)
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    /*  In case RNG is a shared ressource, get the HW semaphore first */
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    while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
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#endif
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    /*Disable the RNG peripheral */
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    HAL_RNG_DeInit(&obj->handle);
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#if defined(CFG_HW_RNG_SEMID)
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    /*  In case RNG is a shared ressource, get the HW semaphore first */
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    LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);
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#else
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    /* RNG Peripheral clock disable - assume we're the only users of RNG  */
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    __HAL_RCC_RNG_CLK_DISABLE();
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#endif
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}
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int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length)
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{
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    int ret = 0;
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    volatile uint8_t random[4];
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    *output_length = 0;
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#if defined(CFG_HW_RNG_SEMID)
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    /*  In case RNG is a shared ressource, get the HW semaphore first */
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    while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
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#endif
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#if defined(TARGET_STM32WB)
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    /* M0+ could have disabled RNG */
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    __HAL_RNG_ENABLE(&obj->handle);
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#endif // TARGET_STM32WB
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    /* Get Random byte */
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    while ((*output_length < length) && (ret == 0)) {
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        if (HAL_RNG_GenerateRandomNumber(&obj->handle, (uint32_t *)random) != HAL_OK) {
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            ret = -1;
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        } else {
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            for (uint8_t i = 0; (i < 4) && (*output_length < length) ; i++) {
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                *output++ = random[i];
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                *output_length += 1;
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                random[i] = 0;
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            }
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        }
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    }
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    /* Just be extra sure that we didn't do it wrong */
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    if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0) {
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        ret = -1;
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    }
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#if defined(CFG_HW_RNG_SEMID)
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    /*  In case RNG is a shared ressource, get the HW semaphore first */
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    LL_HSEM_ReleaseLock(HSEM, CFG_HW_RNG_SEMID, 0);
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#endif
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    return (ret);
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}
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#endif
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