mirror of https://github.com/ARMmbed/mbed-os.git
753 lines
22 KiB
C
753 lines
22 KiB
C
/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#if DEVICE_SERIAL
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#include "serial_api_hal.h"
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#define UART_NUM (8)
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uint32_t serial_irq_ids[UART_NUM] = {0};
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UART_HandleTypeDef uart_handlers[UART_NUM];
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static uart_irq_handler irq_handler;
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// Defined in serial_api.c
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extern int8_t get_uart_index(UARTName uart_name);
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/******************************************************************************
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* INTERRUPTS HANDLING
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******************************************************************************/
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static void uart_irq(UARTName uart_name)
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{
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int8_t id = get_uart_index(uart_name);
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if (id >= 0) {
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UART_HandleTypeDef *huart = &uart_handlers[id];
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if (serial_irq_ids[id] != 0) {
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if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) {
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if (__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET && __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE)) {
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irq_handler(serial_irq_ids[id], TxIrq);
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}
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}
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if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
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if (__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET && __HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE)) {
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irq_handler(serial_irq_ids[id], RxIrq);
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/* Flag has been cleared when reading the content */
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}
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}
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if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
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if (__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) {
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__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
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}
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}
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}
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}
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}
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#if defined(USART1_BASE)
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static void uart1_irq(void)
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{
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uart_irq(UART_1);
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}
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#endif
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#if defined(USART2_BASE)
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static void uart2_irq(void)
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{
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uart_irq(UART_2);
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}
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#endif
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#if defined(USART3_BASE)
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static void uart3_irq(void)
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{
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uart_irq(UART_3);
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}
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#endif
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#if defined(UART4_BASE)
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static void uart4_irq(void)
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{
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uart_irq(UART_4);
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}
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#endif
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#if defined(UART5_BASE)
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static void uart5_irq(void)
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{
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uart_irq(UART_5);
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}
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#endif
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#if defined(USART6_BASE)
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static void uart6_irq(void)
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{
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uart_irq(UART_6);
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}
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#endif
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#if defined(UART7_BASE)
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static void uart7_irq(void)
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{
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uart_irq(UART_7);
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}
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#endif
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#if defined(UART8_BASE)
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static void uart8_irq(void)
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{
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uart_irq(UART_8);
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}
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#endif
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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irq_handler = handler;
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serial_irq_ids[obj_s->index] = id;
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}
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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IRQn_Type irq_n = (IRQn_Type)0;
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uint32_t vector = 0;
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switch (obj_s->uart) {
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#if defined(USART1_BASE)
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case UART_1:
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irq_n = USART1_IRQn;
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vector = (uint32_t)&uart1_irq;
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break;
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#endif
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#if defined(USART2_BASE)
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case UART_2:
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irq_n = USART2_IRQn;
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vector = (uint32_t)&uart2_irq;
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break;
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#endif
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#if defined(USART3_BASE)
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case UART_3:
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irq_n = USART3_IRQn;
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vector = (uint32_t)&uart3_irq;
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break;
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#endif
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#if defined(UART4_BASE)
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case UART_4:
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irq_n = UART4_IRQn;
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vector = (uint32_t)&uart4_irq;
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break;
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#endif
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#if defined(UART5_BASE)
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case UART_5:
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irq_n = UART5_IRQn;
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vector = (uint32_t)&uart5_irq;
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break;
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#endif
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#if defined(USART6_BASE)
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case UART_6:
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irq_n = USART6_IRQn;
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vector = (uint32_t)&uart6_irq;
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break;
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#endif
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#if defined(UART7_BASE)
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case UART_7:
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irq_n = UART7_IRQn;
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vector = (uint32_t)&uart7_irq;
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break;
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#endif
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#if defined(UART8_BASE)
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case UART_8:
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irq_n = UART8_IRQn;
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vector = (uint32_t)&uart8_irq;
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break;
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#endif
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}
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if (enable) {
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if (irq == RxIrq) {
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__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
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} else { // TxIrq
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__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
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}
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NVIC_SetVector(irq_n, vector);
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NVIC_EnableIRQ(irq_n);
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} else { // disable
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int all_disabled = 0;
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if (irq == RxIrq) {
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__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
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// Check if TxIrq is disabled too
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if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
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all_disabled = 1;
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}
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} else { // TxIrq
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__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
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// Check if RxIrq is disabled too
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if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
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all_disabled = 1;
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}
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}
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if (all_disabled) {
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NVIC_DisableIRQ(irq_n);
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}
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}
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}
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/******************************************************************************
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* READ/WRITE
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******************************************************************************/
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int serial_getc(serial_t *obj)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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/* Computation of UART mask to apply to RDR register */
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UART_MASK_COMPUTATION(huart);
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uint16_t uhMask = huart->Mask;
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while (!serial_readable(obj));
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/* When receiving with the parity enabled, the value read in the MSB bit
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* is the received parity bit.
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*/
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return (int)(huart->Instance->RDR & uhMask);
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}
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void serial_putc(serial_t *obj, int c)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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while (!serial_writable(obj));
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/* When transmitting with the parity enabled (PCE bit set to 1 in the
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* USART_CR1 register), the value written in the MSB (bit 7 or bit 8
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* depending on the data length) has no effect because it is replaced
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* by the parity.
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*/
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huart->Instance->TDR = (uint16_t)(c & 0x1FFU);
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}
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void serial_clear(serial_t *obj)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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/* Clear RXNE and error flags */
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volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->RDR;
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HAL_UART_ErrorCallback(huart);
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}
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void serial_break_set(serial_t *obj)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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HAL_LIN_SendBreak(huart);
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}
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#if DEVICE_SERIAL_ASYNCH
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/******************************************************************************
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* LOCAL HELPER FUNCTIONS
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******************************************************************************/
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/**
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* Configure the TX buffer for an asynchronous write serial transaction
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*
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* @param obj The serial object.
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* @param tx The buffer for sending.
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* @param tx_length The number of words to transmit.
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*/
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static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
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{
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(void)width;
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// Exit if a transmit is already on-going
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if (serial_tx_active(obj)) {
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return;
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}
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obj->tx_buff.buffer = tx;
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obj->tx_buff.length = tx_length;
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obj->tx_buff.pos = 0;
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}
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/**
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* Configure the RX buffer for an asynchronous write serial transaction
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*
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* @param obj The serial object.
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* @param tx The buffer for sending.
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* @param tx_length The number of words to transmit.
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*/
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static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
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{
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(void)width;
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// Exit if a reception is already on-going
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if (serial_rx_active(obj)) {
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return;
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}
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obj->rx_buff.buffer = rx;
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obj->rx_buff.length = rx_length;
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obj->rx_buff.pos = 0;
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}
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/**
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* Configure events
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*
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* @param obj The serial object
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* @param event The logical OR of the events to configure
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* @param enable Set to non-zero to enable events, or zero to disable them
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*/
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static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
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{
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struct serial_s *obj_s = SERIAL_S(obj);
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// Shouldn't have to enable interrupt here, just need to keep track of the requested events.
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if (enable) {
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obj_s->events |= event;
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} else {
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obj_s->events &= ~event;
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}
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}
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/**
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* Get index of serial object TX IRQ, relating it to the physical peripheral.
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*
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* @param uart_name i.e. UART_1, UART_2, ...
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* @return internal NVIC TX IRQ index of U(S)ART peripheral
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*/
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static IRQn_Type serial_get_irq_n(UARTName uart_name)
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{
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IRQn_Type irq_n;
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switch (uart_name) {
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#if defined(USART1_BASE)
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case UART_1:
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irq_n = USART1_IRQn;
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break;
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#endif
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#if defined(USART2_BASE)
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case UART_2:
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irq_n = USART2_IRQn;
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break;
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#endif
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#if defined(USART3_BASE)
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case UART_3:
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irq_n = USART3_IRQn;
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break;
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#endif
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#if defined(UART4_BASE)
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case UART_4:
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irq_n = UART4_IRQn;
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break;
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#endif
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#if defined(UART5_BASE)
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case UART_5:
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irq_n = UART5_IRQn;
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break;
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#endif
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#if defined(USART6_BASE)
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case UART_6:
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irq_n = USART6_IRQn;
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break;
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#endif
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#if defined(UART7_BASE)
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case UART_7:
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irq_n = UART7_IRQn;
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break;
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#endif
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#if defined(UART8_BASE)
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case UART_8:
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irq_n = UART8_IRQn;
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break;
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#endif
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default:
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irq_n = (IRQn_Type)0;
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}
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return irq_n;
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}
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/******************************************************************************
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* MBED API FUNCTIONS
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******************************************************************************/
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/**
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* Begin asynchronous TX transfer. The used buffer is specified in the serial
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* object, tx_buff
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*
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* @param obj The serial object
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* @param tx The buffer for sending
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* @param tx_length The number of words to transmit
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* @param tx_width The bit width of buffer word
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* @param handler The serial handler
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* @param event The logical OR of events to be registered
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* @param hint A suggestion for how to use DMA with this transfer
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* @return Returns number of data transfered, or 0 otherwise
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*/
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int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
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{
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// TODO: DMA usage is currently ignored
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(void) hint;
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// Check buffer is ok
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MBED_ASSERT(tx != (void *)0);
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MBED_ASSERT(tx_width == 8); // support only 8b width
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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if (tx_length == 0) {
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return 0;
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}
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// Set up buffer
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serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
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// Set up events
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serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
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serial_enable_event(obj, event, 1); // Set only the wanted events
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// Enable interrupt
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IRQn_Type irq_n = serial_get_irq_n(obj_s->uart);
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NVIC_ClearPendingIRQ(irq_n);
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NVIC_DisableIRQ(irq_n);
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NVIC_SetPriority(irq_n, 1);
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NVIC_SetVector(irq_n, (uint32_t)handler);
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NVIC_EnableIRQ(irq_n);
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// the following function will enable UART_IT_TXE and error interrupts
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if (HAL_UART_Transmit_IT(huart, (uint8_t *)tx, tx_length) != HAL_OK) {
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return 0;
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}
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return tx_length;
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}
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/**
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* Begin asynchronous RX transfer (enable interrupt for data collecting)
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* The used buffer is specified in the serial object, rx_buff
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*
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* @param obj The serial object
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* @param rx The buffer for sending
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* @param rx_length The number of words to transmit
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* @param rx_width The bit width of buffer word
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* @param handler The serial handler
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* @param event The logical OR of events to be registered
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* @param handler The serial handler
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* @param char_match A character in range 0-254 to be matched
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* @param hint A suggestion for how to use DMA with this transfer
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*/
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void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
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{
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// TODO: DMA usage is currently ignored
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(void) hint;
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/* Sanity check arguments */
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MBED_ASSERT(obj);
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MBED_ASSERT(rx != (void *)0);
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MBED_ASSERT(rx_width == 8); // support only 8b width
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
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serial_enable_event(obj, event, 1);
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// set CharMatch
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obj->char_match = char_match;
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serial_rx_buffer_set(obj, rx, rx_length, rx_width);
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IRQn_Type irq_n = serial_get_irq_n(obj_s->uart);
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NVIC_ClearPendingIRQ(irq_n);
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NVIC_DisableIRQ(irq_n);
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NVIC_SetPriority(irq_n, 0);
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NVIC_SetVector(irq_n, (uint32_t)handler);
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NVIC_EnableIRQ(irq_n);
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// following HAL function will enable the RXNE interrupt + error interrupts
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HAL_UART_Receive_IT(huart, (uint8_t *)rx, rx_length);
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}
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/**
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* Attempts to determine if the serial peripheral is already in use for TX
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*
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* @param obj The serial object
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* @return Non-zero if the TX transaction is ongoing, 0 otherwise
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*/
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uint8_t serial_tx_active(serial_t *obj)
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{
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MBED_ASSERT(obj);
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struct serial_s *obj_s = SERIAL_S(obj);
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UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
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return (((HAL_UART_GetState(huart) & HAL_UART_STATE_BUSY_TX) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
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|
}
|
|
|
|
/**
|
|
* Attempts to determine if the serial peripheral is already in use for RX
|
|
*
|
|
* @param obj The serial object
|
|
* @return Non-zero if the RX transaction is ongoing, 0 otherwise
|
|
*/
|
|
uint8_t serial_rx_active(serial_t *obj)
|
|
{
|
|
MBED_ASSERT(obj);
|
|
|
|
struct serial_s *obj_s = SERIAL_S(obj);
|
|
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
|
|
|
|
return (((HAL_UART_GetState(huart) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
|
|
}
|
|
|
|
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
|
|
{
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
|
|
}
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
|
|
}
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
|
|
}
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* The asynchronous TX and RX handler.
|
|
*
|
|
* @param obj The serial object
|
|
* @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
|
|
*/
|
|
int serial_irq_handler_asynch(serial_t *obj)
|
|
{
|
|
struct serial_s *obj_s = SERIAL_S(obj);
|
|
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
|
|
|
|
volatile int return_event = 0;
|
|
uint8_t *buf = (uint8_t *)(obj->rx_buff.buffer);
|
|
size_t i = 0;
|
|
|
|
// TX PART:
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
|
|
if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
|
|
// Return event SERIAL_EVENT_TX_COMPLETE if requested
|
|
if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE) != 0) {
|
|
return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Handle error events
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
|
|
if (__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) {
|
|
return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
|
|
}
|
|
}
|
|
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
|
|
if (__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) {
|
|
return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
|
|
}
|
|
}
|
|
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
|
|
if (__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) {
|
|
return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
|
|
}
|
|
}
|
|
|
|
HAL_UART_IRQHandler(huart);
|
|
|
|
// Abort if an error occurs
|
|
if ((return_event & SERIAL_EVENT_RX_PARITY_ERROR) ||
|
|
(return_event & SERIAL_EVENT_RX_FRAMING_ERROR) ||
|
|
(return_event & SERIAL_EVENT_RX_OVERRUN_ERROR)) {
|
|
return return_event;
|
|
}
|
|
|
|
//RX PART
|
|
if (huart->RxXferSize != 0) {
|
|
obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
|
|
}
|
|
if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
|
|
return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
|
|
}
|
|
|
|
// Check if char_match is present
|
|
if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
|
|
if (buf != NULL) {
|
|
for (i = 0; i < obj->rx_buff.pos; i++) {
|
|
if (buf[i] == obj->char_match) {
|
|
obj->rx_buff.pos = i;
|
|
return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
|
|
serial_rx_abort_asynch(obj);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return return_event;
|
|
}
|
|
|
|
/**
|
|
* Abort the ongoing TX transaction. It disables the enabled interupt for TX and
|
|
* flush TX hardware buffer if TX FIFO is used
|
|
*
|
|
* @param obj The serial object
|
|
*/
|
|
void serial_tx_abort_asynch(serial_t *obj)
|
|
{
|
|
struct serial_s *obj_s = SERIAL_S(obj);
|
|
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
|
|
|
|
__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
|
|
__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
|
|
|
|
// reset states
|
|
huart->TxXferCount = 0;
|
|
// update handle state
|
|
if (huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
|
|
huart->gState = HAL_UART_STATE_BUSY_RX;
|
|
} else {
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Abort the ongoing RX transaction It disables the enabled interrupt for RX and
|
|
* flush RX hardware buffer if RX FIFO is used
|
|
*
|
|
* @param obj The serial object
|
|
*/
|
|
void serial_rx_abort_asynch(serial_t *obj)
|
|
{
|
|
struct serial_s *obj_s = SERIAL_S(obj);
|
|
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
|
|
|
|
// disable interrupts
|
|
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
|
|
__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
|
|
__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
|
|
|
|
// clear flags
|
|
volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->RDR; // Clear RXNE
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
|
|
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
|
|
|
|
// reset states
|
|
huart->RxXferCount = 0;
|
|
// update handle state
|
|
if (huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
|
|
huart->RxState = HAL_UART_STATE_BUSY_TX;
|
|
} else {
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
}
|
|
}
|
|
|
|
#endif /* DEVICE_SERIAL_ASYNCH */
|
|
|
|
#if DEVICE_SERIAL_FC
|
|
|
|
/**
|
|
* Set HW Control Flow
|
|
* @param obj The serial object
|
|
* @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
|
|
* @param rxflow Pin for the rxflow
|
|
* @param txflow Pin for the txflow
|
|
*/
|
|
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
|
|
{
|
|
struct serial_s *obj_s = SERIAL_S(obj);
|
|
|
|
// Checked used UART name (UART_1, UART_2, ...)
|
|
UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
|
|
UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
|
|
if (((UARTName)pinmap_merge(uart_rts, obj_s->uart) == (UARTName)NC) || ((UARTName)pinmap_merge(uart_cts, obj_s->uart) == (UARTName)NC)) {
|
|
MBED_ASSERT(0);
|
|
return;
|
|
}
|
|
|
|
if (type == FlowControlNone) {
|
|
// Disable hardware flow control
|
|
obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
|
|
}
|
|
if (type == FlowControlRTS) {
|
|
// Enable RTS
|
|
MBED_ASSERT(uart_rts != (UARTName)NC);
|
|
obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
|
|
obj_s->pin_rts = rxflow;
|
|
// Enable the pin for RTS function
|
|
pinmap_pinout(rxflow, PinMap_UART_RTS);
|
|
}
|
|
if (type == FlowControlCTS) {
|
|
// Enable CTS
|
|
MBED_ASSERT(uart_cts != (UARTName)NC);
|
|
obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
|
|
obj_s->pin_cts = txflow;
|
|
// Enable the pin for CTS function
|
|
pinmap_pinout(txflow, PinMap_UART_CTS);
|
|
}
|
|
if (type == FlowControlRTSCTS) {
|
|
// Enable CTS & RTS
|
|
MBED_ASSERT(uart_rts != (UARTName)NC);
|
|
MBED_ASSERT(uart_cts != (UARTName)NC);
|
|
obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
|
|
obj_s->pin_rts = rxflow;
|
|
obj_s->pin_cts = txflow;
|
|
// Enable the pin for CTS function
|
|
pinmap_pinout(txflow, PinMap_UART_CTS);
|
|
// Enable the pin for RTS function
|
|
pinmap_pinout(rxflow, PinMap_UART_RTS);
|
|
}
|
|
|
|
init_uart(obj);
|
|
}
|
|
|
|
#endif /* DEVICE_SERIAL_FC */
|
|
|
|
#endif /* DEVICE_SERIAL */
|