mirror of https://github.com/ARMmbed/mbed-os.git
560 lines
17 KiB
C
560 lines
17 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "mbed_assert.h"
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#include "pwmout_api.h"
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#include "cmsis.h"
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#include "pinmap.h"
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#include "RZ_A1_Init.h"
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#include "cpg_iodefine.h"
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#include "pwm_iodefine.h"
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#include "gpio_addrdefine.h"
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#define MTU2_PWM_NUM 22
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#define MTU2_PWM_SIGNAL 2
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#define MTU2_PWM_OFFSET 0x20
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// PORT ID, PWM ID, Pin function
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static const PinMap PinMap_PWM[] = {
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{P2_1 , MTU2_PWM0_PIN , 6},
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{P2_11 , MTU2_PWM1_PIN , 5},
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{P3_8 , MTU2_PWM2_PIN , 6},
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{P3_10 , MTU2_PWM3_PIN , 6},
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{P4_0 , MTU2_PWM4_PIN , 2},
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{P4_4 , MTU2_PWM5_PIN , 3},
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{P4_6 , MTU2_PWM6_PIN , 3},
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{P5_0 , MTU2_PWM7_PIN , 6},
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{P5_3 , MTU2_PWM8_PIN , 6},
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{P5_5 , MTU2_PWM9_PIN , 6},
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{P7_2 , MTU2_PWM10_PIN , 7},
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{P7_4 , MTU2_PWM11_PIN , 7},
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{P7_6 , MTU2_PWM12_PIN , 7},
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{P7_10 , MTU2_PWM13_PIN , 7},
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{P7_12 , MTU2_PWM14_PIN , 7},
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{P7_14 , MTU2_PWM15_PIN , 7},
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{P8_8 , MTU2_PWM16_PIN , 5},
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{P8_10 , MTU2_PWM17_PIN , 4},
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{P8_12 , MTU2_PWM18_PIN , 4},
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{P8_14 , MTU2_PWM19_PIN , 4},
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{P11_0 , MTU2_PWM20_PIN , 2},
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{P11_2 , MTU2_PWM21_PIN , 2},
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{P4_4 , PWM0_PIN , 4},
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{P3_2 , PWM1_PIN , 7},
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{P4_6 , PWM2_PIN , 4},
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{P4_7 , PWM3_PIN , 4},
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{P8_14 , PWM4_PIN , 6},
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{P8_15 , PWM5_PIN , 6},
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{P8_13 , PWM6_PIN , 6},
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{P8_11 , PWM7_PIN , 6},
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{P8_8 , PWM8_PIN , 6},
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{P10_0 , PWM9_PIN , 3},
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{P8_12 , PWM10_PIN , 6},
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{P8_9 , PWM11_PIN , 6},
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{P8_10 , PWM12_PIN , 6},
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{P4_5 , PWM13_PIN , 4},
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{NC , NC , 0}
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};
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static const PWMType PORT[] = {
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PWM2E, // PWM0_PIN
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PWM2C, // PWM1_PIN
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PWM2G, // PWM2_PIN
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PWM2H, // PWM3_PIN
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PWM1G, // PWM4_PIN
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PWM1H, // PWM5_PIN
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PWM1F, // PWM6_PIN
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PWM1D, // PWM7_PIN
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PWM1A, // PWM8_PIN
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PWM2A, // PWM9_PIN
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PWM1E, // PWM10_PIN
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PWM1B, // PWM11_PIN
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PWM1C, // PWM12_PIN
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PWM2F, // PWM13_PIN
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};
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static const MTU2_PWMType MTU2_PORT[] = {
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TIOC2A, // MTU2_PWM0_PIN
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TIOC1A, // MTU2_PWM1_PIN
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TIOC4A, // MTU2_PWM2_PIN
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TIOC4C, // MTU2_PWM3_PIN
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TIOC0A, // MTU2_PWM4_PIN
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TIOC4A, // MTU2_PWM5_PIN
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TIOC4C, // MTU2_PWM6_PIN
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TIOC0A, // MTU2_PWM7_PIN
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TIOC3C, // MTU2_PWM8_PIN
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TIOC0C, // MTU2_PWM9_PIN
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TIOC0C, // MTU2_PWM10_PIN
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TIOC1A, // MTU2_PWM11_PIN
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TIOC2A, // MTU2_PWM12_PIN
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TIOC3C, // MTU2_PWM13_PIN
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TIOC4A, // MTU2_PWM14_PIN
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TIOC4C, // MTU2_PWM15_PIN
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TIOC1A, // MTU2_PWM16_PIN
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TIOC3A, // MTU2_PWM17_PIN
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TIOC3C, // MTU2_PWM18_PIN
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TIOC2A, // MTU2_PWM19_PIN
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TIOC4A, // MTU2_PWM20_PIN
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TIOC4C, // MTU2_PWM21_PIN
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};
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static __IO uint16_t *PWM_MATCH[] = {
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&PWMPWBFR_2E, // PWM0_PIN
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&PWMPWBFR_2C, // PWM1_PIN
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&PWMPWBFR_2G, // PWM2_PIN
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&PWMPWBFR_2G, // PWM3_PIN
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&PWMPWBFR_1G, // PWM4_PIN
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&PWMPWBFR_1G, // PWM5_PIN
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&PWMPWBFR_1E, // PWM6_PIN
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&PWMPWBFR_1C, // PWM7_PIN
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&PWMPWBFR_1A, // PWM8_PIN
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&PWMPWBFR_2A, // PWM9_PIN
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&PWMPWBFR_1E, // PWM10_PIN
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&PWMPWBFR_1A, // PWM11_PIN
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&PWMPWBFR_1C, // PWM12_PIN
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&PWMPWBFR_2E, // PWM13_PIN
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};
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static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
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{ &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM0_PIN
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{ &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM1_PIN
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{ &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM2_PIN
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{ &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM3_PIN
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{ &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM4_PIN
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{ &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM5_PIN
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{ &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM6_PIN
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{ &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM7_PIN
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{ &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM8_PIN
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{ &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM9_PIN
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{ &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM10_PIN
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{ &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM11_PIN
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{ &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM12_PIN
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{ &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM13_PIN
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{ &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM14_PIN
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{ &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM15_PIN
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{ &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM16_PIN
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{ &MTU2TGRA_3, &MTU2TGRB_3 }, // MTU2_PWM17_PIN
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{ &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM18_PIN
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{ &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM19_PIN
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{ &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM20_PIN
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{ &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM21_PIN
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};
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static __IO uint8_t *TCR_MATCH[] = {
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&MTU2TCR_0,
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&MTU2TCR_1,
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&MTU2TCR_2,
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&MTU2TCR_3,
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&MTU2TCR_4,
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};
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static __IO uint8_t *TIORH_MATCH[] = {
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&MTU2TIORH_0,
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&MTU2TIOR_1,
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&MTU2TIOR_2,
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&MTU2TIORH_3,
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&MTU2TIORH_4,
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};
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static __IO uint8_t *TIORL_MATCH[] = {
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&MTU2TIORL_0,
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NULL,
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NULL,
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&MTU2TIORL_3,
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&MTU2TIORL_4,
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};
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static __IO uint16_t *TGRA_MATCH[] = {
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&MTU2TGRA_0,
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&MTU2TGRA_1,
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&MTU2TGRA_2,
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&MTU2TGRA_3,
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&MTU2TGRA_4,
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};
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static __IO uint16_t *TGRC_MATCH[] = {
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&MTU2TGRC_0,
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NULL,
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NULL,
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&MTU2TGRC_3,
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&MTU2TGRC_4,
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};
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static __IO uint8_t *TMDR_MATCH[] = {
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&MTU2TMDR_0,
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&MTU2TMDR_1,
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&MTU2TMDR_2,
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&MTU2TMDR_3,
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&MTU2TMDR_4,
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};
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static int MAX_PERIOD[] = {
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125000,
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503000,
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2000000,
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2000000,
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2000000,
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};
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typedef enum {
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MTU2_PULSE = 0,
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MTU2_PERIOD
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} MTU2Signal;
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static uint16_t init_period_ch1 = 0;
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static uint16_t init_period_ch2 = 0;
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static uint16_t init_mtu2_period_ch[5] = {0};
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static int32_t period_ch1 = 1;
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static int32_t period_ch2 = 1;
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static int32_t mtu2_period_ch[5] = {1, 1, 1, 1, 1};
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void pwmout_init(pwmout_t* obj, PinName pin) {
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// determine the channel
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PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
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MBED_ASSERT(pwm != (PWMName)NC);
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if (pwm >= MTU2_PWM_OFFSET) {
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/* PWM by MTU2 */
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int tmp_pwm;
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// power on
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CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33);
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obj->pwm = pwm;
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tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
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if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000040) == 0x00000040) {
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obj->ch = 4;
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MTU2TOER |= 0x36;
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} else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000030) == 0x00000030) {
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obj->ch = 3;
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MTU2TOER |= 0x09;
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} else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000020) == 0x00000020) {
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obj->ch = 2;
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} else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000010) == 0x00000010) {
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obj->ch = 1;
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} else {
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obj->ch = 0;
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}
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// Wire pinout
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pinmap_pinout(pin, PinMap_PWM);
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int bitmask = 1 << (pin & 0xf);
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*PMSR(PINGROUP(pin)) = (bitmask << 16) | 0;
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// default duty 0.0f
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pwmout_write(obj, 0);
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if (init_mtu2_period_ch[obj->ch] == 0) {
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// default period 1ms
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pwmout_period_us(obj, 1000);
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init_mtu2_period_ch[obj->ch] = 1;
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}
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} else {
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/* PWM */
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// power on
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CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP30);
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obj->pwm = pwm;
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if (((uint32_t)PORT[obj->pwm] & 0x00000010) == 0x00000010) {
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obj->ch = 2;
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PWMPWPR_2_BYTE_L = 0x00;
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} else {
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obj->ch = 1;
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PWMPWPR_1_BYTE_L = 0x00;
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}
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// Wire pinout
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pinmap_pinout(pin, PinMap_PWM);
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// default to 491us: standard for servos, and fine for e.g. brightness control
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pwmout_write(obj, 0);
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if ((obj->ch == 2) && (init_period_ch2 == 0)) {
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pwmout_period_us(obj, 491);
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init_period_ch2 = 1;
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}
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if ((obj->ch == 1) && (init_period_ch1 == 0)) {
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pwmout_period_us(obj, 491);
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init_period_ch1 = 1;
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}
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}
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}
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void pwmout_free(pwmout_t* obj) {
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pwmout_write(obj, 0);
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}
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void pwmout_write(pwmout_t* obj, float value) {
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uint32_t wk_cycle;
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uint16_t v;
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if (obj->pwm >= MTU2_PWM_OFFSET) {
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/* PWM by MTU2 */
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int tmp_pwm;
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if (value < 0.0f) {
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value = 0.0f;
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} else if (value > 1.0f) {
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value = 1.0f;
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} else {
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// Do Nothing
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}
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tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
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wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
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// set channel match to percentage
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*MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)((float)wk_cycle * value);
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} else {
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/* PWM */
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if (value < 0.0f) {
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value = 0.0f;
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} else if (value > 1.0f) {
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value = 1.0f;
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} else {
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// Do Nothing
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}
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if (obj->ch == 2) {
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wk_cycle = PWMPWCYR_2 & 0x03ff;
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} else {
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wk_cycle = PWMPWCYR_1 & 0x03ff;
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}
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// set channel match to percentage
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v = (uint16_t)((float)wk_cycle * value);
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*PWM_MATCH[obj->pwm] = (v | ((PORT[obj->pwm] & 1) << 12));
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}
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}
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float pwmout_read(pwmout_t* obj) {
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uint32_t wk_cycle;
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float value;
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if (obj->pwm >= MTU2_PWM_OFFSET) {
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/* PWM by MTU2 */
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uint32_t wk_pulse;
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int tmp_pwm;
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tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
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wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
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wk_pulse = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] & 0xffff;
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value = ((float)wk_pulse / (float)wk_cycle);
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} else {
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/* PWM */
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if (obj->ch == 2) {
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wk_cycle = PWMPWCYR_2 & 0x03ff;
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} else {
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wk_cycle = PWMPWCYR_1 & 0x03ff;
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}
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value = ((float)(*PWM_MATCH[obj->pwm] & 0x03ff) / (float)wk_cycle);
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}
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return (value > 1.0f) ? (1.0f) : (value);
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}
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void pwmout_period(pwmout_t* obj, float seconds) {
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pwmout_period_us(obj, seconds * 1000000.0f);
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}
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void pwmout_period_ms(pwmout_t* obj, int ms) {
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pwmout_period_us(obj, ms * 1000);
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}
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static void set_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
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uint16_t wk_pwmpbfr;
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float value;
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uint16_t v;
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wk_pwmpbfr = *p_pwmpbfr;
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value = ((float)(wk_pwmpbfr & 0x03ff) / (float)last_cycle);
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v = (uint16_t)((float)new_cycle * value);
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*p_pwmpbfr = (v | (wk_pwmpbfr & 0x1000));
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}
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static void set_mtu2_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
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uint16_t wk_pwmpbfr;
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float value;
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wk_pwmpbfr = *p_pwmpbfr;
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value = ((float)(wk_pwmpbfr & 0xffff) / (float)last_cycle);
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*p_pwmpbfr = (uint16_t)((float)new_cycle * value);
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}
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// Set the PWM period, keeping the duty cycle the same.
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void pwmout_period_us(pwmout_t* obj, int us) {
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uint64_t wk_cycle_mtu2;
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uint32_t pclk_base;
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uint32_t wk_cycle;
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uint32_t wk_cks = 0;
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uint16_t wk_last_cycle;
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int max_us = 0;
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if (obj->pwm >= MTU2_PWM_OFFSET) {
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/* PWM by MTU2 */
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int tmp_pwm;
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uint8_t tmp_tcr_up;
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uint8_t tmp_tstr_sp;
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uint8_t tmp_tstr_st;
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max_us = MAX_PERIOD[obj->ch];
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if (us > max_us) {
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us = max_us;
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} else if (us < 1) {
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us = 1;
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} else {
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// Do Nothing
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}
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if (RZ_A1_IsClockMode0() == false) {
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pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK;
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} else {
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pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK;
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}
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wk_cycle_mtu2 = (uint64_t)pclk_base * us;
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while (wk_cycle_mtu2 >= 65535000000) {
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if ((obj->ch == 1) && (wk_cks == 3)) {
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wk_cks+=2;
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|
} else if ((obj->ch == 2) && (wk_cks == 3)) {
|
|
wk_cycle_mtu2 >>= 2;
|
|
wk_cks+=3;
|
|
}
|
|
wk_cycle_mtu2 >>= 2;
|
|
wk_cks++;
|
|
}
|
|
wk_cycle = (uint32_t)(wk_cycle_mtu2 / 1000000);
|
|
|
|
tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
|
|
if (((uint8_t)MTU2_PORT[tmp_pwm] & 0x02) == 0x02) {
|
|
tmp_tcr_up = 0xC0;
|
|
} else {
|
|
tmp_tcr_up = 0x40;
|
|
}
|
|
if ((obj->ch == 4) || (obj->ch == 3)) {
|
|
tmp_tstr_sp = ~(0x38 | (1 << (obj->ch + 3)));
|
|
tmp_tstr_st = (1 << (obj->ch + 3));
|
|
} else {
|
|
tmp_tstr_sp = ~(0x38 | (1 << obj->ch));
|
|
tmp_tstr_st = (1 << obj->ch);
|
|
}
|
|
// Counter Stop
|
|
MTU2TSTR &= tmp_tstr_sp;
|
|
wk_last_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
|
|
*TCR_MATCH[obj->ch] = tmp_tcr_up | wk_cks;
|
|
*TIORH_MATCH[obj->ch] = 0x21;
|
|
if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
|
|
*TIORL_MATCH[obj->ch] = 0x21;
|
|
}
|
|
*MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] = (uint16_t)wk_cycle; // Set period
|
|
|
|
// Set duty again(TGRA)
|
|
set_mtu2_duty_again(TGRA_MATCH[obj->ch], wk_last_cycle, wk_cycle);
|
|
if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
|
|
// Set duty again(TGRC)
|
|
set_mtu2_duty_again(TGRC_MATCH[obj->ch], wk_last_cycle, wk_cycle);
|
|
}
|
|
*TMDR_MATCH[obj->ch] = 0x02; // PWM mode 1
|
|
|
|
// Counter Start
|
|
MTU2TSTR |= tmp_tstr_st;
|
|
// Save for future use
|
|
mtu2_period_ch[obj->ch] = us;
|
|
} else {
|
|
/* PWM */
|
|
if (us > 491) {
|
|
us = 491;
|
|
} else if (us < 1) {
|
|
us = 1;
|
|
} else {
|
|
// Do Nothing
|
|
}
|
|
|
|
if (RZ_A1_IsClockMode0() == false) {
|
|
pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK / 10000;
|
|
} else {
|
|
pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK / 10000;
|
|
}
|
|
|
|
wk_cycle = pclk_base * us;
|
|
while (wk_cycle >= 102350) {
|
|
wk_cycle >>= 1;
|
|
wk_cks++;
|
|
}
|
|
wk_cycle = (wk_cycle + 50) / 100;
|
|
|
|
if (obj->ch == 2) {
|
|
wk_last_cycle = PWMPWCYR_2 & 0x03ff;
|
|
PWMPWCR_2_BYTE_L = 0xc0 | wk_cks;
|
|
PWMPWCYR_2 = (uint16_t)wk_cycle;
|
|
|
|
// Set duty again
|
|
set_duty_again(&PWMPWBFR_2A, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_2C, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_2E, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_2G, wk_last_cycle, wk_cycle);
|
|
|
|
// Counter Start
|
|
PWMPWCR_2_BYTE_L |= 0x08;
|
|
|
|
// Save for future use
|
|
period_ch2 = us;
|
|
} else {
|
|
wk_last_cycle = PWMPWCYR_1 & 0x03ff;
|
|
PWMPWCR_1_BYTE_L = 0xc0 | wk_cks;
|
|
PWMPWCYR_1 = (uint16_t)wk_cycle;
|
|
|
|
// Set duty again
|
|
set_duty_again(&PWMPWBFR_1A, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_1C, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_1E, wk_last_cycle, wk_cycle);
|
|
set_duty_again(&PWMPWBFR_1G, wk_last_cycle, wk_cycle);
|
|
|
|
// Counter Start
|
|
PWMPWCR_1_BYTE_L |= 0x08;
|
|
|
|
// Save for future use
|
|
period_ch1 = us;
|
|
}
|
|
}
|
|
}
|
|
|
|
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
|
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
|
}
|
|
|
|
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
|
pwmout_pulsewidth_us(obj, ms * 1000);
|
|
}
|
|
|
|
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
|
float value = 0;
|
|
|
|
if (obj->pwm >= MTU2_PWM_OFFSET) {
|
|
/* PWM by MTU2 */
|
|
if (mtu2_period_ch[obj->ch] != 0) {
|
|
value = (float)us / (float)mtu2_period_ch[obj->ch];
|
|
}
|
|
} else {
|
|
/* PWM */
|
|
if (obj->ch == 2) {
|
|
if (period_ch2 != 0) {
|
|
value = (float)us / (float)period_ch2;
|
|
}
|
|
} else {
|
|
if (period_ch1 != 0) {
|
|
value = (float)us / (float)period_ch1;
|
|
}
|
|
}
|
|
}
|
|
pwmout_write(obj, value);
|
|
}
|