mirror of https://github.com/ARMmbed/mbed-os.git
166 lines
9.2 KiB
C
166 lines
9.2 KiB
C
/*******************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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******************************************************************************/
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#ifndef _MXC_SPIS_REGS_H_
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#define _MXC_SPIS_REGS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "mxc_device.h"
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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/*
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Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
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access to each register in module.
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*/
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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__IO uint32_t gen_ctrl; /* 0x0000 SPI Slave General Control Register */
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__IO uint32_t fifo_ctrl; /* 0x0004 SPI Slave FIFO Control Register */
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__IO uint32_t fifo_stat; /* 0x0008 SPI Slave FIFO Status Register */
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__IO uint32_t intfl; /* 0x000C SPI Slave Interrupt Flags */
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__IO uint32_t inten; /* 0x0010 SPI Slave Interrupt Enable/Disable Settings */
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} mxc_spis_regs_t;
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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union { /* 0x0000-0x07FC SPI Slave FIFO TX Write Space */
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__IO uint8_t tx_8[2048];
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__IO uint16_t tx_16[1024];
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__IO uint32_t tx_32[512];
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};
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union { /* 0x0800-0x0FFC FIFO Read Space for Results Data */
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__IO uint8_t rx_8[2048];
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__IO uint16_t rx_16[1024];
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__IO uint32_t rx_32[512];
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};
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} mxc_spis_fifo_regs_t;
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/*
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Register offsets for module SPIS.
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*/
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#define MXC_R_SPIS_OFFS_GEN_CTRL ((uint32_t)0x00000000UL)
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#define MXC_R_SPIS_OFFS_FIFO_CTRL ((uint32_t)0x00000004UL)
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#define MXC_R_SPIS_OFFS_FIFO_STAT ((uint32_t)0x00000008UL)
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#define MXC_R_SPIS_OFFS_INTFL ((uint32_t)0x0000000CUL)
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#define MXC_R_SPIS_OFFS_INTEN ((uint32_t)0x00000010UL)
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#define MXC_R_SPIS_FIFO_OFFS_TX ((uint32_t)0x00000000UL)
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#define MXC_R_SPIS_FIFO_OFFS_RX ((uint32_t)0x00000800UL)
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/*
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Field positions and masks for module SPIS.
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*/
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#define MXC_F_SPIS_GEN_CTRL_SPI_SLAVE_EN_POS 0
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#define MXC_F_SPIS_GEN_CTRL_SPI_SLAVE_EN ((uint32_t)(0x00000001UL << MXC_F_SPIS_GEN_CTRL_SPI_SLAVE_EN_POS))
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#define MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN_POS 1
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#define MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN_POS))
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#define MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN_POS 2
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#define MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN_POS))
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#define MXC_F_SPIS_GEN_CTRL_DATA_WIDTH_POS 4
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#define MXC_F_SPIS_GEN_CTRL_DATA_WIDTH ((uint32_t)(0x00000003UL << MXC_F_SPIS_GEN_CTRL_DATA_WIDTH_POS))
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#define MXC_F_SPIS_GEN_CTRL_SPI_MODE_POS 16
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#define MXC_F_SPIS_GEN_CTRL_SPI_MODE ((uint32_t)(0x00000003UL << MXC_F_SPIS_GEN_CTRL_SPI_MODE_POS))
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#define MXC_F_SPIS_GEN_CTRL_TX_CLK_INVERT_POS 20
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#define MXC_F_SPIS_GEN_CTRL_TX_CLK_INVERT ((uint32_t)(0x00000001UL << MXC_F_SPIS_GEN_CTRL_TX_CLK_INVERT_POS))
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#define MXC_F_SPIS_FIFO_CTRL_TX_FIFO_AE_LVL_POS 0
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#define MXC_F_SPIS_FIFO_CTRL_TX_FIFO_AE_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPIS_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
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#define MXC_F_SPIS_FIFO_CTRL_RX_FIFO_AF_LVL_POS 8
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#define MXC_F_SPIS_FIFO_CTRL_RX_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPIS_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
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#define MXC_F_SPIS_FIFO_STAT_TX_FIFO_USED_POS 0
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#define MXC_F_SPIS_FIFO_STAT_TX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPIS_FIFO_STAT_TX_FIFO_USED_POS))
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#define MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED_POS 8
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#define MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED_POS))
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#define MXC_F_SPIS_INTFL_TX_FIFO_AE_POS 0
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#define MXC_F_SPIS_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_TX_FIFO_AE_POS))
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#define MXC_F_SPIS_INTFL_RX_FIFO_AF_POS 1
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#define MXC_F_SPIS_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_RX_FIFO_AF_POS))
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#define MXC_F_SPIS_INTFL_TX_NO_DATA_POS 2
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#define MXC_F_SPIS_INTFL_TX_NO_DATA ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_TX_NO_DATA_POS))
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#define MXC_F_SPIS_INTFL_RX_LOST_DATA_POS 3
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#define MXC_F_SPIS_INTFL_RX_LOST_DATA ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_RX_LOST_DATA_POS))
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#define MXC_F_SPIS_INTFL_TX_UNDERFLOW_POS 4
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#define MXC_F_SPIS_INTFL_TX_UNDERFLOW ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_TX_UNDERFLOW_POS))
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#define MXC_F_SPIS_INTFL_SS_ASSERTED_POS 5
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#define MXC_F_SPIS_INTFL_SS_ASSERTED ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_SS_ASSERTED_POS))
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#define MXC_F_SPIS_INTFL_SS_DEASSERTED_POS 6
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#define MXC_F_SPIS_INTFL_SS_DEASSERTED ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTFL_SS_DEASSERTED_POS))
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#define MXC_F_SPIS_INTEN_TX_FIFO_AE_POS 0
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#define MXC_F_SPIS_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_TX_FIFO_AE_POS))
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#define MXC_F_SPIS_INTEN_RX_FIFO_AF_POS 1
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#define MXC_F_SPIS_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_RX_FIFO_AF_POS))
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#define MXC_F_SPIS_INTEN_TX_NO_DATA_POS 2
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#define MXC_F_SPIS_INTEN_TX_NO_DATA ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_TX_NO_DATA_POS))
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#define MXC_F_SPIS_INTEN_RX_LOST_DATA_POS 3
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#define MXC_F_SPIS_INTEN_RX_LOST_DATA ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_RX_LOST_DATA_POS))
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#define MXC_F_SPIS_INTEN_TX_UNDERFLOW_POS 4
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#define MXC_F_SPIS_INTEN_TX_UNDERFLOW ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_TX_UNDERFLOW_POS))
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#define MXC_F_SPIS_INTEN_SS_ASSERTED_POS 5
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#define MXC_F_SPIS_INTEN_SS_ASSERTED ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_SS_ASSERTED_POS))
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#define MXC_F_SPIS_INTEN_SS_DEASSERTED_POS 6
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#define MXC_F_SPIS_INTEN_SS_DEASSERTED ((uint32_t)(0x00000001UL << MXC_F_SPIS_INTEN_SS_DEASSERTED_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MXC_SPIS_REGS_H_ */
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