mirror of https://github.com/ARMmbed/mbed-os.git
246 lines
16 KiB
C
246 lines
16 KiB
C
/*******************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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******************************************************************************/
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#ifndef _MXC_SPIM_REGS_H_
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#define _MXC_SPIM_REGS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "mxc_device.h"
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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/*
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Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
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access to each register in module.
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*/
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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__IO uint32_t mstr_cfg; /* 0x0000 SPI Master Configuration Register */
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__IO uint32_t ss_sr_polarity; /* 0x0004 SPI Master Polarity Control for SS and SR Signals */
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__IO uint32_t gen_ctrl; /* 0x0008 SPI Master General Control Register */
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__IO uint32_t fifo_ctrl; /* 0x000C SPI Master FIFO Control Register */
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__IO uint32_t spcl_ctrl; /* 0x0010 SPI Master Special Mode Controls */
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__IO uint32_t intfl; /* 0x0014 SPI Master Interrupt Flags */
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__IO uint32_t inten; /* 0x0018 SPI Master Interrupt Enable/Disable Settings */
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__IO uint32_t simple_headers; /* 0x001C SPI Master Simple Mode Transaction Headers */
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} mxc_spim_regs_t;
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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union { /* 0x0000-0x07FC SPI Master FIFO Write Space for Transaction Setup */
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__IO uint8_t trans_8[2048];
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__IO uint16_t trans_16[1024];
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__IO uint32_t trans_32[512];
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};
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union { /* 0x0800-0x0FFC SPI Master FIFO Read Space for Results Data */
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__IO uint8_t rslts_8[2048];
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__IO uint16_t rslts_16[1024];
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__IO uint32_t rslts_32[512];
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};
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} mxc_spim_fifo_regs_t;
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/*
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Register offsets for module SPIM.
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*/
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#define MXC_R_SPIM_OFFS_MSTR_CFG ((uint32_t)0x00000000UL)
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#define MXC_R_SPIM_OFFS_SS_SR_POLARITY ((uint32_t)0x00000004UL)
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#define MXC_R_SPIM_OFFS_GEN_CTRL ((uint32_t)0x00000008UL)
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#define MXC_R_SPIM_OFFS_FIFO_CTRL ((uint32_t)0x0000000CUL)
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#define MXC_R_SPIM_OFFS_SPCL_CTRL ((uint32_t)0x00000010UL)
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#define MXC_R_SPIM_OFFS_INTFL ((uint32_t)0x00000014UL)
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#define MXC_R_SPIM_OFFS_INTEN ((uint32_t)0x00000018UL)
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#define MXC_R_SPIM_OFFS_SIMPLE_HEADERS ((uint32_t)0x0000001CUL)
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#define MXC_R_SPIM_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
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#define MXC_R_SPIM_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
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/*
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Field positions and masks for module SPIM.
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*/
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#define MXC_F_SPIM_MSTR_CFG_SLAVE_SEL_POS 0
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#define MXC_F_SPIM_MSTR_CFG_SLAVE_SEL ((uint32_t)(0x00000007UL << MXC_F_SPIM_MSTR_CFG_SLAVE_SEL_POS))
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#define MXC_F_SPIM_MSTR_CFG_THREE_WIRE_MODE_POS 3
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#define MXC_F_SPIM_MSTR_CFG_THREE_WIRE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPIM_MSTR_CFG_THREE_WIRE_MODE_POS))
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#define MXC_F_SPIM_MSTR_CFG_SPI_MODE_POS 4
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#define MXC_F_SPIM_MSTR_CFG_SPI_MODE ((uint32_t)(0x00000003UL << MXC_F_SPIM_MSTR_CFG_SPI_MODE_POS))
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#define MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS 6
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#define MXC_F_SPIM_MSTR_CFG_PAGE_SIZE ((uint32_t)(0x00000003UL << MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS))
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#define MXC_F_SPIM_MSTR_CFG_SCK_HI_CLK_POS 8
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#define MXC_F_SPIM_MSTR_CFG_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPIM_MSTR_CFG_SCK_HI_CLK_POS))
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#define MXC_F_SPIM_MSTR_CFG_SCK_LO_CLK_POS 12
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#define MXC_F_SPIM_MSTR_CFG_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPIM_MSTR_CFG_SCK_LO_CLK_POS))
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#define MXC_F_SPIM_MSTR_CFG_ACT_DELAY_POS 16
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#define MXC_F_SPIM_MSTR_CFG_ACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPIM_MSTR_CFG_ACT_DELAY_POS))
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#define MXC_F_SPIM_MSTR_CFG_INACT_DELAY_POS 18
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#define MXC_F_SPIM_MSTR_CFG_INACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPIM_MSTR_CFG_INACT_DELAY_POS))
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#define MXC_F_SPIM_MSTR_CFG_SDIO_SAMPLE_POINT_POS 20
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#define MXC_F_SPIM_MSTR_CFG_SDIO_SAMPLE_POINT ((uint32_t)(0x0000000FUL << MXC_F_SPIM_MSTR_CFG_SDIO_SAMPLE_POINT_POS))
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#define MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_4B ((uint32_t)0x00000000UL)
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#define MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_8B ((uint32_t)0x00000001UL)
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#define MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_16B ((uint32_t)0x00000002UL)
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#define MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_32B ((uint32_t)0x00000003UL)
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#define MXC_S_SPIM_MSTR_CFG_PAGE_4B (MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_4B << MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS)
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#define MXC_S_SPIM_MSTR_CFG_PAGE_8B (MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_8B << MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS)
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#define MXC_S_SPIM_MSTR_CFG_PAGE_16B (MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_16B << MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS)
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#define MXC_S_SPIM_MSTR_CFG_PAGE_32B (MXC_V_SPIM_MSTR_CFG_PAGE_SIZE_32B << MXC_F_SPIM_MSTR_CFG_PAGE_SIZE_POS)
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#define MXC_F_SPIM_SS_SR_POLARITY_SS_POLARITY_POS 0
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#define MXC_F_SPIM_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPIM_SS_SR_POLARITY_SS_POLARITY_POS))
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#define MXC_F_SPIM_SS_SR_POLARITY_FC_POLARITY_POS 8
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#define MXC_F_SPIM_SS_SR_POLARITY_FC_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPIM_SS_SR_POLARITY_FC_POLARITY_POS))
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#define MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN_POS 0
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#define MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN_POS))
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#define MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN_POS 1
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#define MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN_POS))
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#define MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN_POS 2
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#define MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN_POS))
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#define MXC_F_SPIM_GEN_CTRL_BIT_BANG_MODE_POS 3
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#define MXC_F_SPIM_GEN_CTRL_BIT_BANG_MODE ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_BIT_BANG_MODE_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SS_IN_OUT_POS 4
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#define MXC_F_SPIM_GEN_CTRL_BB_SS_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_BB_SS_IN_OUT_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SR_IN_POS 5
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#define MXC_F_SPIM_GEN_CTRL_BB_SR_IN ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_BB_SR_IN_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SCK_IN_OUT_POS 6
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#define MXC_F_SPIM_GEN_CTRL_BB_SCK_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_BB_SCK_IN_OUT_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_IN_POS 8
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_IN ((uint32_t)(0x0000000FUL << MXC_F_SPIM_GEN_CTRL_BB_SDIO_IN_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_OUT_POS 12
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPIM_GEN_CTRL_BB_SDIO_OUT_POS))
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_DR_EN_POS 16
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#define MXC_F_SPIM_GEN_CTRL_BB_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPIM_GEN_CTRL_BB_SDIO_DR_EN_POS))
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#define MXC_F_SPIM_GEN_CTRL_SIMPLE_MODE_POS 20
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#define MXC_F_SPIM_GEN_CTRL_SIMPLE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_SIMPLE_MODE_POS))
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#define MXC_F_SPIM_GEN_CTRL_START_RX_ONLY_POS 21
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#define MXC_F_SPIM_GEN_CTRL_START_RX_ONLY ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_START_RX_ONLY_POS))
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#define MXC_F_SPIM_GEN_CTRL_DEASSERT_ACT_SS_POS 22
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#define MXC_F_SPIM_GEN_CTRL_DEASSERT_ACT_SS ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_DEASSERT_ACT_SS_POS))
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#define MXC_F_SPIM_GEN_CTRL_ENABLE_SCK_FB_MODE_POS 24
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#define MXC_F_SPIM_GEN_CTRL_ENABLE_SCK_FB_MODE ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_ENABLE_SCK_FB_MODE_POS))
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#define MXC_F_SPIM_GEN_CTRL_INVERT_SCK_FB_CLK_POS 25
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#define MXC_F_SPIM_GEN_CTRL_INVERT_SCK_FB_CLK ((uint32_t)(0x00000001UL << MXC_F_SPIM_GEN_CTRL_INVERT_SCK_FB_CLK_POS))
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#define MXC_F_SPIM_FIFO_CTRL_TX_FIFO_AE_LVL_POS 0
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#define MXC_F_SPIM_FIFO_CTRL_TX_FIFO_AE_LVL ((uint32_t)(0x0000000FUL << MXC_F_SPIM_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
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#define MXC_F_SPIM_FIFO_CTRL_TX_FIFO_USED_POS 8
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#define MXC_F_SPIM_FIFO_CTRL_TX_FIFO_USED ((uint32_t)(0x0000001FUL << MXC_F_SPIM_FIFO_CTRL_TX_FIFO_USED_POS))
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#define MXC_F_SPIM_FIFO_CTRL_RX_FIFO_AF_LVL_POS 16
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#define MXC_F_SPIM_FIFO_CTRL_RX_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPIM_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
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#define MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED_POS 24
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#define MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED_POS))
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#define MXC_F_SPIM_SPCL_CTRL_SS_SAMPLE_MODE_POS 0
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#define MXC_F_SPIM_SPCL_CTRL_SS_SAMPLE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPIM_SPCL_CTRL_SS_SAMPLE_MODE_POS))
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#define MXC_F_SPIM_SPCL_CTRL_MISO_FC_EN_POS 1
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#define MXC_F_SPIM_SPCL_CTRL_MISO_FC_EN ((uint32_t)(0x00000001UL << MXC_F_SPIM_SPCL_CTRL_MISO_FC_EN_POS))
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#define MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_OUT_POS 4
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#define MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_OUT_POS))
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#define MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS 8
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#define MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPIM_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS))
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#if (MXC_SPIM_REV == 0)
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#define MXC_F_SPIM_SPCL_CTRL_SPECIAL_MODE_3_EN_POS 16
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#define MXC_F_SPIM_SPCL_CTRL_SPECIAL_MODE_3_EN ((uint32_t)(0x00000001UL << MXC_F_SPIM_SPCL_CTRL_SPECIAL_MODE_3_EN_POS))
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#else
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#define MXC_F_SPIM_SPCL_CTRL_RX_FIFO_MARGIN_POS 12
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#define MXC_F_SPIM_SPCL_CTRL_RX_FIFO_MARGIN ((uint32_t)(0x00000007UL << MXC_F_SPIM_SPCL_CTRL_RX_FIFO_MARGIN_POS))
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#define MXC_F_SPIM_SPCL_CTRL_SCK_FB_DELAY_POS 16
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#define MXC_F_SPIM_SPCL_CTRL_SCK_FB_DELAY ((uint32_t)(0x0000000FUL << MXC_F_SPIM_SPCL_CTRL_SCK_FB_DELAY_POS))
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#define MXC_F_SPIM_SPCL_CTRL_SPARE_RESERVED_POS 20
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#define MXC_F_SPIM_SPCL_CTRL_SPARE_RESERVED ((uint32_t)(0x00000FFFUL << MXC_F_SPIM_SPCL_CTRL_SPARE_RESERVED_POS))
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#endif
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#define MXC_F_SPIM_INTFL_TX_STALLED_POS 0
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#define MXC_F_SPIM_INTFL_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_TX_STALLED_POS))
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#define MXC_F_SPIM_INTFL_RX_STALLED_POS 1
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#define MXC_F_SPIM_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_RX_STALLED_POS))
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#define MXC_F_SPIM_INTFL_TX_READY_POS 2
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#define MXC_F_SPIM_INTFL_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_TX_READY_POS))
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#define MXC_F_SPIM_INTFL_RX_DONE_POS 3
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#define MXC_F_SPIM_INTFL_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_RX_DONE_POS))
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#define MXC_F_SPIM_INTFL_TX_FIFO_AE_POS 4
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#define MXC_F_SPIM_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_TX_FIFO_AE_POS))
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#define MXC_F_SPIM_INTFL_RX_FIFO_AF_POS 5
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#define MXC_F_SPIM_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTFL_RX_FIFO_AF_POS))
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#define MXC_F_SPIM_INTEN_TX_STALLED_POS 0
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#define MXC_F_SPIM_INTEN_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_TX_STALLED_POS))
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#define MXC_F_SPIM_INTEN_RX_STALLED_POS 1
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#define MXC_F_SPIM_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_RX_STALLED_POS))
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#define MXC_F_SPIM_INTEN_TX_READY_POS 2
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#define MXC_F_SPIM_INTEN_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_TX_READY_POS))
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#define MXC_F_SPIM_INTEN_RX_DONE_POS 3
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#define MXC_F_SPIM_INTEN_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_RX_DONE_POS))
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#define MXC_F_SPIM_INTEN_TX_FIFO_AE_POS 4
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#define MXC_F_SPIM_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_TX_FIFO_AE_POS))
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#define MXC_F_SPIM_INTEN_RX_FIFO_AF_POS 5
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#define MXC_F_SPIM_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPIM_INTEN_RX_FIFO_AF_POS))
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#define MXC_F_SPIM_SIMPLE_HEADERS_TX_BIDIR_HEADER_POS 0
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#define MXC_F_SPIM_SIMPLE_HEADERS_TX_BIDIR_HEADER ((uint32_t)(0x00003FFFUL << MXC_F_SPIM_SIMPLE_HEADERS_TX_BIDIR_HEADER_POS))
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#define MXC_F_SPIM_SIMPLE_HEADERS_RX_ONLY_HEADER_POS 16
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#define MXC_F_SPIM_SIMPLE_HEADERS_RX_ONLY_HEADER ((uint32_t)(0x00003FFFUL << MXC_F_SPIM_SIMPLE_HEADERS_RX_ONLY_HEADER_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MXC_SPIM_REGS_H_ */
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