mirror of https://github.com/ARMmbed/mbed-os.git
216 lines
13 KiB
C
216 lines
13 KiB
C
/*******************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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******************************************************************************/
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#ifndef _MXC_I2CM_REGS_H_
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#define _MXC_I2CM_REGS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "mxc_device.h"
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#define MXC_S_I2CM_TRANS_TAG_START 0x000
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#define MXC_S_I2CM_TRANS_TAG_TXDATA_ACK 0x100
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#define MXC_S_I2CM_TRANS_TAG_TXDATA_NACK 0x200
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#define MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT 0x400
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#define MXC_S_I2CM_TRANS_TAG_RXDATA_NACK 0x500
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#define MXC_S_I2CM_TRANS_TAG_STOP 0x700
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#define MXC_S_I2CM_RSTLS_TAG_DATA 0x100
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#define MXC_S_I2CM_RSTLS_TAG_EMPTY 0x200
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/*
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Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
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access to each register in module.
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*/
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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__IO uint32_t fs_clk_div; /* 0x0000 I2C Master Full Speed SCL Clock Settings */
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__I uint32_t rsv004[2]; /* 0x0004-0x0008 */
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__IO uint32_t timeout; /* 0x000C I2C Master Timeout and Auto-Stop Settings */
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__IO uint32_t ctrl; /* 0x0010 I2C Master Control Register */
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__IO uint32_t trans; /* 0x0014 I2C Master Transaction Start and Status Flags */
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__IO uint32_t intfl; /* 0x0018 I2C Master Interrupt Flags */
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__IO uint32_t inten; /* 0x001C I2C Master Interrupt Enable/Disable Controls */
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__I uint32_t rsv020[2]; /* 0x0020-0x0024 */
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__IO uint32_t bb; /* 0x0028 I2C Master Bit-Bang Control Register */
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} mxc_i2cm_regs_t;
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/* Offset Register Description
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============= ============================================================================ */
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typedef struct {
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union { /* 0x0000-0x07FC FIFO Write Point for Data to Transmit */
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__IO uint16_t tx;
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__IO uint8_t tx_8[2048];
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__IO uint16_t tx_16[1024];
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__IO uint32_t tx_32[512];
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};
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union { /* 0x0800-0x0FFC FIFO Read Point for Received Data */
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__IO uint16_t rx;
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__IO uint8_t rx_8[2048];
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__IO uint16_t rx_16[1024];
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__IO uint32_t rx_32[512];
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};
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} mxc_i2cm_fifo_regs_t;
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/*
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Register offsets for module I2CM.
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*/
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#define MXC_R_I2CM_OFFS_FS_CLK_DIV ((uint32_t)0x00000000UL)
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#define MXC_R_I2CM_OFFS_TIMEOUT ((uint32_t)0x0000000CUL)
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#define MXC_R_I2CM_OFFS_CTRL ((uint32_t)0x00000010UL)
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#define MXC_R_I2CM_OFFS_TRANS ((uint32_t)0x00000014UL)
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#define MXC_R_I2CM_OFFS_INTFL ((uint32_t)0x00000018UL)
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#define MXC_R_I2CM_OFFS_INTEN ((uint32_t)0x0000001CUL)
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#define MXC_R_I2CM_OFFS_BB ((uint32_t)0x00000028UL)
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#define MXC_R_I2CM_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
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#define MXC_R_I2CM_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
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/*
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Field positions and masks for module I2CM.
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*/
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#define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS 0
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#define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV ((uint32_t)(0x000000FFUL << MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS))
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#define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS 8
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#define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS))
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#define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS 20
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#define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS))
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#define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS 16
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#define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT ((uint32_t)(0x000000FFUL << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS))
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#define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS 24
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#define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS))
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#define MXC_F_I2CM_CTRL_TX_FIFO_EN_POS 2
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#define MXC_F_I2CM_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_TX_FIFO_EN_POS))
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#define MXC_F_I2CM_CTRL_RX_FIFO_EN_POS 3
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#define MXC_F_I2CM_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_RX_FIFO_EN_POS))
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#define MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS 7
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#define MXC_F_I2CM_CTRL_MSTR_RESET_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS))
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#define MXC_F_I2CM_TRANS_TX_START_POS 0
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#define MXC_F_I2CM_TRANS_TX_START ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_START_POS))
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#define MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS 1
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#define MXC_F_I2CM_TRANS_TX_IN_PROGRESS ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS))
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#define MXC_F_I2CM_TRANS_TX_DONE_POS 2
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#define MXC_F_I2CM_TRANS_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_DONE_POS))
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#define MXC_F_I2CM_TRANS_TX_NACKED_POS 3
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#define MXC_F_I2CM_TRANS_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_NACKED_POS))
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#define MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS 4
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#define MXC_F_I2CM_TRANS_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS))
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#define MXC_F_I2CM_TRANS_TX_TIMEOUT_POS 5
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#define MXC_F_I2CM_TRANS_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_TIMEOUT_POS))
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#define MXC_F_I2CM_INTFL_TX_DONE_POS 0
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#define MXC_F_I2CM_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_DONE_POS))
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#define MXC_F_I2CM_INTFL_TX_NACKED_POS 1
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#define MXC_F_I2CM_INTFL_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_NACKED_POS))
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#define MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS 2
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#define MXC_F_I2CM_INTFL_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS))
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#define MXC_F_I2CM_INTFL_TX_TIMEOUT_POS 3
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#define MXC_F_I2CM_INTFL_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_TIMEOUT_POS))
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#define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS 4
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#define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS))
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#define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS 5
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#define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS))
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#define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS 6
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#define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS))
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#define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS 7
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#define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS))
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#define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS 8
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#define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS))
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#define MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS 9
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#define MXC_F_I2CM_INTFL_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS))
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#define MXC_F_I2CM_INTEN_TX_DONE_POS 0
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#define MXC_F_I2CM_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_DONE_POS))
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#define MXC_F_I2CM_INTEN_TX_NACKED_POS 1
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#define MXC_F_I2CM_INTEN_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_NACKED_POS))
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#define MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS 2
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#define MXC_F_I2CM_INTEN_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS))
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#define MXC_F_I2CM_INTEN_TX_TIMEOUT_POS 3
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#define MXC_F_I2CM_INTEN_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_TIMEOUT_POS))
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#define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS 4
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#define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS))
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#define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS 5
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#define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS))
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#define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS 6
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#define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS))
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#define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS 7
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#define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS))
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#define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS 8
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#define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS))
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#define MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS 9
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#define MXC_F_I2CM_INTEN_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS))
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#define MXC_F_I2CM_BB_BB_SCL_OUT_POS 0
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#define MXC_F_I2CM_BB_BB_SCL_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_OUT_POS))
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#define MXC_F_I2CM_BB_BB_SDA_OUT_POS 1
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#define MXC_F_I2CM_BB_BB_SDA_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_OUT_POS))
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#define MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS 2
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#define MXC_F_I2CM_BB_BB_SCL_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS))
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#define MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS 3
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#define MXC_F_I2CM_BB_BB_SDA_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS))
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#define MXC_F_I2CM_BB_RX_FIFO_CNT_POS 16
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#define MXC_F_I2CM_BB_RX_FIFO_CNT ((uint32_t)(0x0000001FUL << MXC_F_I2CM_BB_RX_FIFO_CNT_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MXC_I2CM_REGS_H_ */
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