mirror of https://github.com/ARMmbed/mbed-os.git
196 lines
5.7 KiB
Python
196 lines
5.7 KiB
Python
"""
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mbed SDK
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Copyright (c) 2014-2016 ARM Limited
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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"""
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from os.path import split,splitext, basename
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from tools.export.exporters import Exporter
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class Folder:
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def __init__(self, name):
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self.name = name
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self.children = []
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def contains(self, folderName):
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for child in self.children:
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if child.name == folderName:
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return True
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return False
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def __str__(self):
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retval = self.name + " "
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if len(self.children) > 0:
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retval += "[ "
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for child in self.children:
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retval += child.__str__()
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retval += " ]"
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return retval
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def findChild(self, folderName):
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for child in self.children:
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if child.name == folderName:
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return child
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return None
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def addChild(self, folderName):
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if folderName == '':
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return None
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if not self.contains(folderName):
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self.children.append(Folder(folderName))
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return self.findChild(folderName)
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class SimplicityV3(Exporter):
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NAME = 'SimplicityV3'
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TOOLCHAIN = 'GCC_ARM'
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TARGETS = [
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'EFM32GG_STK3700',
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'EFM32ZG_STK3200',
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'EFM32LG_STK3600',
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'EFM32WG_STK3800',
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'EFM32HG_STK3400',
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'EFM32PG_STK3401'
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]
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PARTS = {
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'EFM32GG_STK3700': 'com.silabs.mcu.si32.efm32.efm32gg.efm32gg990f1024',
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'EFM32ZG_STK3200': 'com.silabs.mcu.si32.efm32.efm32zg.efm32zg222f32',
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'EFM32LG_STK3600': 'com.silabs.mcu.si32.efm32.efm32lg.efm32lg990f256',
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'EFM32WG_STK3800': 'com.silabs.mcu.si32.efm32.efm32wg.efm32wg990f256',
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'EFM32HG_STK3400': 'com.silabs.mcu.si32.efm32.efm32hg.efm32hg322f64',
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'EFM32PG_STK3401': 'com.silabs.mcu.si32.efm32.efm32pg1b.efm32pg1b200f256gm48'
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}
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KITS = {
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'EFM32GG_STK3700': 'com.silabs.kit.si32.efm32.efm32gg.stk3700',
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'EFM32ZG_STK3200': 'com.silabs.kit.si32.efm32.efm32zg.stk3200',
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'EFM32LG_STK3600': 'com.silabs.kit.si32.efm32.efm32lg.stk3600',
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'EFM32WG_STK3800': 'com.silabs.kit.si32.efm32.efm32wg.stk3800',
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'EFM32HG_STK3400': 'com.silabs.kit.si32.efm32.efm32hg.slstk3400a',
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'EFM32PG_STK3401': 'com.silabs.kit.si32.efm32.efm32pg.slstk3401a'
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}
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FILE_TYPES = {
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'c_sources':'1',
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'cpp_sources':'1',
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's_sources':'1'
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}
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EXCLUDED_LIBS = [
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'm',
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'c',
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'gcc',
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'nosys',
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'supc++',
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'stdc++'
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]
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DOT_IN_RELATIVE_PATH = False
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MBED_CONFIG_HEADER_SUPPORTED = True
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orderedPaths = Folder("Root")
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def check_and_add_path(self, path):
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levels = path.split('/')
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base = self.orderedPaths
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for level in levels:
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if base.contains(level):
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base = base.findChild(level)
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else:
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base.addChild(level)
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base = base.findChild(level)
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def generate(self):
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# "make" wants Unix paths
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self.resources.win_to_unix()
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main_files = []
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EXCLUDED_LIBS = [
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'm',
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'c',
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'gcc',
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'nosys',
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'supc++',
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'stdc++'
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]
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for r_type in ['s_sources', 'c_sources', 'cpp_sources']:
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r = getattr(self.resources, r_type)
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if r:
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for source in r:
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self.check_and_add_path(split(source)[0])
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if not ('/' in source):
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main_files.append(source)
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libraries = []
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for lib in self.resources.libraries:
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l, _ = splitext(basename(lib))
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if l[3:] not in EXCLUDED_LIBS:
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libraries.append(l[3:])
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defines = []
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for define in self.toolchain.get_symbols():
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if '=' in define:
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keyval = define.split('=')
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defines.append( (keyval[0], keyval[1]) )
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else:
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defines.append( (define, '') )
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self.check_and_add_path(split(self.resources.linker_script)[0])
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ctx = {
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'name': self.project_name,
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'main_files': main_files,
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'recursiveFolders': self.orderedPaths,
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'object_files': self.resources.objects,
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'include_paths': self.resources.inc_dirs,
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'library_paths': self.resources.lib_dirs,
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'linker_script': self.resources.linker_script,
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'libraries': libraries,
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'defines': defines,
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'part': self.PARTS[self.target],
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'kit': self.KITS[self.target],
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'loopcount': 0
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}
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ctx.update(self.flags)
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## Strip main folder from include paths because ssproj is not capable of handling it
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if '.' in ctx['include_paths']:
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ctx['include_paths'].remove('.')
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ctx['include_root'] = True
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'''
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Suppress print statements
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print('\n')
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print(self.target)
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print('\n')
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print(ctx)
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print('\n')
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print(self.orderedPaths)
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for path in self.orderedPaths.children:
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print(path.name + "\n")
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for bpath in path.children:
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print("\t" + bpath.name + "\n")
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'''
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self.gen_file('simplicity/slsproj.tmpl', ctx, '%s.slsproj' % self.project_name)
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