mbed-os/targets/TARGET_STM/TARGET_STM32WB/i2c_device.h

97 lines
3.7 KiB
C

/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2019, STMicroelectronics
* SPDX-License-Identifier: Apache-2.0
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_I2C_DEVICE_H
#define MBED_I2C_DEVICE_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef DEVICE_I2C
#define I2C_IP_VERSION_V2
#define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI)
/* Family specific settings for clock source */
#define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
#define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK
#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
/* Provide the suitable timing depending on requested frequency */
static inline uint32_t get_i2c_timing(int hz)
{
uint32_t tim = 0;
if (SystemCoreClock == 64000000) {
// Common settings: I2C clock = 64 MHz, Analog filter = ON, Digital filter coefficient = 0
switch (hz) {
case 100000:
tim = 0x10707DBC; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
break;
case 400000:
tim = 0x00602173; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
break;
case 1000000:
tim = 0x00300B29; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
break;
default:
break;
}
} else if (SystemCoreClock == 32000000) {
// Common settings: I2C clock = 32 MHz, Analog filter = ON, Digital filter coefficient = 0
switch (hz) {
case 100000:
tim = 0x00707CBB; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
break;
case 400000:
tim = 0x00300F38; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
break;
case 1000000:
tim = 0x00100413; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
break;
default:
break;
}
}
return tim;
}
#ifdef __cplusplus
}
#endif
#endif // DEVICE_I2C
#endif