mirror of https://github.com/ARMmbed/mbed-os.git
171 lines
6.3 KiB
C
171 lines
6.3 KiB
C
/**
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******************************************************************************
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* @file spi.c
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* @brief Implementation of a IPC 7207 SPI master driver
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* @internal
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* @author ON Semiconductor
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* @version $Rev: $
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* @date $Date: 2016-02-05 $
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******************************************************************************
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* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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* All rights reserved. This software and/or documentation is licensed by ON Semiconductor
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* under limited terms and conditions. The terms and conditions pertaining to the software
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* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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* if applicable the software license agreement. Do not use this software and/or
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* documentation unless you have carefully read and you agree to the limited terms and
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* conditions. By using this software and/or documentation, you agree to the limited
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* terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup spi
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*
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* @details
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*
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*/
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#if DEVICE_SPI
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#include "spi.h"
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#include "clock.h"
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#include "objects.h"
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#include "spi_api.h"
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#include "PeripheralPins.h"
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#include "spi_ipc7207_map.h"
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#include "crossbar.h"
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#include "pad.h"
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#include "mbed_assert.h"
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/** Initializes a spi device.
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* @details
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*
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* @param obj A spi device instance.
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* @param mosi pin to used as SPI MOSI
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* @param miso pin to used as SPI MISO
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* @param sclk pin to used as SPI SCLK
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* @return None
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*/
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void fSpiInit(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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uint32_t clockDivisor;
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/* determine the SPI to use */
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SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
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SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
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SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
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SPIName spi_data_1 = (SPIName)pinmap_merge(spi_mosi, spi_miso);
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SPIName spi_data_2 = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
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obj->membase = (SpiIpc7207Reg_pt)pinmap_merge(spi_data_1, spi_data_2);
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MBED_ASSERT((int)obj->membase != NC);
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/* Check device to be activated */
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if(obj->membase == SPI1REG) {
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/* SPI 1 selected */
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CLOCK_ENABLE(CLOCK_SPI); /* Enable clock */
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} else {
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/* SPI 2 selected */
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CLOCK_ENABLE(CLOCK_SPI2); /* Enable clock */
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}
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CLOCK_ENABLE(CLOCK_CROSSB);
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/* Cross bar setting: Map GPIOs to SPI */
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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pinmap_pinout(mosi, PinMap_SPI_MOSI);
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/* Configure GPIO Direction */
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CLOCK_ENABLE(CLOCK_GPIO);
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GPIOREG->W_OUT |= ((True << sclk) | (True << mosi) | (True << ssel)); /* Set pins as output */
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GPIOREG->W_IN |= (True << miso); /* Set pin as input */
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/* Pad settings */
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CLOCK_ENABLE(CLOCK_PAD);
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pin_mode(sclk, PushPullPullDown);
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pin_mode(mosi, PushPullPullDown);
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/* PAD drive strength */
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PadReg_t *padRegOffset = (PadReg_t*)(PADREG_BASE + (sclk * PAD_REG_ADRS_BYTE_SIZE));
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padRegOffset->PADIO0.BITS.POWER = True; /* sclk: Drive strength */
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padRegOffset->PADIO1.BITS.POWER = True; /* mosi: Drive strength */
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if(miso != NC) {
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pinmap_pinout(miso, PinMap_SPI_MISO); /* Cross bar settings */
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pin_mode(miso, OpenDrainNoPull); /* Pad setting */
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padRegOffset->PADIO2.BITS.POWER = True; /* miso: Drive strength */
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}
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if(ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL); /* Cross bar settings */
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pin_mode(ssel, PushPullPullUp); /* Pad setting */
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padRegOffset->PADIO3.BITS.POWER = True; /* ssel: Drive strength */
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SPI1REG->SLAVE_SELECT.BITS.SS_ENABLE = SPI_SLAVE_SELECT_NORM_BEHAVE; /* Slave select: Normal behavior */
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}
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CLOCK_DISABLE(CLOCK_PAD);
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CLOCK_DISABLE(CLOCK_GPIO);
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CLOCK_DISABLE(CLOCK_CROSSB);
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/* disable/reset the spi port: Clear control register*/
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obj->membase->CONTROL.WORD = False;
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/* set default baud rate to 1MHz */
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clockDivisor = ((fClockGetPeriphClockfrequency() / SPI_DEFAULT_SPEED) >> True) - True;
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obj->membase->FDIV = clockDivisor;
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/* set tx/rx fifos watermarks */ /* TODO water mark level 1 byte ?*/
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obj->membase->TX_WATERMARK = True;
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obj->membase->RX_WATERMARK = True;
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/* DIsable and clear IRQs */ /* TODO sync api, do not need irq ?*/
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obj->membase->IRQ_ENABLE = False;
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obj->membase->IRQ_CLEAR = SPI_BYTE_MASK; /* Clear all */
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/* configure slave select */
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obj->membase->SLAVE_SELECT.WORD = SPI_SLAVE_SELECT_DEFAULT;
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obj->membase->SLAVE_SELECT_POLARITY = False;
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/* Configure control register parameters: 8 bits, master, CPOL = 0, Idle low. CPHA = 0, First transmit occurs before first edge of SCLK. MSB first. Sample incoming data on opposite edge of SCLK from when outgoing data is driven. enable the spi port */
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obj->membase->CONTROL.WORD = SPI_DEFAULT_CONFIG;
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}
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/** Close a spi device.
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* @details
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*
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* @param obj The spi device to close.
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* @return None
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*/
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void fSpiClose(spi_t *obj)
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{
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/* disable the spi port */
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obj->membase->CONTROL.BITS.ENABLE = False;
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/* disable interruption associated with spi */
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NVIC_DisableIRQ(obj->irq);
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}
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/**
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* Write data to an SPI device.
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* The data is written from the buffer into the transmit register.
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* This function blocks untill write and read happens.
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*
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* @param obj The device to write to.
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* @param buf The buffer to write from (the contents of the buffer may not be modified).
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* @return the value received during send
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*/
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int fSpiWriteB(spi_t *obj, uint32_t const buf)
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{
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int byte;
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while((obj->membase->STATUS.BITS.TX_FULL == True) && (obj->membase->STATUS.BITS.RX_FULL == True)); /* Wait till Tx/Rx status is full */
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obj->membase->TX_DATA = buf;
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while (obj->membase->STATUS.BITS.RX_EMPTY == True); /* Wait till Receive status is empty */
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byte = obj->membase->RX_DATA;
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return byte;
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}
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#endif /* DEVICE_SPI */ |