Bartosz Szczepanski 1d1f7ab133 [STM32F4] Clock and interrupt fixes (#1735) ... * [STM32F4] Get PCLK1 clock and set initial CAN frequency CAN bus opperates on APB1 peripheral clock due to that we need to get PCLK1 freq in *can_frequency()* function to properly calculate CAN speed and reconfigure BS1, BS2, SJW bits. Also to fully communicate with other ST platform we set the initical CAN frequency to 100kb/s to be able to work with the slowest platform which supports CAN, which is NUCLEO_F303K8 (APB1 is 32MHz). Change-Id: I10af3aa8d715dd61c9d1b216ef813193449fecbd * [STM32F4] Fix for CAN2 interrupt index CAN2 interrupt index was wrong leading to not properly registering interrupt. Having this fix allow us to pass MBED_30 test. Change-Id: I33f9ca7c81286f7746a8f8352619e213bdf9756a		2016-05-16 11:55:59 +01:00
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TARGET_STM32F0	[XXX_F0XX] enhance RTC api	2016-04-01 10:50:46 +02:00
TARGET_STM32F1	[STM32F1 F4] Fix #1705 MBED_37 (#1707)	2016-05-13 15:50:13 +01:00
TARGET_STM32F3	Use runtime error detection	2016-05-04 09:25:40 +02:00
TARGET_STM32F4	[STM32F4] Clock and interrupt fixes (#1735)	2016-05-16 11:55:59 +01:00
TARGET_STM32F7	[STM32F7] Fix end of analogin conversion	2016-05-12 10:09:54 +02:00
TARGET_STM32L0	[NUCLEO_L031K6] Change the default pwm pin	2016-04-29 15:58:43 +02:00
TARGET_STM32L1	[XXX_L15XX] Move erasing of BkUpR in RTC API	2016-04-04 11:09:10 +01:00
TARGET_STM32L4	adding hwflwctl support for NUCLEO_L476RG (#1658)	2016-04-17 17:37:14 +01:00