Cyprien Laplace 65fa7b6923 LPC81X: reduce code size and add ARM_GCC support ... LPC810 has only 4KB of flash, thus avoiding dead code is really nice. Here the NVIC interrupt setup was pulled from the us_ticker code even if no code is using timer events. This also adds ARM_GCC support for TARGET_LPC81X. LPC81X and LPC82X support Cortex M0+ VTOR register, so it is not necessary to put non-init text at 0x200.		2015-08-16 21:35:08 -04:00
..
TARGET_LPC810	proposed change of gpio_api	2014-03-04 11:27:30 +01:00
TARGET_LPC812	Added D14, D15 pins for LPC812	2014-05-07 13:15:32 +03:00
PortNames.h	Removed redundant label TARGET_LPC81X_COMMON	2013-11-11 13:28:18 +02:00
device.h	Update device.h	2015-02-11 19:52:20 +01:00
gpio_api.c	assert rename to mbed_assert header file	2014-05-28 16:38:00 +02:00
gpio_irq_api.c	Change "error.h" to "mbed_error.h" to avoid conflicts with 3rd party code	2014-08-15 16:19:18 +01:00
gpio_object.h	Decorated all HALs with gpio_is_connected() function implementation	2014-12-19 13:37:16 +00:00
i2c_api.c	Added I2C Slave functions	2015-02-03 21:39:04 +01:00
objects.h	Update objects.h	2015-02-11 22:42:35 +01:00
pinmap.c	LPC81X: reduce code size and add ARM_GCC support	2015-08-16 21:35:08 -04:00
pwmout_api.c	[NXP's HAL] Fix PwmOut period using SCT	2015-04-17 15:39:15 +09:00
serial_api.c	Enable LPC8xx usart when configuring it	2015-07-27 11:45:47 +02:00
sleep.c	Added sleep to LPC81x	2013-11-21 08:19:44 +01:00
spi_api.c	Update SPI API documentation for hardware driven SS. Modify all target spi_api.c implementations. spi_init ssel parameter was used incorrectly to determine master/slave mode rather than enable hardware driven SS (seems to be due to legacy copy paste). Remove duplicate copy paste code of initialization in spi_init that is done by constructor (SPI and SPISlave)	2015-04-10 00:38:27 -05:00
us_ticker.c	LPC81X: reduce code size and add ARM_GCC support	2015-08-16 21:35:08 -04:00