mirror of https://github.com/ARMmbed/mbed-os.git
206 lines
6.3 KiB
C
206 lines
6.3 KiB
C
/******************************************************************************
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* @file i2s.c
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* @version V0.10
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* $Revision: 14 $
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* $Date: 14/09/30 1:10p $
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* @brief NUC472/NUC442 I2S driver source file
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*
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* @note
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* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include <stdio.h>
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#include "NUC472_442.h"
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/** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
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@{
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*/
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/** @addtogroup NUC472_442_I2S_Driver I2S Driver
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@{
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*/
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/** @addtogroup NUC472_442_I2S_EXPORTED_FUNCTIONS I2S Exported Functions
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@{
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*/
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/**
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* @brief This function is used to get I2S source clock frequency.
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* @param[in] i2s is the base address of I2S module.
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* @return I2S source clock frequency (Hz).
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*/
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static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
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{
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uint32_t u32Freq, u32ClkSrcSel;
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// get I2S selection clock source
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if((uint32_t)i2s == I2S0_BASE)
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u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S0SEL_Msk;
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else
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u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S1SEL_Msk;
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switch (u32ClkSrcSel) {
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case CLK_CLKSEL3_I2S0SEL_HXT:
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u32Freq = __HXT;
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break;
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case CLK_CLKSEL3_I2S0SEL_PLL:
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case CLK_CLKSEL3_I2S1SEL_PLL:
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u32Freq = CLK_GetPLLClockFreq();
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break;
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case CLK_CLKSEL3_I2S0SEL_HIRC:
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case CLK_CLKSEL3_I2S1SEL_HIRC:
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u32Freq = __HIRC;
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break;
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case CLK_CLKSEL3_I2S0SEL_PCLK:
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case CLK_CLKSEL3_I2S1SEL_PCLK:
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u32Freq = SystemCoreClock;
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break;
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default:
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u32Freq = __HIRC;
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break;
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}
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return u32Freq;
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}
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/**
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* @brief This function configures some parameters of I2S interface for general purpose use.
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* The sample rate may not be used from the parameter, it depends on system's clock settings,
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* but real sample rate used by system will be returned for reference.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32MasterSlave I2S operation mode. Valid values are:
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* - \ref I2S_MODE_MASTER
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* - \ref I2S_MODE_SLAVE
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* @param[in] u32SampleRate Sample rate
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* @param[in] u32WordWidth Data length. Valid values are:
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* - \ref I2S_DATABIT_8
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* - \ref I2S_DATABIT_16
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* - \ref I2S_DATABIT_24
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* - \ref I2S_DATABIT_32
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* @param[in] u32Channels: Audio format. Valid values are:
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* - \ref I2S_MONO
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* - \ref I2S_STEREO
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* @param[in] u32DataFormat: Data format. Valid values are:
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* - \ref I2S_FORMAT_I2S
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* - \ref I2S_FORMAT_MSB
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* - \ref I2S_FORMAT_PCMA
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* - \ref I2S_FORMAT_PCMB
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* @param[in] u32AudioInterface: Audio interface. Valid values are:
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* - \ref I2S_I2S
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* - \ref I2S_PCM
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* @return Real sample rate.
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*/
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uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
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{
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uint16_t u16Divider;
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uint32_t u32BitRate, u32SrcClk;
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if((uint32_t)i2s == I2S0_BASE) {
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SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
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SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
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} else {
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SYS->IPRST1 |= SYS_IPRST1_I2S1RST_Msk;
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SYS->IPRST1 &= ~SYS_IPRST1_I2S1RST_Msk;
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}
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i2s->CTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
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u32SrcClk = I2S_GetSourceClockFreq(i2s);
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u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
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u16Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
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i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | (u16Divider << 8);
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//calculate real sample rate
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u32BitRate = u32SrcClk / (2*(u16Divider+1));
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u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
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i2s->CTL |= I2S_CTL_I2SEN_Msk;
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return u32SampleRate;
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}
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/**
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* @brief Disable I2S function and I2S clock.
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* @param[in] i2s is the base address of I2S module.
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* @return none
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*/
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void I2S_Close(I2S_T *i2s)
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{
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i2s->CTL &= ~I2S_CTL_I2SEN_Msk;
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}
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/**
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* @brief This function enables the interrupt according to the mask parameter.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32Mask is the combination of all related interrupt enable bits.
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* Each bit corresponds to a interrupt bit.
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* @return none
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*/
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void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
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{
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i2s->IEN |= u32Mask;
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}
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/**
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* @brief This function disables the interrupt according to the mask parameter.
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32Mask is the combination of all related interrupt enable bits.
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* Each bit corresponds to a interrupt bit.
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* @return none
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*/
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void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
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{
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i2s->IEN &= ~u32Mask;
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}
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/**
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* @brief Enable MCLK .
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* @param[in] i2s is the base address of I2S module.
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* @param[in] u32BusClock is the target MCLK clock
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* @return Actual MCLK clock
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*/
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uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
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{
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uint8_t u8Divider;
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uint32_t u32SrcClk, u32Reg;
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u32SrcClk = I2S_GetSourceClockFreq(i2s);
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if (u32BusClock == u32SrcClk)
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u8Divider = 0;
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else
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u8Divider = (u32SrcClk/u32BusClock) >> 1;
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i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
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i2s->CTL |= I2S_CTL_MCLKEN_Msk;
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u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
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if (u32Reg == 0)
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return u32SrcClk;
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else
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return ((u32SrcClk >> 1) / u32Reg);
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}
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/**
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* @brief Disable MCLK .
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* @param[in] i2s is the base address of I2S module.
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* @return none
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*/
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void I2S_DisableMCLK(I2S_T *i2s)
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{
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i2s->CTL &= ~I2S_CTL_MCLKEN_Msk;
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}
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/*@}*/ /* end of group NUC472_442_I2S_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group NUC472_442_I2S_Driver */
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/*@}*/ /* end of group NUC472_442_Device_Driver */
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/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
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