mirror of https://github.com/ARMmbed/mbed-os.git
266 lines
7.1 KiB
C
266 lines
7.1 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "mbed_assert.h"
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#include "gpio_api.h"
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#include "gpio_irq_api.h"
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#include "pinmap.h"
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#include "nrf_drv_gpiote.h"
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#if defined(TARGET_MCU_NRF51822)
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#define GPIO_PIN_COUNT 31
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#elif defined(TARGET_MCU_NRF52832)
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#define GPIO_PIN_COUNT 32
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#elif defined(TARGET_MCU_NRF52840)
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#define GPIO_PIN_COUNT 48
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#else
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#error not recognized gpio count for mcu
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#endif
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typedef struct {
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bool used_as_gpio : 1;
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PinDirection direction : 1;
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PinMode pull : 2;
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bool used_as_irq : 1;
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bool irq_fall : 1;
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bool irq_rise : 1;
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} gpio_cfg_t;
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#if GPIO_PIN_COUNT > 32
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typedef uint64_t gpio_mask_t;
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#else
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typedef uint32_t gpio_mask_t;
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#endif
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static gpio_mask_t m_gpio_initialized;
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static gpio_cfg_t m_gpio_cfg[GPIO_PIN_COUNT];
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/***********
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GPIO IRQ
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***********/
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static gpio_irq_handler m_irq_handler;
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static uint32_t m_channel_ids[GPIO_PIN_COUNT] = {0};
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static gpio_mask_t m_gpio_irq_enabled;
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static void gpiote_irq_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
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{
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nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin);
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gpio_irq_event event = (sense == NRF_GPIO_PIN_SENSE_LOW) ? IRQ_RISE : IRQ_FALL;
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if (m_gpio_irq_enabled & ((gpio_mask_t)1 << pin)) {
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if (((event == IRQ_RISE) && m_gpio_cfg[pin].irq_rise)
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|| ((event == IRQ_FALL) && m_gpio_cfg[pin].irq_fall)) {
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m_irq_handler(m_channel_ids[pin], event);
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}
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}
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}
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void GPIOTE_IRQHandler(void);// exported from nrf_drv_gpiote.c
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void gpio_init(gpio_t *obj, PinName pin)
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{
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obj->pin = pin;
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if (pin == (PinName)NC) {
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return;
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}
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MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT);
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NVIC_SetVector(GPIOTE_IRQn, (uint32_t) GPIOTE_IRQHandler);
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(void) nrf_drv_gpiote_init();
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m_gpio_cfg[obj->pin].used_as_gpio = true;
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}
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#ifdef TARGET_SDK11
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// implement polyfill of gpio hal for the nRF5 SDK v11
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__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin)
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{
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return (NRF_GPIO->OUTSET & (1UL << (pin)));
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}
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#endif
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int gpio_read(gpio_t *obj)
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{
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MBED_ASSERT(obj->pin != (PinName)NC);
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if (m_gpio_cfg[obj->pin].direction == PIN_OUTPUT) {
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return (nrf_gpio_pin_out_read(obj->pin) ? 1 : 0);
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} else {
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return nrf_gpio_pin_read(obj->pin);
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}
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}
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static void gpiote_pin_uninit(uint8_t pin)
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{
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if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) {
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if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) {
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nrf_drv_gpiote_out_uninit(pin);
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}
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else {
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nrf_drv_gpiote_in_uninit(pin);
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}
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}
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}
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static void gpio_apply_config(uint8_t pin)
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{
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if (m_gpio_cfg[pin].used_as_gpio || m_gpio_cfg[pin].used_as_irq) {
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if ((m_gpio_cfg[pin].direction == PIN_INPUT)
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|| (m_gpio_cfg[pin].used_as_irq)) {
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//Configure as input.
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nrf_drv_gpiote_in_config_t cfg;
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cfg.hi_accuracy = false;
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cfg.is_watcher = false;
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cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE;
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if (m_gpio_cfg[pin].used_as_irq) {
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cfg.pull = NRF_GPIO_PIN_PULLUP;
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nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler);
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if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin))
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&& (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall))
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{
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nrf_drv_gpiote_in_event_enable(pin, true);
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}
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}
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else {
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switch(m_gpio_cfg[pin].pull) {
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case PullUp:
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cfg.pull = NRF_GPIO_PIN_PULLUP;
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break;
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case PullDown:
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cfg.pull = NRF_GPIO_PIN_PULLDOWN;
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break;
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default:
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cfg.pull = NRF_GPIO_PIN_NOPULL;
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break;
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}
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nrf_gpio_cfg_input(pin,cfg.pull);
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}
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}
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else {
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// Configure as output.
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nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin));
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nrf_drv_gpiote_out_init(pin, &cfg);
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}
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m_gpio_initialized |= ((gpio_mask_t)1UL << pin);
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}
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else {
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m_gpio_initialized &= ~((gpio_mask_t)1UL << pin);
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}
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}
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void gpio_mode(gpio_t *obj, PinMode mode)
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{
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MBED_ASSERT(obj->pin != (PinName)NC);
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gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change.
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m_gpio_cfg[obj->pin].pull = mode;
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gpio_apply_config(obj->pin);
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}
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void gpio_dir(gpio_t *obj, PinDirection direction)
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{
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MBED_ASSERT(obj->pin != (PinName)NC);
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gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change.
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m_gpio_cfg[obj->pin].direction = direction;
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gpio_apply_config(obj->pin);
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}
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/***********
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GPIO IRQ
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***********/
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
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{
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if (pin == NC) {
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return -1;
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}
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MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT);
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(void) nrf_drv_gpiote_init();
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gpiote_pin_uninit(pin); // try to uninitialize gpio before a change.
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m_gpio_cfg[pin].used_as_irq = true;
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m_channel_ids[pin] = id;
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obj->ch = pin;
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m_irq_handler = handler;
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m_channel_ids[pin] = id;
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gpio_apply_config(pin);
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return 1;
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}
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void gpio_irq_free(gpio_irq_t *obj)
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{
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nrf_drv_gpiote_in_uninit(obj->ch);
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m_gpio_cfg[obj->ch].used_as_irq = false;
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m_channel_ids[obj->ch] = 0;
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gpio_apply_config(obj->ch);
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}
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void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
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{
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gpio_cfg_t* cfg = &m_gpio_cfg[obj->ch];
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bool irq_enabled_before =
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(m_gpio_irq_enabled & ((gpio_mask_t)1 << obj->ch)) &&
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(cfg->irq_rise || cfg->irq_fall);
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if (event == IRQ_RISE) {
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cfg->irq_rise = enable ? true : false;
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}
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else if (event == IRQ_FALL) {
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cfg->irq_fall = enable ? true : false;
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}
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bool irq_enabled_after = cfg->irq_rise || cfg->irq_fall;
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if (irq_enabled_before != irq_enabled_after) {
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if (irq_enabled_after) {
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gpio_irq_enable(obj);
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} else {
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gpio_irq_disable(obj);
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}
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}
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}
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void gpio_irq_enable(gpio_irq_t *obj)
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{
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m_gpio_irq_enabled |= ((gpio_mask_t)1 << obj->ch);
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if (m_gpio_cfg[obj->ch].irq_rise || m_gpio_cfg[obj->ch].irq_fall) {
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nrf_drv_gpiote_in_event_enable(obj->ch, true);
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}
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}
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void gpio_irq_disable(gpio_irq_t *obj)
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{
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m_gpio_irq_enabled &= ~((gpio_mask_t)1 << obj->ch);
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nrf_drv_gpiote_in_event_disable(obj->ch);
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}
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