mirror of https://github.com/ARMmbed/mbed-os.git
421 lines
12 KiB
C
421 lines
12 KiB
C
/* mbed Microcontroller Library
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
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* SPDX-License-Identifier: Apache-2.0
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <string.h>
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#include "mbed_error.h"
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#include "serial_api.h"
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#include "pinmap.h"
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#define UART_NUM 8
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#define UART_ENABLE_RX ((uint32_t)0x00000001)
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#define UART_ENABLE_TX ((uint32_t)0x00000002)
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#define UARTxFIFOCLR_TFCLR_CLEAR ((uint32_t)0x00000002)
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#define UARTxFIFOCLR_RFCLR_CLEAR ((uint32_t)0x00000001)
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#define UARTxSWRST_SWRSTF_MASK ((uint32_t)0x00000080)
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#define UARTxSWRST_SWRSTF_RUN ((uint32_t)0x00000080)
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#define UARTxSWRST_SWRST_10 ((uint32_t)0x00000002)
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#define UARTxSWRST_SWRST_01 ((uint32_t)0x00000001)
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#define UART_RX_FIFO_FILL_LEVEL ((uint32_t)0x00000100)
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#define FUART_ENABLE_RX ((uint32_t)0x00000200)
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#define FUART_ENABLE_TX ((uint32_t)0x00000100)
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#define BAUDRATE_DEFAULT (9600)
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#define CLR_REGISTER (0x00)
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static const PinMap PinMap_UART_TX[] = {
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{PE3, SERIAL_0, PIN_DATA(7, 1)},
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{PH1, SERIAL_1, PIN_DATA(3, 1)},
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{PG1, SERIAL_2, PIN_DATA(3, 1)},
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{PU7, SERIAL_3, PIN_DATA(7, 1)},
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{PU0, SERIAL_4, PIN_DATA(7, 1)},
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{PJ1, SERIAL_5, PIN_DATA(3, 1)},
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{NC, NC, 0}
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};
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static const PinMap PinMap_UART_RX[] = {
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{PE2, SERIAL_0, PIN_DATA(7, 0)},
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{PH0, SERIAL_1, PIN_DATA(3, 0)},
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{PG0, SERIAL_2, PIN_DATA(3, 0)},
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{PU6, SERIAL_3, PIN_DATA(7, 0)},
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{PU1, SERIAL_4, PIN_DATA(7, 0)},
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{PJ0, SERIAL_5, PIN_DATA(3, 0)},
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{NC, NC, 0}
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};
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static int serial_irq_ids[UART_NUM] = {0};
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static uart_irq_handler irq_handler;
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int stdio_uart_inited = 0;
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serial_t stdio_uart;
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static void uart_swreset(TSB_UART_TypeDef *UARTx);
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void serial_init(serial_t *obj, PinName tx, PinName rx)
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{
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int is_stdio_uart = 0;
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obj->mode = 0;
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cg_t paramCG;
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paramCG.p_instance = TSB_CG;
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uart_clock_t prescal = {0};
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UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
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UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
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UARTName uart_name = (UARTName)pinmap_merge(uart_tx, uart_rx);
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MBED_ASSERT((int)uart_name != NC);
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obj->index = uart_name;
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// Initialize UART instance
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switch (uart_name) {
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case SERIAL_0:
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obj->UARTx = TSB_UART0;
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//Enable clock for UART0 and Port E
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TSB_CG_FSYSMENA_IPMENA23 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB06 = TXZ_ENABLE;
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break;
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case SERIAL_1:
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obj->UARTx = TSB_UART1;
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//Enable clock for UART1 and Port H
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TSB_CG_FSYSMENA_IPMENA24 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB09 = TXZ_ENABLE;
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break;
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case SERIAL_2:
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obj->UARTx = TSB_UART2;
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//Enable clock for UART2 and Port G
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TSB_CG_FSYSMENA_IPMENA25 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB08 = TXZ_ENABLE;
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break;
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case SERIAL_3:
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obj->UARTx = TSB_UART3;
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//Enable clock for UART3 and Port U
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TSB_CG_FSYSMENA_IPMENA26 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB18 = TXZ_ENABLE;
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break;
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case SERIAL_4:
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obj->UARTx = TSB_UART4;
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//Enable clock for UART4 and Port U
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TSB_CG_FSYSMENA_IPMENA27 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB18 = TXZ_ENABLE;
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break;
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case SERIAL_5:
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obj->UARTx = TSB_UART5;
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//Enable clock for UART5 and Port J
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TSB_CG_FSYSMENA_IPMENA28 = TXZ_ENABLE;
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TSB_CG_FSYSMENB_IPMENB10 = TXZ_ENABLE;
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break;
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default:
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break;
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}
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//Set alternate function
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pinmap_pinout(tx, PinMap_UART_TX);
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pinmap_pinout(rx, PinMap_UART_RX);
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if (tx != NC && rx != NC) {
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obj->mode = UART_ENABLE_RX | UART_ENABLE_TX;
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} else {
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if (tx != NC) {
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obj->mode = UART_ENABLE_TX;
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} else {
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if (rx != NC) {
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obj->mode = UART_ENABLE_RX;
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}
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}
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}
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//software reset
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uart_swreset(obj->UARTx);
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//mbed default configurations
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obj->UARTx->CR0 |= (1U); // data lengh 8 bit No parity one stop bit
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prescal.prsel = UART_PLESCALER_1;
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uart_get_boudrate_setting(cg_get_mphyt0(¶mCG), &prescal, BAUDRATE_DEFAULT, &obj->boud_obj);
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obj->UARTx->BRD |=((obj->boud_obj.ken) | (obj->boud_obj.brk << 16) | (obj->boud_obj.brn));
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obj->UARTx->FIFOCLR = (UARTxFIFOCLR_TFCLR_CLEAR | UARTxFIFOCLR_RFCLR_CLEAR); // Clear FIFO
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obj->UARTx->TRANS |= obj->mode; // Enable TX RX block.
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obj->UARTx->CR1 = (UART_RX_FIFO_FILL_LEVEL | UART_TX_INT_ENABLE | UART_RX_INT_ENABLE);
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is_stdio_uart = (uart_name == STDIO_UART) ? (1) : (0);
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if (is_stdio_uart) {
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stdio_uart_inited = 1;
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memcpy(&stdio_uart, obj, sizeof(serial_t));
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}
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}
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void serial_free(serial_t *obj)
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{
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obj->UARTx->TRANS = CLR_REGISTER;
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obj->UARTx->CR0 = CLR_REGISTER;
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obj->UARTx->CR1 = CLR_REGISTER;
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obj->UARTx = CLR_REGISTER;
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uart_swreset(obj->UARTx);
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obj->index = (uint32_t)NC;
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}
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void serial_baud(serial_t *obj, int baudrate)
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{
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cg_t paramCG;
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paramCG.p_instance = TSB_CG;
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uart_clock_t prescal;
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prescal.prsel = UART_PLESCALER_1;
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uart_get_boudrate_setting(cg_get_mphyt0(¶mCG), &prescal, baudrate, &obj->boud_obj);
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obj->UARTx->BRD = CLR_REGISTER; //clear BRD register
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obj->UARTx->BRD |=((obj->boud_obj.ken) | (obj->boud_obj.brk << 16) | (obj->boud_obj.brn));
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}
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
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{
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uint32_t parity_check = 0;
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uint32_t data_length = 0;
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uint32_t tmp = 0;
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uint32_t sblen = 0;
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MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
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MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
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MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
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parity_check = ((parity == ParityOdd) ? 1 :((parity == ParityEven) ? 3 : 0));
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data_length = (data_bits == 8 ? 1 :((data_bits == 7) ? 0 : 2));
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sblen = (stop_bits == 1) ? 0 : 1; // 0: 1 stop bits, 1: 2 stop bits
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tmp = ((sblen << 4) |(parity_check << 2) | data_length);
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obj->UARTx->CR0 = tmp;
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}
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// INTERRUPT HANDLING
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void INTUART0RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_0], RxIrq);
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}
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void INTUART0TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_0], TxIrq);
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}
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void INTUART1RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_1], RxIrq);
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}
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void INTUART1TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_1], TxIrq);
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}
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void INTUART2RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_2], RxIrq);
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}
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void INTUART2TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_2], TxIrq);
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}
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void INTUART3RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_3], RxIrq);
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}
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void INTUART3TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_3], TxIrq);
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}
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void INTUART4RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_4], RxIrq);
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}
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void INTUART4TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_4], TxIrq);
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}
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void INTUART5RX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_5], RxIrq);
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}
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void INTUART5TX_IRQHandler(void)
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{
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irq_handler(serial_irq_ids[SERIAL_5], TxIrq);
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}
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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serial_irq_ids[obj->index] = id;
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}
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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{
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IRQn_Type irq_n = (IRQn_Type)0;
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switch (obj->index) {
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case SERIAL_0:
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if (irq == RxIrq) {
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irq_n = INTUART0RX_IRQn;
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} else {
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irq_n = INTUART0TX_IRQn;
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}
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break;
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case SERIAL_1:
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if (irq == RxIrq) {
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irq_n = INTUART1RX_IRQn;
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} else {
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irq_n = INTUART1TX_IRQn;
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}
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break;
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case SERIAL_2:
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if (irq == RxIrq) {
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irq_n = INTUART2RX_IRQn;
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} else {
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irq_n = INTUART2TX_IRQn;
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}
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break;
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case SERIAL_3:
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if (irq == RxIrq) {
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irq_n = INTUART3RX_IRQn;
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} else {
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irq_n = INTUART3TX_IRQn;
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}
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break;
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case SERIAL_4:
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if (irq == RxIrq) {
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irq_n = INTUART4RX_IRQn;
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} else {
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irq_n = INTUART4TX_IRQn;
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}
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break;
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case SERIAL_5:
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if (irq == RxIrq) {
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irq_n = INTUART5RX_IRQn;
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} else {
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irq_n = INTUART5TX_IRQn;
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}
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break;
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default:
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break;
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}
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NVIC_ClearPendingIRQ(irq_n);
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if (enable) {
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NVIC_EnableIRQ(irq_n);
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} else {
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NVIC_DisableIRQ(irq_n);
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}
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}
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int serial_getc(serial_t *obj)
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{
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int data = 0;
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while (!serial_readable(obj)) { // Wait until Rx buffer is full
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// Do nothing
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}
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//Read Data Register
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data = (obj->UARTx->DR & 0xFFU);
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obj->UARTx->SR |= (1U << 6); // clear RXEND flag
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return data;
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}
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void serial_putc(serial_t *obj, int c)
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{
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while (!serial_writable(obj)) {
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// Do nothing
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}
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//Write Data Register
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obj->UARTx->DR = (c & 0xFF);
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while((obj->UARTx->SR & (1U << 14)) == 0) {
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}
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obj->UARTx->SR |= (1U << 14); // clear TXEND flag
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}
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int serial_readable(serial_t *obj)
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{
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int ret = 0;
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if ((obj->UARTx->SR & 0x000F) != 0) {
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ret = 1;
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}
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return ret;
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}
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int serial_writable(serial_t *obj)
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{
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int ret = 0;
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if ((obj->UARTx->SR & 0x8000) == 0) {
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ret = 1;
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}
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return ret;
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}
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// Pause transmission
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void serial_break_set(serial_t *obj)
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{
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obj->UARTx->TRANS |= 0x08;
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}
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// Switch to normal transmission
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void serial_break_clear(serial_t *obj)
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{
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obj->UARTx->TRANS &= ~(0x08);
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}
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static void uart_swreset(TSB_UART_TypeDef *UARTx)
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{
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while (((UARTx->SWRST) & UARTxSWRST_SWRSTF_MASK) == UARTxSWRST_SWRSTF_RUN) {
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// No process
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}
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UARTx->SWRST = UARTxSWRST_SWRST_10;
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UARTx->SWRST = UARTxSWRST_SWRST_01;
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while (((UARTx->SWRST) & UARTxSWRST_SWRSTF_MASK) == UARTxSWRST_SWRSTF_RUN) {
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// No process
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}
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}
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const PinMap *serial_tx_pinmap()
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{
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return PinMap_UART_TX;
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}
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const PinMap *serial_rx_pinmap()
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{
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return PinMap_UART_RX;
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}
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const PinMap *serial_cts_pinmap()
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{
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#if !DEVICE_SERIAL_FC
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static const PinMap PinMap_UART_CTS[] = {
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{NC, NC, 0}
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};
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#endif
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return PinMap_UART_CTS;
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}
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const PinMap *serial_rts_pinmap()
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{
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#if !DEVICE_SERIAL_FC
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static const PinMap PinMap_UART_RTS[] = {
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{NC, NC, 0}
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};
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#endif
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return PinMap_UART_RTS;
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}
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