mirror of https://github.com/ARMmbed/mbed-os.git
198 lines
7.7 KiB
C
198 lines
7.7 KiB
C
/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/**
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* This file configures the system clock as follows:
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*-----------------------------------------------------------------------------
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* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
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* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
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* | 3- USE_PLL_HSI (internal 16 MHz)
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* | 4- USE_PLL_MSI (internal 100kHz to 48 MHz)
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*-----------------------------------------------------------------------------
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* SYSCLK(MHz) | 110
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* AHBCLK (MHz) | 110
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* APB1CLK (MHz) | 110
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* APB2CLK (MHz) | 110
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* USB capable | NO // TODO
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*-----------------------------------------------------------------------------
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**/
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#include "stm32l5xx.h"
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#include "mbed_error.h"
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#include "mbed_toolchain.h"
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// clock source is selected with CLOCK_SOURCE in json config
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#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
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#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
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#define USE_PLL_HSI 0x2 // Use HSI internal clock
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#define USE_PLL_MSI 0x1 // Use MSI internal clock
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#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
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uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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uint8_t SetSysClock_PLL_HSI(void);
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
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#if ((CLOCK_SOURCE) & USE_PLL_MSI)
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uint8_t SetSysClock_PLL_MSI(void);
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#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
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/**
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* @brief Configures the System clock source, PLL Multiplier and Divider factors,
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* AHB/APBx prescalers and Flash settings
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* @note This function should be called only once the RCC clock configuration
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* is reset to the default reset state (done in SystemInit() function).
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* @param None
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* @retval None
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*/
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MBED_WEAK void SetSysClock(void)
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
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/* 1- Try to start with HSE and external clock */
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if (SetSysClock_PLL_HSE(1) == 0)
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#endif
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
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/* 2- If fail try to start with HSE and external xtal */
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if (SetSysClock_PLL_HSE(0) == 0)
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#endif
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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/* 3- If fail start with HSI clock */
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if (SetSysClock_PLL_HSI() == 0)
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#endif
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{
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#if ((CLOCK_SOURCE) & USE_PLL_MSI)
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/* 4- If fail start with MSI clock */
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if (SetSysClock_PLL_MSI() == 0)
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#endif
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{
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{
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error("SetSysClock failed\n");
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}
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}
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}
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}
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}
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}
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#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
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/******************************************************************************/
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/* PLL (clocked by HSE) used as System clock source */
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/******************************************************************************/
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MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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{
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return 0; // FAIL // TODO
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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/******************************************************************************/
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/* PLL (clocked by HSI) used as System clock source */
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/******************************************************************************/
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uint8_t SetSysClock_PLL_HSI(void)
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{
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return 0; // FAIL // TODO
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
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#if ((CLOCK_SOURCE) & USE_PLL_MSI)
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/******************************************************************************/
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/* PLL (clocked by MSI) used as System clock source */
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/******************************************************************************/
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uint8_t SetSysClock_PLL_MSI(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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/* Configure LSE Drive Capability */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_RTCAPB_CLK_ENABLE();
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/* Configure the main internal regulator output voltage */
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) {
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return 0; // FAIL
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}
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#if MBED_CONF_TARGET_LSE_AVAILABLE
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
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/* Enable MSI Oscillator and activate PLL with MSI as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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#if DEVICE_TRNG || DEVICE_USBDEVICE
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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#else
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RCC_OscInitStruct.HSI48State = RCC_HSI48_OFF;
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#endif
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; /* 4 MHz */
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 1; /* 4 MHz */
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RCC_OscInitStruct.PLL.PLLN = 55; /* 220 MHz */
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; /* 110 MHz */
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; /* 110 MHz */
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 110 MHz */
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* 110 MHz */
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* 110 MHz */
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; /* 110 MHz */
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
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return 0; // FAIL
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}
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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#if DEVICE_TRNG
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
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PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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#endif
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#if DEVICE_USBDEVICE
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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#endif
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return 1; // OK
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
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