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			129 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
			
		
		
	
	
			129 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
/**
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******************************************************************************
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* @file trim_map.h
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* @brief trim register map
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* @internal
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* @author   ON Semiconductor
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* $Rev: 3727 $
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* $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $
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******************************************************************************
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 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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 * All rights reserved.  This software and/or documentation is licensed by ON Semiconductor
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 * under limited terms and conditions.  The terms and conditions pertaining to the software
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 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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 * if applicable the software license agreement.  Do not use this software and/or
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 * documentation unless you have carefully read and you agree to the limited terms and
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 * conditions.  By using this software and/or documentation, you agree to the limited
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 * terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup trim
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*
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* @details
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* <p>
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* Rf and Analog control hw module register map
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* </p>
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*/
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#ifndef TRIM_MAP_H_
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#define TRIM_MAP_H_
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/*************************************************************************************************
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*                                                                                                *
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*  Header files                                                                                  *
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*                                                                                                *
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*************************************************************************************************/
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#include "architecture.h"
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/**************************************************************************************************
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*                                                                                                 *
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*  Type definitions                                                                               *
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*                                                                                                 *
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**************************************************************************************************/
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/** trim register map */
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typedef struct {
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    __I uint32_t PAD0;                  /**< 0x1FA0 */
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    __I uint32_t MAC_ADDR_LOW;          /**< 0x1FA4 */
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    __I uint32_t MAC_ADDR_HIGH;         /**< 0x1FA8 */
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    __I uint32_t TRIM_32K_EXT;          /**< 0x1FAC */
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    __I uint32_t TRIM_32M_EXT;          /**< 0x1FB0 */
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    __I uint32_t FVVDH_COMP_TH;         /**< 0x1FB4 */
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    union {
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        struct {
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            __I uint32_t CHANNEL11:4;
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            __I uint32_t CHANNEL12:4;
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            __I uint32_t CHANNEL13:4;
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            __I uint32_t CHANNEL14:4;
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            __I uint32_t CHANNEL15:4;
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            __I uint32_t CHANNEL16:4;
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            __I uint32_t CHANNEL17:4;
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            __I uint32_t CHANNEL18:4;
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        } BITS;
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        __I uint32_t WORD;
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    } TX_VCO_LUT1;                        /**< 0x1FB8 */
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    union {
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        struct {
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            __I uint32_t CHANNEL19:4;
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            __I uint32_t CHANNEL20:4;
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            __I uint32_t CHANNEL21:4;
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            __I uint32_t CHANNEL22:4;
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            __I uint32_t CHANNEL23:4;
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            __I uint32_t CHANNEL24:4;
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            __I uint32_t CHANNEL25:4;
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            __I uint32_t CHANNEL26:4;
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        } BITS;
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        __I uint32_t WORD;
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    } TX_VCO_LUT2;                        /**< 0x1FBC */
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    union {
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        struct {
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            __I uint32_t CHANNEL11:4;
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            __I uint32_t CHANNEL12:4;
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            __I uint32_t CHANNEL13:4;
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            __I uint32_t CHANNEL14:4;
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            __I uint32_t CHANNEL15:4;
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            __I uint32_t CHANNEL16:4;
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            __I uint32_t CHANNEL17:4;
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            __I uint32_t CHANNEL18:4;
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        } BITS;
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        __I uint32_t WORD;
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    } RX_VCO_LUT1;                        /**< 0x1FC0 */
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    union {
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        struct {
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            __I uint32_t CHANNEL19:4;
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            __I uint32_t CHANNEL20:4;
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            __I uint32_t CHANNEL21:4;
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            __I uint32_t CHANNEL22:4;
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            __I uint32_t CHANNEL23:4;
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            __I uint32_t CHANNEL24:4;
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            __I uint32_t CHANNEL25:4;
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            __I uint32_t CHANNEL26:4;
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        } BITS;
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        __I uint32_t WORD;
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    } RX_VCO_LUT2;                        /**< 0x1FC4 */
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    __I uint32_t ON_RESERVED0;            /**< 0x1FC8 */
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    __I uint32_t ON_RESERVED1;            /**< 0x1FCC */
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    __I uint32_t ADC_OFFSET_TRIM;         /**< 0x1FD0 */
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    __I uint32_t TX_PRE_CHIPS;            /**< 0x1FD4 */
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    __I uint32_t TX_CHAIN_TRIM;           /**< 0x1FD8 */
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    __I uint32_t PLL_VCO_TAP_LOCATION;    /**< 0x1FDC */
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    __I uint32_t PLL_TRIM;                /**< 0x1FE0 */
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    __I uint32_t RSSI_OFFSET;             /**< 0x1FE4 */
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    __I uint32_t RX_CHAIN_TRIM;           /**< 0x1FE8 */
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    __I uint32_t PMU_TRIM;                /**< 0x1FEC */
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    __I uint32_t WR_SEED_RD_RAND;         /**< 0x1FF0 */
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    __I uint32_t WAFER_LOCATION;          /**< 0x1FF4 */
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    __I uint32_t LOT_NUMBER;              /**< 0x1FF8 */
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    __I uint32_t REVISION_CODE;           /**< 0x1FFC */
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} TrimReg_t, *TrimReg_pt;
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#endif /* TRIM_MAP_H_ */
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