mirror of https://github.com/ARMmbed/mbed-os.git
227 lines
9.6 KiB
C
227 lines
9.6 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2017-2018 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <arm_cmse.h>
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#include <stdbool.h>
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#include "cmsis.h"
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#include "partition_M2351.h"
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#include "m2351_stddriver_sup.h"
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#include "mbed_error.h"
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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typedef struct nu_modidx_ns_s {
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uint32_t sys_modidx; // Module index defined in SYS
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uint32_t clk_modidx; // Module index defined in CLK
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uint32_t ns; // 0: secure or undefined, 1: non-secure
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} nu_modidx_ns_t;
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/* Placeholder for module index not defined
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*
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* Not all modules have corresponding SYS/CLK module index.
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* Check sys.h/clk.h under StdDriver for non-used value to mean 'NONE'.
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*/
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#define NU_SYS_MODIDX_UNDEF 0xFFFFFFFFUL
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#define NU_CLK_MODIDX_UNDEF 0xFFFFFFFFUL
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/* Table which records security state of module based on partition file.
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*
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* Some secure modules are not listed here for saving memory:
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* 1. Modules are hard-wired to secure.
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* 2. Modules belonging to the same PNSSET register are all secure.
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*
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* check_mod_ns must filter out 'NONE' module index to avoid security issue.
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*/
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static const nu_modidx_ns_t modidx_ns_tab[] = {
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#if defined(SCU_INIT_PNSSET0_VAL) && SCU_INIT_PNSSET0_VAL
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{USBH_RST, USBH_MODULE, SCU_INIT_PNSSET0_VAL & (1 << 9)},
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{SDH0_RST, SDH0_MODULE, SCU_INIT_PNSSET0_VAL & (1 << 13)},
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{NU_SYS_MODIDX_UNDEF, NU_CLK_MODIDX_UNDEF, SCU_INIT_PNSSET0_VAL & (1 << 14)},
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{EBI_RST, EBI_MODULE, SCU_INIT_PNSSET0_VAL & (1 << 16)},
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{PDMA1_RST, PDMA1_MODULE, SCU_INIT_PNSSET0_VAL & (1 << 24)},
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#endif
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#if defined(SCU_INIT_PNSSET1_VAL) && SCU_INIT_PNSSET1_VAL
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{CRC_RST, CRC_MODULE, SCU_INIT_PNSSET1_VAL & (1 << 17)},
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{CRPT_RST, CRPT_MODULE, SCU_INIT_PNSSET1_VAL & (1 << 18)},
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#endif
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#if defined(SCU_INIT_PNSSET2_VAL) && SCU_INIT_PNSSET2_VAL
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{NU_SYS_MODIDX_UNDEF, RTC_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 1)},
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{EADC_RST, EADC_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 3)},
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{ACMP01_RST, ACMP01_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 5)},
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{NU_SYS_MODIDX_UNDEF, NU_CLK_MODIDX_UNDEF, SCU_INIT_PNSSET2_VAL & (1 << 6)},
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{DAC_RST, DAC_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 7)},
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{I2S0_RST, I2S0_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 8)},
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{OTG_RST, OTG_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 13)},
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{TMR2_RST, TMR2_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 17)},
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{TMR3_RST, TMR3_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 17)},
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{EPWM0_RST, EPWM0_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 24)},
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{EPWM1_RST, EPWM1_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 25)},
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{BPWM0_RST, BPWM0_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 26)},
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{BPWM1_RST, BPWM1_MODULE, SCU_INIT_PNSSET2_VAL & (1 << 27)},
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#endif
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#if defined(SCU_INIT_PNSSET3_VAL) && SCU_INIT_PNSSET3_VAL
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{SPI0_RST, SPI0_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 0)},
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{SPI1_RST, SPI1_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 1)},
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{SPI2_RST, SPI1_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 2)},
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{SPI3_RST, SPI3_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 3)},
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{NU_SYS_MODIDX_UNDEF, NU_CLK_MODIDX_UNDEF, SCU_INIT_PNSSET3_VAL & (1 << 4)},
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{SPI5_RST, SPI5_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 5)},
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{UART0_RST, UART0_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 16)},
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{UART1_RST, UART1_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 17)},
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{UART2_RST, UART2_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 18)},
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{UART3_RST, UART3_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 19)},
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{UART4_RST, UART4_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 20)},
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{UART5_RST, UART5_MODULE, SCU_INIT_PNSSET3_VAL & (1 << 21)},
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#endif
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#if defined(SCU_INIT_PNSSET4_VAL) && SCU_INIT_PNSSET4_VAL
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{I2C0_RST, I2C0_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 0)},
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{I2C1_RST, I2C1_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 1)},
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{I2C2_RST, I2C2_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 2)},
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{SC0_RST, SC0_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 16)},
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{SC1_RST, SC1_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 17)},
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{SC2_RST, SC2_MODULE, SCU_INIT_PNSSET4_VAL & (1 << 18)},
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#endif
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#if defined(SCU_INIT_PNSSET5_VAL) && SCU_INIT_PNSSET5_VAL
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{CAN0_RST, CAN0_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 0)},
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{QEI0_RST, QEI0_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 16)},
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{QEI1_RST, QEI1_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 17)},
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{ECAP0_RST, ECAP0_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 20)},
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{ECAP1_RST, ECAP1_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 21)},
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{DSRC_RST, DSRC_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 23)},
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{NU_SYS_MODIDX_UNDEF, NU_CLK_MODIDX_UNDEF, SCU_INIT_PNSSET5_VAL & (1 << 24)},
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{TRNG_RST, TRNG_MODULE, SCU_INIT_PNSSET5_VAL & (1 << 25)},
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#endif
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#if defined(SCU_INIT_PNSSET6_VAL) && SCU_INIT_PNSSET6_VAL
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{USBD_RST, USBD_MODULE, SCU_INIT_PNSSET6_VAL & (1 << 0)},
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{USCI0_RST, USCI0_MODULE, SCU_INIT_PNSSET6_VAL & (1 << 16)},
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{USCI1_RST, USCI1_MODULE, SCU_INIT_PNSSET6_VAL & (1 << 17)},
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#endif
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};
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#define NU_MODCLASS_SYS 0
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#define NU_MODCLASS_CLK 1
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/* Check if specified module is non-secure
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*
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* \param modclass Module class (NU_MODCLASS_SYS/NU_MODCLASS_CLK)
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* \param modidx Module index
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*
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* \return 0 if not non-secure (secure or undefined), or 1 if non-secure
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*
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* \note Undefined module index is treated as not non-secure.
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*/
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static bool check_mod_ns(int modclass, uint32_t modidx);
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__attribute__((cmse_nonsecure_entry))
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void SYS_ResetModule_S(uint32_t u32ModuleIndex)
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{
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/* Guard access to secure module from non-secure domain */
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if (cmse_nonsecure_caller() &&
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(! check_mod_ns(NU_MODCLASS_SYS, u32ModuleIndex))) {
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error("Non-secure domain tries to control secure or undefined module.");
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}
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SYS_ResetModule(u32ModuleIndex);
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}
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__attribute__((cmse_nonsecure_entry))
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void CLK_SetModuleClock_S(uint32_t u32ModuleIndex, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
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{
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/* Guard access to secure module from non-secure domain */
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if (cmse_nonsecure_caller() &&
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(! check_mod_ns(NU_MODCLASS_CLK, u32ModuleIndex))) {
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error("Non-secure domain tries to control secure or undefined module.");
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}
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CLK_SetModuleClock(u32ModuleIndex, u32ClkSrc, u32ClkDiv);
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}
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__attribute__((cmse_nonsecure_entry))
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void CLK_EnableModuleClock_S(uint32_t u32ModuleIndex)
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{
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/* Guard access to secure module from non-secure domain */
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if (cmse_nonsecure_caller() &&
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(! check_mod_ns(NU_MODCLASS_CLK, u32ModuleIndex))) {
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error("Non-secure domain tries to control secure or undefined module.");
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}
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CLK_EnableModuleClock(u32ModuleIndex);
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}
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__attribute__((cmse_nonsecure_entry))
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void CLK_DisableModuleClock_S(uint32_t u32ModuleIndex)
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{
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/* Guard access to secure module from non-secure domain */
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if (cmse_nonsecure_caller() &&
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(! check_mod_ns(NU_MODCLASS_CLK, u32ModuleIndex))) {
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error("Non-secure domain tries to control secure or undefined module.");
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}
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CLK_DisableModuleClock(u32ModuleIndex);
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}
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static bool check_mod_ns(int modclass, uint32_t modidx)
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{
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const nu_modidx_ns_t *modidx_ns = modidx_ns_tab;
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const nu_modidx_ns_t *modidx_ns_end = modidx_ns_tab + sizeof (modidx_ns_tab) / sizeof (modidx_ns_tab[0]);
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if (modclass == NU_MODCLASS_SYS) {
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/* The modidx_ns_tab table has 'NONE' module index.
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* We must filter it out to avoid security issue. */
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if (modidx == NU_SYS_MODIDX_UNDEF) {
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return false;
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}
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for (; modidx_ns != modidx_ns_end; modidx_ns ++) {
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if (modidx == modidx_ns->sys_modidx) {
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if (modidx_ns->ns) {
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return true;
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} else {
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return false;
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}
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}
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}
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} else if (modclass == NU_MODCLASS_CLK) {
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/* The modidx_ns_tab table has 'NONE' module index.
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* We must filter it out to avoid security issue. */
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if (modidx == NU_CLK_MODIDX_UNDEF) {
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return false;
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}
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for (; modidx_ns != modidx_ns_end; modidx_ns ++) {
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if (modidx == modidx_ns->clk_modidx) {
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if (modidx_ns->ns) {
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return true;
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} else {
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return false;
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}
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}
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}
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}
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return false;
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}
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#endif
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