mirror of https://github.com/ARMmbed/mbed-os.git
212 lines
7.0 KiB
C
212 lines
7.0 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "hal/mpu_api.h"
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#include "platform/mbed_assert.h"
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#include "cmsis.h"
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#if ((__ARM_ARCH_8M_BASE__ == 1U) || (__ARM_ARCH_8M_MAIN__ == 1U)) && \
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defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) && \
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!defined(MBED_MPU_CUSTOM)
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#if !DEVICE_MPU
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#error "Device has v8m MPU but it is not enabled. Add 'MPU' to device_has in targets.json"
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#endif
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#ifdef MBED_CONF_TARGET_MPU_ROM_END
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#define MBED_MPU_ROM_END MBED_CONF_TARGET_MPU_ROM_END
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#else
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#define MBED_MPU_ROM_END (0x10000000 - 1)
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#endif
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#define MBED_MPU_RAM_START (MBED_MPU_ROM_END + 1)
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MBED_STATIC_ASSERT(MBED_MPU_ROM_END <= 0x20000000 - 1,
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"Unsupported value for MBED_MPU_ROM_END");
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void mbed_mpu_init()
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{
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// Flush memory writes before configuring the MPU.
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__DMB();
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const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos;
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// Our MPU setup requires 4 or 5 regions - if this assert is hit, remove
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// a region by setting MPU_ROM_END to 0x1fffffff, or remove MPU from device_has
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#if MBED_MPU_RAM_START == 0x20000000
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MBED_ASSERT(regions >= 4);
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#else
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MBED_ASSERT(regions >= 5);
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#endif
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// Disable the MCU
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MPU->CTRL = 0;
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// Reset all mapping
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for (uint32_t i = 0; i < regions; i++) {
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ARM_MPU_ClrRegion(i);
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}
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/*
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* ARMv8-M memory map:
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*
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* Start End Name Executable by default Default cache Mbed MPU protection
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* 0x00000000 - 0x1FFFFFFF Code Yes WT, WA Write disabled for first portion and execute disabled for the rest
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* 0x20000000 - 0x3FFFFFFF SRAM Yes WB, WA, RA Execute disabled
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* 0x40000000 - 0x5FFFFFFF Peripheral No
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* 0x60000000 - 0x7FFFFFFF RAM Yes WB, WA, RA Execute disabled
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* 0x80000000 - 0x9FFFFFFF RAM Yes WT, RA Execute disabled
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* 0xA0000000 - 0xBFFFFFFF Device No
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* 0xC0000000 - 0xDFFFFFFF Device No
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* 0xE0000000 - 0xFFFFFFFF System No
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*/
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const uint8_t WTRA = ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate
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const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate
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enum {
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AttrIndex_WTRA,
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AttrIndex_WBWARA,
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};
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ARM_MPU_SetMemAttr(AttrIndex_WTRA, ARM_MPU_ATTR(WTRA, WTRA));
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ARM_MPU_SetMemAttr(AttrIndex_WBWARA, ARM_MPU_ATTR(WBWARA, WBWARA));
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ARM_MPU_SetRegion(
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0, // Region
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ARM_MPU_RBAR(
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0x00000000, // Base
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ARM_MPU_SH_NON, // Non-shareable
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1, // Read-Only
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1, // Non-Privileged
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0), // Execute Never disabled
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ARM_MPU_RLAR(
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MBED_MPU_ROM_END, // Limit
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AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
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);
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#if MBED_MPU_RAM_START != 0x20000000
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ARM_MPU_SetRegion(
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4, // Region
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ARM_MPU_RBAR(
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MBED_MPU_RAM_START, // Base
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ARM_MPU_SH_NON, // Non-shareable
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0, // Read-Write
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1, // Non-Privileged
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1), // Execute Never enabled
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ARM_MPU_RLAR(
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0x1FFFFFFF, // Limit
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AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
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);
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#define LAST_RAM_REGION 4
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#else
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#define LAST_RAM_REGION 3
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#endif
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ARM_MPU_SetRegion(
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1, // Region
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ARM_MPU_RBAR(
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0x20000000, // Base
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ARM_MPU_SH_NON, // Non-shareable
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0, // Read-Write
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1, // Non-Privileged
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1), // Execute Never enabled
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ARM_MPU_RLAR(
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0x3FFFFFFF, // Limit
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AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
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);
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ARM_MPU_SetRegion(
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2, // Region
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ARM_MPU_RBAR(
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0x60000000, // Base
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ARM_MPU_SH_NON, // Non-shareable
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0, // Read-Write
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1, // Non-Privileged
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1), // Execute Never enabled
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ARM_MPU_RLAR(
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0x7FFFFFFF, // Limit
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AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate
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);
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ARM_MPU_SetRegion(
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3, // Region
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ARM_MPU_RBAR(
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0x80000000, // Base
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ARM_MPU_SH_NON, // Non-shareable
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0, // Read-Write
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1, // Non-Privileged
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1), // Execute Never enabled
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ARM_MPU_RLAR(
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0x9FFFFFFF, // Limit
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AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate
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);
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// Enable the MPU
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MPU->CTRL =
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(1 << MPU_CTRL_PRIVDEFENA_Pos) | // Use the default memory map for unmapped addresses
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(1 << MPU_CTRL_HFNMIENA_Pos) | // Keep MPU turned on for faults
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(1 << MPU_CTRL_ENABLE_Pos); // Enable MPU
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// Ensure changes take effect
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__DSB();
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__ISB();
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}
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void mbed_mpu_free()
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{
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// Flush memory writes before configuring the MPU.
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__DMB();
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// Disable the MCU
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MPU->CTRL = 0;
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// Ensure changes take effect
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__DSB();
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__ISB();
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}
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static void enable_region(bool enable, uint32_t region)
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{
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MPU->RNR = region;
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MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable << MPU_RLAR_EN_Pos);
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}
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void mbed_mpu_enable_rom_wn(bool enable)
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{
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// Flush memory writes before configuring the MPU.
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__DMB();
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enable_region(enable, 0);
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// Ensure changes take effect
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__DSB();
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__ISB();
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}
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void mbed_mpu_enable_ram_xn(bool enable)
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{
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// Flush memory writes before configuring the MPU.
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__DMB();
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for (uint32_t region = 1; region <= LAST_RAM_REGION; region++) {
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enable_region(enable, region);
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}
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// Ensure changes take effect
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__DSB();
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__ISB();
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}
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#endif
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