mirror of https://github.com/ARMmbed/mbed-os.git
130 lines
3.7 KiB
C
130 lines
3.7 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2015-2016 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "nu_timer.h"
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#include "mbed_power_mgmt.h"
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#include "mbed_critical.h"
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#include "us_ticker_api.h"
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#include "mbed_assert.h"
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void nu_countdown_init(struct nu_countdown_ctx_s *ctx, us_timestamp_t interval_us)
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{
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core_util_critical_section_enter();
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sleep_manager_lock_deep_sleep();
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ctx->_ticker_data = get_us_ticker_data();
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ctx->_interval_end_us = ticker_read_us(ctx->_ticker_data) + interval_us;
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ctx->_expired = false;
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core_util_critical_section_exit();
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}
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bool nu_countdown_expired(struct nu_countdown_ctx_s *ctx)
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{
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core_util_critical_section_enter();
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if (! ctx->_expired) {
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ctx->_expired = ticker_read_us(ctx->_ticker_data) >= ctx->_interval_end_us;
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}
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core_util_critical_section_exit();
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return ctx->_expired;
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}
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void nu_countdown_free(struct nu_countdown_ctx_s *ctx)
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{
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core_util_critical_section_enter();
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sleep_manager_unlock_deep_sleep();
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core_util_critical_section_exit();
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}
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void nu_busy_wait_us(uint32_t us)
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{
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const uint32_t bits = us_ticker_get_info()->bits;
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const uint32_t mask = (1 << bits) - 1;
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MBED_ASSERT(us_ticker_get_info()->frequency == 1000000);
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uint32_t prev = us_ticker_read();
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while (1) {
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const uint32_t cur = us_ticker_read();
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const uint32_t elapsed = (cur - prev) & mask;
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if (elapsed > us) {
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break;
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}
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us -= elapsed;
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prev = cur;
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}
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}
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/* Delay 4 cycles per round by hand-counting instruction cycles
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*
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* The delay function here is implemented by just hand-counting instruction cycles rather than preferred
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* H/W timer since it is to use in cases where H/W timer is not available. Usually, it can delay at least
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* 4-cycles per round.
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*
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* In modern pipeline core, plus flash performance and other factors, we cannot rely accurately on hand-
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* counting instruction cycles for expected delay cycles.
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*/
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#if defined(__CC_ARM)
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MBED_NOINLINE
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__asm void nu_delay_cycle_x4(uint32_t rounds)
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{
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// AStyle should not format inline assembly
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// *INDENT-OFF*
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1
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#if !defined(__CORTEX_M0)
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NOP // 1 cycle
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#endif
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SUBS a1, a1, #1 // 1 cycle
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BCS %BT1 // 3 cycles(M0)/2 cycles(non-M0)
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BX lr
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// *INDENT-ON*
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}
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#elif defined (__ICCARM__)
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MBED_NOINLINE
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void nu_delay_cycle_x4(uint32_t rounds)
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{
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__asm volatile(
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"loop: \n"
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#if !defined(__CORTEX_M0)
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" NOP \n" // 1 cycle
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#endif
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" SUBS %0, %0, #1 \n" // 1 cycle
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" BCS.n loop\n" // 3 cycles(M0)/2 cycles(non-M0)
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: "+r"(rounds)
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:
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: "cc"
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);
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}
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#elif defined ( __GNUC__ ) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
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MBED_NOINLINE
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void nu_delay_cycle_x4(uint32_t rounds)
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{
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__asm__ volatile(
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"%=:\n\t"
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#if !defined(__CORTEX_M0)
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"NOP\n\t" // 1 cycle
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#endif
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#if defined(__thumb__) && !defined(__thumb2__) && !defined(__ARMCC_VERSION)
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"SUB %0, #1\n\t" // 1 cycle
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#else
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"SUBS %0, %0, #1\n\t" // 1 cycle
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#endif
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"BCS %=b\n\t" // 3 cycles(M0)/2 cycles(non-M0)
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: "+l"(rounds)
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:
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: "cc"
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);
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}
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#endif
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