mirror of https://github.com/ARMmbed/mbed-os.git
491 lines
12 KiB
Python
491 lines
12 KiB
Python
"""
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mbed SDK
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Copyright (c) 2011-2013 ARM Limited
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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"""
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CORE_LABELS = {
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"ARM7TDMI-S": "ARM7",
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"Cortex-M0" : "M0",
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"Cortex-M0+": "M0P",
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"Cortex-M3" : "M3",
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"Cortex-M4" : "M4",
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"Cortex-M4F" : "M4"
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}
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import os
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import shutil
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class Target:
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def __init__(self):
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# ARM Core
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self.core = None
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# Is the disk provided by the interface chip of this board virtual?
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self.is_disk_virtual = False
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# list of toolchains that are supported by the mbed SDK for this target
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self.supported_toolchains = None
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# list of extra specific labels
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self.extra_labels = []
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self.name = self.__class__.__name__
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def program_cycle_s(self):
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return 4 if self.is_disk_virtual else 1.5
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def get_labels(self):
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return [self.name, CORE_LABELS[self.core]] + self.extra_labels
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def init_hooks(self, hook, toolchain_name):
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pass
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class LPC2368(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "ARM7TDMI-S"
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self.extra_labels = ['NXP', 'LPC23XX']
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self.supported_toolchains = ["ARM","GCC_ARM","GCC_CR"]
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class LPC1768(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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class LPC11U24(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U24_401']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC11U24_301(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class KL05Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["ARM", "GCC_ARM"]
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self.is_disk_virtual = True
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class KL25Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM"]
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self.is_disk_virtual = True
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class KL46Z(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['Freescale', 'KLXX']
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self.supported_toolchains = ["GCC_ARM", "ARM"]
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self.is_disk_virtual = True
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class K20D5M(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4"
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self.extra_labels = ['Freescale']
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self.supported_toolchains = ["GCC_ARM", "ARM"]
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self.is_disk_virtual = True
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class LPC812(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['NXP', 'LPC81X']
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self.supported_toolchains = ["uARM"]
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self.is_disk_virtual = True
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class LPC810(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0+"
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self.extra_labels = ['NXP', 'LPC81X']
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self.supported_toolchains = ["uARM"]
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self.is_disk_virtual = True
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class LPC4088(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['NXP', 'LPC408X']
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self.supported_toolchains = ["ARM", "GCC_CR", "GCC_ARM"]
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self.is_disk_virtual = True
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def init_hooks(self, hook, toolchain_name):
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if toolchain_name in ['ARM_STD', 'ARM_MICRO']:
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hook.hook_add_binary("post", self.binary_hook)
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@staticmethod
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def binary_hook(t_self, elf, binf):
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if not os.path.isdir(binf):
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# Regular binary file, nothing to do
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return
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outbin = open(binf + ".temp", "wb")
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partf = open(os.path.join(binf, "ER_IROM1"), "rb")
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# Pad the fist part (internal flash) with 0xFF to 512k
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data = partf.read()
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outbin.write(data)
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outbin.write('\xFF' * (512*1024 - len(data)))
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partf.close()
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# Read and append the second part (external flash) in chunks of fixed size
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chunksize = 128 * 1024
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partf = open(os.path.join(binf, "ER_IROM2"), "rb")
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while True:
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data = partf.read(chunksize)
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outbin.write(data)
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if len(data) < chunksize:
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break
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partf.close()
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outbin.close()
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# Remove the directory with the binary parts and rename the temporary
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# file to 'binf'
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shutil.rmtree(binf, True)
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os.rename(binf + '.temp', binf)
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t_self.debug("Generated custom binary file (internal flash + SPIFI)")
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class LPC4330_M4(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['NXP', 'LPC43XX']
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR", "GCC_ARM"]
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class LPC4330_M0(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC43XX']
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
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class LPC1800(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC43XX']
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self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
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class STM32F407(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4F"
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self.extra_labels = ['STM', 'STM32F4XX']
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self.supported_toolchains = ["ARM", "GCC_ARM"]
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class NUCLEO_F103RB(Target):
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OUTPUT_NAMING = "8.3"
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['STM', 'STM32F1', 'STM32F103RB']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class NUCLEO_L152RE(Target):
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OUTPUT_NAMING = "8.3"
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['STM', 'STM32L1', 'STM32L152RE']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class NUCLEO_F401RE(Target):
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OUTPUT_NAMING = "8.3"
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M4"
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self.extra_labels = ['STM', 'STM32F4', 'STM32F401RE']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class NUCLEO_F030R8(Target):
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OUTPUT_NAMING = "8.3"
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['STM', 'STM32F0', 'STM32F030R8']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC1347(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC13XX']
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self.supported_toolchains = ["ARM", "GCC_ARM"]
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class LPC1114(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC11C24(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class LPC11U35_401(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ['NXP', 'LPC11UXX']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
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class UBLOX_C027(Target):
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M3"
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self.extra_labels = ['NXP', 'LPC176X', 'UBLOX_C027']
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self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
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class NRF51822(Target):
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EXPECTED_SOFTDEVICE = 's110_nrf51822_6.0.0_softdevice.hex'
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UICR_START = 0x10001000
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APPCODE_OFFSET = 0x14000
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OUTPUT_EXT = '.hex'
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def __init__(self):
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Target.__init__(self)
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self.core = "Cortex-M0"
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self.extra_labels = ["NORDIC"]
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self.supported_toolchains = ["ARM"]
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def init_hooks(self, hook, toolchain_name):
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if toolchain_name in ['ARM_STD', 'ARM_MICRO']:
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hook.hook_add_binary("post", self.binary_hook)
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@staticmethod
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def binary_hook(t_self, elf, binf):
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for hexf in t_self.resources.hex_files:
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if hexf.find(NRF51822.EXPECTED_SOFTDEVICE) != -1:
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break
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else:
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t_self.debug("Hex file not found. Aborting.")
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return
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# Generate hex file
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# NOTE: this is temporary, it will be removed later and only the
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# combined binary file (below) will be used
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from intelhex import IntelHex
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binh = IntelHex()
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binh.loadbin(binf, offset = NRF51822.APPCODE_OFFSET)
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sdh = IntelHex(hexf)
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sdh.merge(binh)
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outname = binf.replace('.bin', '.hex')
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with open(outname, "w") as f:
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sdh.tofile(f, format = 'hex')
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t_self.debug("Generated SoftDevice-enabled image in '%s'" % outname)
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# Generate concatenated SoftDevice + application binary
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# Currently, this is only supported for SoftDevice images that have
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# an UICR area
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"""
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sdh = IntelHex(hexf)
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if sdh.maxaddr() < NRF51822.UICR_START:
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t_self.error("SoftDevice image does not have UICR area. Aborting.")
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return
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addrlist = sdh.addresses()
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try:
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uicr_start_index = addrlist.index(NRF51822.UICR_START)
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except ValueError:
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t_self.error("UICR start address not found in the SoftDevice image. Aborting.")
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return
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# Assume that everything up to uicr_start_index are contiguous addresses
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# in the SoftDevice code area
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softdevice_code_size = addrlist[uicr_start_index - 1] + 1
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t_self.debug("SoftDevice code size is %d bytes" % softdevice_code_size)
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# First part: SoftDevice code
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bindata = sdh[:softdevice_code_size].tobinstr()
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# Second part: pad with 0xFF up to APPCODE_OFFSET
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bindata = bindata + '\xFF' * (NRF51822.APPCODE_OFFSET - softdevice_code_size)
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# Last part: the application code
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with open(binf, 'r+b') as f:
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bindata = bindata + f.read()
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# Write back the binary
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f.seek(0)
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f.write(bindata)
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t_self.debug("Generated concatenated binary of %d bytes" % len(bindata))
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"""
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# Get a single instance for each target
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TARGETS = [
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LPC2368(),
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LPC1768(),
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LPC11U24(),
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LPC11U24_301(),
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KL05Z(),
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KL25Z(),
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KL46Z(),
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K20D5M(),
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LPC812(),
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LPC810(),
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LPC4088(),
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LPC4330_M4(),
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STM32F407(),
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NUCLEO_F103RB(),
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NUCLEO_L152RE(),
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NUCLEO_F401RE(),
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NUCLEO_F030R8(),
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LPC1347(),
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LPC1114(),
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LPC11C24(),
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LPC11U35_401(),
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NRF51822(),
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UBLOX_C027()
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]
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# Map each target name to its unique instance
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TARGET_MAP = {}
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for t in TARGETS:
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TARGET_MAP[t.name] = t
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TARGET_NAMES = TARGET_MAP.keys()
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# Some targets with different name have the same exporters
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EXPORT_MAP = {}
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