mirror of https://github.com/ARMmbed/mbed-os.git
302 lines
11 KiB
C
302 lines
11 KiB
C
/*******************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#include "mbed_error.h"
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#include "us_ticker_api.h"
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#include "PeripheralNames.h"
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#include "tmr_regs.h"
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#include "clkman_regs.h"
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#define US_TIMER MXC_TMR0
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#define US_TIMER_IRQn TMR0_0_IRQn
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/**
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* Defines timer modes for 16 and 32-bit timers
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*/
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typedef enum {
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/** 32-bit or 16-bit timer one-shot mode */
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MXC_E_TMR_MODE_ONE_SHOT = 0,
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/** 32-bit or 16-bit timer one-shot mode */
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MXC_E_TMR_MODE_CONTINUOUS,
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/** 32-bit timer counter mode */
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MXC_E_TMR_MODE_COUNTER,
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/** 32-bit timer pulse width modulation mode */
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MXC_E_TMR_MODE_PWM,
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/** 32-bit timer capture mode */
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MXC_E_TMR_MODE_CAPTURE,
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/** 32-bit timer compare mode */
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MXC_E_TMR_MODE_COMPARE,
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/** 32-bit timer gated mode */
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MXC_E_TMR_MODE_GATED,
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/** 32-bit timer measure mode */
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MXC_E_TMR_MODE_MEASURE
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} mxc_tmr_mode_t;
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static int us_ticker_inited = 0;
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static uint32_t ticks_per_us;
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static uint32_t tick_win;
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static volatile uint64_t current_cnt; // Hold the current ticks
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static volatile uint64_t event_cnt; // Holds the value of the next event
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#define ticks_to_us(ticks) ((ticks) / ticks_per_us);
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#define MAX_TICK_VAL ((uint64_t)0xFFFFFFFF * ticks_per_us)
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//******************************************************************************
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static inline void inc_current_cnt(uint32_t inc)
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{
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// Overflow the ticker when the us ticker overflows
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current_cnt += inc;
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if (current_cnt > MAX_TICK_VAL) {
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current_cnt -= (MAX_TICK_VAL + 1);
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}
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}
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//******************************************************************************
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static inline int event_passed(uint64_t current, uint64_t event)
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{
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// Determine if the event has already happened.
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// If the event is behind the current ticker, within a window,
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// then the event has already happened.
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if (((current < tick_win) && ((event < current) ||
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(event > (MAX_TICK_VAL - (tick_win - current))))) ||
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((event < current) && (event > (current - tick_win)))) {
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return 1;
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}
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return 0;
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}
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//******************************************************************************
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static inline uint64_t event_diff(uint64_t current, uint64_t event)
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{
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// Check to see if the ticker will overflow before the event
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if(current <= event) {
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return (event - current);
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}
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return ((MAX_TICK_VAL - current) + event);
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}
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//******************************************************************************
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static void tmr_handler(void)
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{
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uint32_t term_cnt32 = US_TIMER->term_cnt32;
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US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
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US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
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NVIC_ClearPendingIRQ(US_TIMER_IRQn);
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inc_current_cnt(term_cnt32);
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if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
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// the timestamp has expired
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event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
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us_ticker_irq_handler();
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} else {
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uint64_t diff = event_diff(current_cnt, event_cnt);
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if (diff < (uint64_t)0xFFFFFFFF) {
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// the event occurs before the next overflow
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US_TIMER->term_cnt32 = diff;
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// Since the timer keeps counting after the terminal value is reached, it is possible that the new
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// terminal value is in the past.
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if (US_TIMER->term_cnt32 < US_TIMER->count32) {
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// the timestamp has expired
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US_TIMER->term_cnt32 = 0xFFFFFFFF; // reset to max value to prevent further interrupts
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US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
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NVIC_ClearPendingIRQ(US_TIMER_IRQn);
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event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
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us_ticker_irq_handler();
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}
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}
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}
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}
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//******************************************************************************
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void us_ticker_init(void)
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{
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if (us_ticker_inited)
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return;
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us_ticker_inited = 1;
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/* Ensure that the TIMER0 clock is enabled */
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if (!(MXC_CLKMAN->clk_gate_ctrl1 & MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER)) {
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MXC_CLKMAN->clk_gate_ctrl1 |= (2 << MXC_F_CLKMAN_CLK_GATE_CTRL1_TIMER0_CLK_GATER_POS);
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}
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current_cnt = 0;
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event_cnt = 0xFFFFFFFFFFFFFFFFULL; // reset to max value
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if (SystemCoreClock <= 1000000) {
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error("us_ticker cannot operate at this SystemCoreClock");
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return;
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}
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// Configure timer for 32-bit continuous mode with /1 prescaler
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US_TIMER->ctrl = MXC_E_TMR_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS | (0 << MXC_F_TMR_CTRL_PRESCALE_POS);
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ticks_per_us = SystemCoreClock / 1000000;
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// Set the tick window to 10ms
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tick_win = SystemCoreClock/100;
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// Set timer overflow to the max
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US_TIMER->term_cnt32 = 0xFFFFFFFF;
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US_TIMER->pwm_cap32 = 0xFFFFFFFF;
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US_TIMER->count32 = 0;
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US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear pending interrupts
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NVIC_SetVector(US_TIMER_IRQn, (uint32_t)tmr_handler);
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NVIC_EnableIRQ(US_TIMER_IRQn);
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US_TIMER->inten |= MXC_F_TMR_INTEN_TIMER0; // enable interrupts
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US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
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}
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//******************************************************************************
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void us_ticker_deinit(void)
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{
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US_TIMER->ctrl = 0; // disable timer
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US_TIMER->inten = 0; // disable interrupts
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US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupts
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us_ticker_inited = 0;
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}
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//******************************************************************************
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uint32_t us_ticker_read(void)
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{
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uint64_t current_cnt1, current_cnt2;
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uint32_t term_cnt, tmr_cnt;
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uint32_t intfl1, intfl2;
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if (!us_ticker_inited)
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us_ticker_init();
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// Ensure coherency between current_cnt and US_TIMER->count32
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do {
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current_cnt1 = current_cnt;
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intfl1 = US_TIMER->intfl;
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term_cnt = US_TIMER->term_cnt32;
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tmr_cnt = US_TIMER->count32;
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intfl2 = US_TIMER->intfl;
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current_cnt2 = current_cnt;
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} while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2));
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// Account for an unserviced interrupt
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if (intfl1) {
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current_cnt1 += term_cnt;
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}
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current_cnt1 += tmr_cnt;
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return (current_cnt1 / ticks_per_us);
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}
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//******************************************************************************
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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// Note: interrupts are disabled before this function is called.
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US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
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if (US_TIMER->intfl) {
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US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1); // clear interrupt
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NVIC_ClearPendingIRQ(US_TIMER_IRQn);
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inc_current_cnt(US_TIMER->term_cnt32);
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}
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// add and reset the current count value
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inc_current_cnt(US_TIMER->count32);
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US_TIMER->count32 = 0;
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// add the number of cycles that the timer is disabled here for
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inc_current_cnt(200);
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event_cnt = (uint64_t)timestamp * ticks_per_us;
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// Check to see if the event has already passed
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if (!event_passed(current_cnt, event_cnt)) {
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uint64_t diff = event_diff(current_cnt, event_cnt);
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if (diff < (uint64_t)0xFFFFFFFF) {
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// the event occurs before the next overflow
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US_TIMER->term_cnt32 = diff;
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} else {
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// the event occurs after the next overflow
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US_TIMER->term_cnt32 = 0xFFFFFFFF; // set to max
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}
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} else {
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// the requested timestamp occurs in the past
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// set the timer up to immediately expire
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US_TIMER->term_cnt32 = 1;
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}
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US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
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}
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void us_ticker_fire_interrupt(void)
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{
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US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
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US_TIMER->term_cnt32 = 1;
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US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
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}
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//******************************************************************************
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void us_ticker_disable_interrupt(void)
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{
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// There are no more events, set timer overflow to the max
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US_TIMER->term_cnt32 = 0xFFFFFFFF;
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}
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//******************************************************************************
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void us_ticker_clear_interrupt(void)
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{
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// cleared in the local handler
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}
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//******************************************************************************
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void us_ticker_set(timestamp_t timestamp)
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{
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US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0; // disable timer
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current_cnt = (uint64_t)timestamp * ticks_per_us;
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US_TIMER->count32 = 0;
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US_TIMER->term_cnt32 = 0xFFFFFFFF;
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US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0; // enable timer
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if (((uint64_t)timestamp * ticks_per_us) >= event_cnt) {
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// The next timestamp has elapsed. Trigger the interrupt to handle it.
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NVIC_SetPendingIRQ(US_TIMER_IRQn);
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}
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}
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