mirror of https://github.com/ARMmbed/mbed-os.git
463 lines
16 KiB
C
463 lines
16 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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// math.h required for floating point operations for baud rate calculation
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#include "mbed_assert.h"
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#include <math.h>
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#include <string.h>
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#include <stdlib.h>
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#include "serial_api.h"
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#include "cmsis.h"
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#include "pinmap.h"
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#include "gpio_api.h"
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/******************************************************************************
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* INITIALIZATION
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******************************************************************************/
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#define UART_NUM 4
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static const PinMap PinMap_UART_TX[] = {
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{P0_0, UART_3, 2},
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{P0_2, UART_0, 1},
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{P0_10, UART_2, 1},
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{P0_15, UART_1, 1},
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{P0_25, UART_3, 3},
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{P2_0 , UART_1, 2},
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{P2_8 , UART_2, 2},
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{P4_28, UART_3, 3},
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{NC , NC , 0}
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};
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static const PinMap PinMap_UART_RX[] = {
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{P0_1 , UART_3, 2},
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{P0_3 , UART_0, 1},
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{P0_11, UART_2, 1},
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{P0_16, UART_1, 1},
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{P0_26, UART_3, 3},
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{P2_1 , UART_1, 2},
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{P2_9 , UART_2, 2},
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{P4_29, UART_3, 3},
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{NC , NC , 0}
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};
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static const PinMap PinMap_UART_RTS[] = {
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{P0_22, UART_1, 1},
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{P2_7, UART_1, 2},
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{NC, NC, 0}
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};
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static const PinMap PinMap_UART_CTS[] = {
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{P0_17, UART_1, 1},
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{P2_2, UART_1, 2},
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{NC, NC, 0}
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};
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#define UART_MCR_RTSEN_MASK (1 << 6)
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#define UART_MCR_CTSEN_MASK (1 << 7)
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#define UART_MCR_FLOWCTRL_MASK (UART_MCR_RTSEN_MASK | UART_MCR_CTSEN_MASK)
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static uart_irq_handler irq_handler;
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int stdio_uart_inited = 0;
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serial_t stdio_uart;
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struct serial_global_data_s {
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uint32_t serial_irq_id;
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gpio_t sw_rts, sw_cts;
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uint8_t count, rx_irq_set_flow, rx_irq_set_api;
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};
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static struct serial_global_data_s uart_data[UART_NUM];
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void serial_init(serial_t *obj, PinName tx, PinName rx) {
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int is_stdio_uart = 0;
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// determine the UART to use
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UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
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UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
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UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
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MBED_ASSERT((int)uart != NC);
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obj->uart = (LPC_UART_TypeDef *)uart;
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// enable power
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switch (uart) {
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case UART_0: LPC_SC->PCONP |= 1 << 3; break;
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case UART_1: LPC_SC->PCONP |= 1 << 4; break;
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case UART_2: LPC_SC->PCONP |= 1 << 24; break;
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case UART_3: LPC_SC->PCONP |= 1 << 25; break;
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}
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// enable fifos and default rx trigger level
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obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
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| 0 << 1 // Rx Fifo Reset
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| 0 << 2 // Tx Fifo Reset
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| 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
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// disable irqs
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obj->uart->IER = 0 << 0 // Rx Data available irq enable
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| 0 << 1 // Tx Fifo empty irq enable
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| 0 << 2; // Rx Line Status irq enable
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// set default baud rate and format
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serial_baud (obj, 9600);
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serial_format(obj, 8, ParityNone, 1);
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// pinout the chosen uart
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pinmap_pinout(tx, PinMap_UART_TX);
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pinmap_pinout(rx, PinMap_UART_RX);
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// set rx/tx pins in PullUp mode
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if (tx != NC) {
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pin_mode(tx, PullUp);
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}
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if (rx != NC) {
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pin_mode(rx, PullUp);
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}
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switch (uart) {
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case UART_0: obj->index = 0; break;
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case UART_1: obj->index = 1; break;
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case UART_2: obj->index = 2; break;
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case UART_3: obj->index = 3; break;
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}
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uart_data[obj->index].sw_rts.pin = NC;
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uart_data[obj->index].sw_cts.pin = NC;
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serial_set_flow_control(obj, FlowControlNone, NC, NC);
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is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
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if (is_stdio_uart) {
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stdio_uart_inited = 1;
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memcpy(&stdio_uart, obj, sizeof(serial_t));
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}
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}
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void serial_free(serial_t *obj) {
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uart_data[obj->index].serial_irq_id = 0;
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}
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// serial_baud
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// set the baud rate, taking in to account the current SystemFrequency
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void serial_baud(serial_t *obj, int baudrate) {
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MBED_ASSERT((int)obj->uart <= UART_3);
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// The LPC2300 and LPC1700 have a divider and a fractional divider to control the
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// baud rate. The formula is:
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//
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// Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
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// where:
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// 1 < MulVal <= 15
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// 0 <= DivAddVal < 14
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// DivAddVal < MulVal
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//
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// set pclk to /1
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switch ((int)obj->uart) {
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case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
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case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
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case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
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case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
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default: break;
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}
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uint32_t PCLK = SystemCoreClock;
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// First we check to see if the basic divide with no DivAddVal/MulVal
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// ratio gives us an integer result. If it does, we set DivAddVal = 0,
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// MulVal = 1. Otherwise, we search the valid ratio value range to find
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// the closest match. This could be more elegant, using search methods
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// and/or lookup tables, but the brute force method is not that much
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// slower, and is more maintainable.
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uint16_t DL = PCLK / (16 * baudrate);
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uint8_t DivAddVal = 0;
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uint8_t MulVal = 1;
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int hit = 0;
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uint16_t dlv;
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uint8_t mv, dav;
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if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
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int err_best = baudrate, b;
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for (mv = 1; mv < 16 && !hit; mv++)
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{
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for (dav = 0; dav < mv; dav++)
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{
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// baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
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// solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
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// mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
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// for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
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// note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
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if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
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dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
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else // 2 bits headroom, use more precision
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dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
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// datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
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if (dlv == 0)
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dlv = 1;
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// datasheet says if dav > 0 then DL must be >= 2
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if ((dav > 0) && (dlv < 2))
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dlv = 2;
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// integer rearrangement of the baudrate equation (with rounding)
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b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
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// check to see how we went
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b = abs(b - baudrate);
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if (b < err_best)
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{
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err_best = b;
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DL = dlv;
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MulVal = mv;
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DivAddVal = dav;
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if (b == baudrate)
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{
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hit = 1;
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break;
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}
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}
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}
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}
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}
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// set LCR[DLAB] to enable writing to divider registers
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obj->uart->LCR |= (1 << 7);
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// set divider values
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obj->uart->DLM = (DL >> 8) & 0xFF;
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obj->uart->DLL = (DL >> 0) & 0xFF;
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obj->uart->FDR = (uint32_t) DivAddVal << 0
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| (uint32_t) MulVal << 4;
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// clear LCR[DLAB]
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obj->uart->LCR &= ~(1 << 7);
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}
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
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MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
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MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
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MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
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(parity == ParityForced1) || (parity == ParityForced0));
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stop_bits -= 1;
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data_bits -= 5;
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int parity_enable = 0, parity_select = 0;
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switch (parity) {
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case ParityNone: parity_enable = 0; parity_select = 0; break;
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case ParityOdd : parity_enable = 1; parity_select = 0; break;
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case ParityEven: parity_enable = 1; parity_select = 1; break;
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case ParityForced1: parity_enable = 1; parity_select = 2; break;
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case ParityForced0: parity_enable = 1; parity_select = 3; break;
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default:
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break;
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}
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obj->uart->LCR = data_bits << 0
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| stop_bits << 2
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| parity_enable << 3
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| parity_select << 4;
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}
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/******************************************************************************
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* INTERRUPTS HANDLING
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******************************************************************************/
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static inline void uart_irq(uint32_t iir, uint32_t index, LPC_UART_TypeDef *puart) {
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// [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
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SerialIrq irq_type;
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switch (iir) {
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case 1: irq_type = TxIrq; break;
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case 2: irq_type = RxIrq; break;
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default: return;
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}
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if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
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gpio_write(&uart_data[index].sw_rts, 1);
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// Disable interrupt if it wasn't enabled by other part of the application
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if (!uart_data[index].rx_irq_set_api)
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puart->IER &= ~(1 << RxIrq);
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}
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if (uart_data[index].serial_irq_id != 0)
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if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
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irq_handler(uart_data[index].serial_irq_id, irq_type);
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}
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void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0, (LPC_UART_TypeDef*)LPC_UART0);}
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void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_UART_TypeDef*)LPC_UART1);}
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void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2, (LPC_UART_TypeDef*)LPC_UART2);}
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void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3, (LPC_UART_TypeDef*)LPC_UART3);}
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
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irq_handler = handler;
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uart_data[obj->index].serial_irq_id = id;
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}
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static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
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IRQn_Type irq_n = (IRQn_Type)0;
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uint32_t vector = 0;
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switch ((int)obj->uart) {
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case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
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case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
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case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
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case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
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}
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if (enable) {
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obj->uart->IER |= 1 << irq;
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NVIC_SetVector(irq_n, vector);
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NVIC_EnableIRQ(irq_n);
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} else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
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int all_disabled = 0;
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SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
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obj->uart->IER &= ~(1 << irq);
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all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
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if (all_disabled)
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NVIC_DisableIRQ(irq_n);
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}
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}
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
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if (RxIrq == irq)
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uart_data[obj->index].rx_irq_set_api = enable;
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serial_irq_set_internal(obj, irq, enable);
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}
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static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
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uart_data[obj->index].rx_irq_set_flow = enable;
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serial_irq_set_internal(obj, RxIrq, enable);
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}
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/******************************************************************************
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* READ/WRITE
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******************************************************************************/
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int serial_getc(serial_t *obj) {
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while (!serial_readable(obj));
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int data = obj->uart->RBR;
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if (NC != uart_data[obj->index].sw_rts.pin) {
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gpio_write(&uart_data[obj->index].sw_rts, 0);
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obj->uart->IER |= 1 << RxIrq;
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}
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return data;
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}
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void serial_putc(serial_t *obj, int c) {
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while (!serial_writable(obj));
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obj->uart->THR = c;
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uart_data[obj->index].count++;
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}
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int serial_readable(serial_t *obj) {
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return obj->uart->LSR & 0x01;
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}
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int serial_writable(serial_t *obj) {
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int isWritable = 1;
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if (NC != uart_data[obj->index].sw_cts.pin)
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isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
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else {
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if (obj->uart->LSR & 0x20)
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uart_data[obj->index].count = 0;
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else if (uart_data[obj->index].count >= 16)
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isWritable = 0;
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}
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return isWritable;
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}
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void serial_clear(serial_t *obj) {
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obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
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| 1 << 1 // rx FIFO reset
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| 1 << 2 // tx FIFO reset
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| 0 << 6; // interrupt depth
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}
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void serial_pinout_tx(PinName tx) {
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pinmap_pinout(tx, PinMap_UART_TX);
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}
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void serial_break_set(serial_t *obj) {
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obj->uart->LCR |= (1 << 6);
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}
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void serial_break_clear(serial_t *obj) {
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obj->uart->LCR &= ~(1 << 6);
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}
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void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
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// Only UART1 has hardware flow control on LPC176x
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LPC_UART1_TypeDef *uart1 = (uint32_t)obj->uart == (uint32_t)LPC_UART1 ? LPC_UART1 : NULL;
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int index = obj->index;
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// First, disable flow control completely
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if (uart1)
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uart1->MCR = uart1->MCR & ~UART_MCR_FLOWCTRL_MASK;
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uart_data[index].sw_rts.pin = uart_data[index].sw_cts.pin = NC;
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serial_flow_irq_set(obj, 0);
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if (FlowControlNone == type)
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return;
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// Check type(s) of flow control to use
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UARTName uart_rts = (UARTName)pinmap_find_peripheral(rxflow, PinMap_UART_RTS);
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UARTName uart_cts = (UARTName)pinmap_find_peripheral(txflow, PinMap_UART_CTS);
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if (((FlowControlCTS == type) || (FlowControlRTSCTS == type)) && (NC != txflow)) {
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// Can this be enabled in hardware?
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if ((UART_1 == uart_cts) && (NULL != uart1)) {
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// Enable auto-CTS mode
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uart1->MCR |= UART_MCR_CTSEN_MASK;
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pinmap_pinout(txflow, PinMap_UART_CTS);
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} else {
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// Can't enable in hardware, use software emulation
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gpio_init_in(&uart_data[index].sw_cts, txflow);
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}
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}
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if (((FlowControlRTS == type) || (FlowControlRTSCTS == type)) && (NC != rxflow)) {
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// Enable FIFOs, trigger level of 1 char on RX FIFO
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obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
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| 1 << 1 // Rx Fifo Reset
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| 1 << 2 // Tx Fifo Reset
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| 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
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// Can this be enabled in hardware?
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if ((UART_1 == uart_rts) && (NULL != uart1)) {
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// Enable auto-RTS mode
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uart1->MCR |= UART_MCR_RTSEN_MASK;
|
|
pinmap_pinout(rxflow, PinMap_UART_RTS);
|
|
} else { // can't enable in hardware, use software emulation
|
|
gpio_init_out_ex(&uart_data[index].sw_rts, rxflow, 0);
|
|
// Enable RX interrupt
|
|
serial_flow_irq_set(obj, 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
const PinMap *serial_tx_pinmap()
|
|
{
|
|
return PinMap_UART_TX;
|
|
}
|
|
|
|
const PinMap *serial_rx_pinmap()
|
|
{
|
|
return PinMap_UART_RX;
|
|
}
|
|
|
|
const PinMap *serial_cts_pinmap()
|
|
{
|
|
return PinMap_UART_CTS;
|
|
}
|
|
|
|
const PinMap *serial_rts_pinmap()
|
|
{
|
|
return PinMap_UART_RTS;
|
|
}
|
|
|