mirror of https://github.com/ARMmbed/mbed-os.git
387 lines
19 KiB
Plaintext
387 lines
19 KiB
Plaintext
================ Revision history ============================================
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4.2.1:
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- Added errata fix for an issue that may cause BOD resets in EM2 when using
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DCDC-to-DVDD mode. The fix is implemented in EMU_DCDCInit().
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- Added function EMU_DCDCPowerOff() for boards with physically disconnected DCDC.
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- Current consumption is optimized for DCDC bypass mode. This update is
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implemented in EMU_DCDCInit().
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4.2.0:
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- Updated I2C clock divider equation for platform 2 parts. Added constraints
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to HFPER clock frequency in I2C_BusFreqSet().
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- EMU EMU_EM23VregMode_TypeDef replaced with a bool.
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- Added support for GPIO alternate drive strength and alternate control modes.
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- DCDC setup is simplified. More tuning and optimization settings added to
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EMU_DCDCInit().
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- Added member pinRetentionMode to EMU_EM4Init_TypeDef.
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- Added function EMU_UnlatchPinRetention() to support unlatching of pin
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retention in EM4H/S.
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- Fixed bug in ADC_InitScan() which caused a overwrite of single conversion
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mode calibration values.
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- Added support for CRYPTO module on Pearl and Jade Geckos (em_crypto.c/h)
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4.1.1:
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- EMU_DCDCInit() updated with new parameters for EM2 and 3. Current consumption
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with DCDC at expected levels for EFR32 and EFM32PG revA1, A2 and B0.
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- EMU_DCDCInit_TypeDef updated with more parameters. EMU_DcdcLpcmpBiasMode_TypeDef
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is removed.
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- More assertions added to EMU_DCDCInit().
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- HFXO default parameters updated.
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- ADC defaults updated.
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- RMU pin mode set fixed.
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- Added missing define for cmuSelect_ULFRCO.
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- Added missing functions for handling peripheral interrupts.
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- Added support for VMON.
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4.1.0:
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- The typedef EMU_EM23Init_TypeDef which is a parameter to EMU_EM23Init()
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has got a new definition.
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- Initial support _SILICON_LABS_32B_PLATFORM_2 devices added
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4.0.0:
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- Use ARM CMSIS version 4.2.0.
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- New style version macros in em_version.h.
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3.20.14:
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- USB release only.
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3.20.13:
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- Added new style family #defines in em_system.h, including EZR32 families.
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- Fixed I2C_FREQ_STANDARD_MAX macros.
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- Fixed bug in MSC_WriteWord which called internal functions that were linked
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to flash for armgcc. All subsequent calls of MSC_WriteWord should now be
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linked to RAM for all supported compilers. The internals of MSC_WriteWord
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will check the global variable SystemCoreClock in order to make sure the
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frequency is high enough for flash operations. If the core clock frequency
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is changed, software is responsible for calling MSC_Init or
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SystemCoreClockGet in order to set the SystemCoreClock variable to the
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correct value.
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- Added errata fix IDAC_101.
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3.20.12:
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- Added errata fix EMU_108.
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- #ifdef's now use register defines instead of a mix of register and family defines.
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- Added a case for when there are only 4 DMA channels available:
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Alignment was (correctly) defined at 7 bit, but got asserted for 8 bit, leading
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to unpredictable tripped asserts.
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- Added USART_INITPRSTRIGGER_DEFAULT defined structure to support HWCONF.
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- Added support for LFC clock tree.
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- Added CMU_USHFRCOBandSet() and CMU_USHFRCOBandGet().
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3.20.10:
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- Maintenance release, no changes.
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3.20.9:
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- Added support for Happy Gecko including support for the new oscillator USHFRCO.
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- Added MSC_WriteWordFast() function. This flash write function has a similar
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performance as the old MSC_WriteWord(), but it disables interrupts and
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requires a core clock frequency of at least 14MHz. The new MSC_WriteWord()
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is slower, but it does not disable interrupts and may be called with core
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clock frequencies down to 1MHz.
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- Fixed a bug in EMU_EnterEM4() that set other EM4 configuration bits to 0
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on EM4 entry.
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- Added EMU_EM23Init().
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- Fixed a bug in CMU_FlashWaitStateControl() where it failed to set the
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required wait-state configuration if the MSC is locked.
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- Added EMU interrupt handling functions.
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- BURTC_Reset() changed to use async reset RMU_CTRL_BURSTEN instead of
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reset value writeback. This makes the function independent of a selected
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and enabled clock.
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- BURTC_Sync() now returns without waiting for BURTC->SYNCBUSY to clear
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when no clock is selected in BURTC_CTRL_CLKSEL.
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- Fixed assertion bug in ACMP_ChannelSet() that checked the negSel parameter
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against the wrong upper bound.
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3.20.7:
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- Fixed CMU_MAX_FREQ_HFLE macro for Wonder family.
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- Fixed MSC_WriteWord() bug.
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- Added syncbusy wait in RTC_Reset() for Gecko family.
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3.20.6:
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- Corrected fix for Errata EMU_E107.
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3.20.5:
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- Updated license texts.
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- Removed unnecessary fix for Wonder Gecko.
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- Updated LFXO temperature compensation in CHIP_Init().
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- Changed LESENSE_ScanStart, LESENSE_ScanStop, LESENSE_DecoderStart,
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LESENSE_ResultBufferClear() and LESENSE_Reset() functions to wait until
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CMD register writes complete in order to make sure CMD register writes do
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not break each other, and for register values to be consistent when
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returning from functions that write to the CMD register.
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- Added fix for Errata EMU_E107.
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- Added family to SYSTEM_ChipRevision_TypeDef.
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- Fixed bug in function AES_OFB128 which failed on Zero Gecko.
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- Fixed RMU_ResetCauseGet() to return correct reset causes.
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- Fixed bug in RTC_CounterReset() which failed to reset counter immediately
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after return on Gecko devices.
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- Added static inline non-blocking USART receive functions (USART_Rx...).
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- Added function SYSTEM_GetFamily().
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- Added function DAC_ChannelOutputSet().
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- Fixed MSC_WriteWord() to not use WDOUBLE if LPWRITE is set.
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3.20.2:
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- Fixed bug regarding when MEMINFO in DEVINFO was introduced.
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The correct crossover is production revision 18.
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- Fixed bug in WDOG_Feed() which does not feed the watchdog if the watchdog
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is disabled. Previously, the watchdog was broken after WDOG_Feed() fed it
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when it was disabled.
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- Fixed issue in em_i2c.c, which should set the NACK bit in the I2C CMD
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register for the next to last byte received. The exception is when only
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one byte is to be received. Then the NACK bit must be set like the
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previous code was doing.
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- Added function BURTC_ClockFreqGet() in order to determine clock frequency
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of BURTC.
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- Fixed bug in BURTC_Reset() which made a subsequent call to BURTC_Init hang.
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- Added support for the IDAC module on the Zero Gecko family, em_idac.c/h.
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- Fixed bug in DAC_PrescaleCalc() which could return higher values than
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the maximum prescaler value. The fix makes sure to return the max prescaler
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value resulting in possible higher DAC frequency than requested.
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- Fixed I2C_BusFreqSet to use documented values for Nlow and Nhigh values,
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and do not decrement the div(isor) by one according to the formula because
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this resulted in higher I2C bus frequencies than desired.
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3.20.0:
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- LEUART: Added LEUART_TxDmaInEM2Enable() and LEUART_RxDmaInEM2Enable() for
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enabling and disabling DMA LEUART RX and Tx in EM2 support.
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3.0.3:
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- Internal release for testing Wonder Gecko support.
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- SYSTEM: Added function to enable/disable FPU access on Wonder parts,
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SYSTEM_FpuAccessModeSet().
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- USART: Added USART_SpiTransfer() function.
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3.0.2:
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- MSC: In MSC_WriteWord(), added support for double word write cycle support
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(WDOUBLE) on devices with more than 512KiBytes of Flash memory. This can
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almost double the speed of the MSC_WriteWord function for large data sizes.
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- MSC: In MSC_ErasePage(), added support for devices with Flash page size
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larger than 512 bytes, like Giant and Leopard Gecko.
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- CMU: Fixed bug in CMU_ClockDivSet(). Clear HFLE and HFCORECLKLEDIV flags when
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the core runs at frequencies up to 32MHz.
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- CMU: Fixed bug in CMU_ClockEnable(): Set the HFLE and HFCORECLKLEDIV flags
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when the CORE clock runs at frequencies higher than 32MHz.
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- CMU: Fixed bug in CMU_ClockSelectSet(): Set HFLE and DIV4 factor for peripheral
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clock if HFCORE clock for LE is enabled and the CORE clock runs at
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frequencies higher than 32MHz.
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- BITBAND: Added BITBAND_PeripheralRead() and BITBAND_SRAMRead() functions.
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- DMA: Added #ifndef EXCLUDE_DEFAULT_DMA_IRQ_HANDLER around DMA_IRQHandler in
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order for the user to implement a custom IRQ handler or run without a DMA
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IRQ handler by defining EXCLUDE_DEFAULT_DMA_IRQ_HANDLER with the -D compiler
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option.
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- BURTC: In functions BURTC_Init() and BURTC_CompareSet(), moved SYNCBUSY
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loops in front of modifications of registers COMP0 and LPMODE.
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- MSC: Fixed ram_code section error on Keil toolchain.
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- MSC: Removed uneeded code from MSC init and deinit which would have no
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effect (Big thanks to Martin Schreiber for reporting this bug!).
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- System: Added access functions for reading some values out of the Device
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Information page.
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3.0.1:
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- LFXO fix for Giant family.
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- USART: Fix for EFM32TG108Fxx which does not have USART0.
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- EBI: The write to the CTRL register now happens before the ROUTE registers
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are set. This avoids potential glitches.
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- LESENSE: Fix issue when using lesenseAltExMapACMP.
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- TIMER: Fix compilation on devices where ADC is not available.
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- LCD: Fix bug where Aloc field would not be set to 0.
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- BURTC: Fix Reset function by adding reset of COMP0 register and removing
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reset of POWERDOWN register. The POWERDOWN register cannot be used to
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power up the blocks after it has been powered down.
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- CMU: Fixed bug where ClockDivSet, ClockDivGet and ClockFreqGet didn't work for
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cmuClock_LCDpre clock. Also corrected 3 wrongly typed constants.
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- CMU: Fixed bug where LFBE field in LFCLKSEL was not cleared before setting
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bit-value.
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- CMU: Fixed bug with CMU_ClockSelectGet. Did not give correct return value
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for cmuClock_LFB.
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- I2C: Fixed bug where I2C_Init would set divisor depending on the previous
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master/slave configuration, not the one set in the initialization.
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- I2C: Fixed issue in the function I2C_BusFreqSet (called by I2C_Init). The
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input parameter 'I2C_ClockHLR_TypeDef type' was not in use. The fix enables
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the parameter to add support for 'i2cClockHLRAsymetric' and 'i2cClockHLRFast'
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modes. In order to use 'i2cClockHLRAsymetric' and 'i2cClockHLRFast' the
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frequency of the HFPER clock may need to be increased.
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- OPAMP: Fixed bug in the function OPAMP_Enable where an incorrect register
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was used when setting the OPA2 calibration value.
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- LEUART: Fixed issue in LEUART_BaudrateSet when a high clock frequency and a
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low baudrate can overflow the clock divisor register (CLKDIV). The fix uses
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an assert statement to check whether the calculated clock divisor is out of
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range.
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- USART: Fixed issue in USART_BaudrateAsyncSet when a high clock frequency and
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a low baudrate can overflow the clock divisor register (CLKDIV). The fix uses
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an assert statement to check whether the calculated clock divisor is out of
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range.
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3.0.0:
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- efm32lib renamed emlib, as it will include support for non-EFM32 devices
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in the future
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- Added CMSIS_V3 compatibility fixes, and use of CMSIS_V3 definitions
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- See Device/Changes-EnergyMicro.txt for detailed path changes
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- New prefixes of all files, efm32_<peripherqal>.c/h to em_<peripheral>.c/h
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- New names for readme and changes files
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- RMU - BUMODERST not masked away when EM4 bits has been set
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- CMU - CMU_LFClkGet now accounts for ULFRCO bit for Tiny Gecko
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2.4.1:
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- New, open source friendly license
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- Fixed BURTC initialization hang if init->enable was false
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- Fixed CMU issue with USBC and USB checks not being used correctly
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- Added CMU feature, missing TIMER3 support
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- Improved accuracy of SPI mode for USART baudrate calculation
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- Corrected USBC HFCLKNODIV setting to comply with new header file defines
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2.4.0:
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- Added efm32_version.h defining software version number
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- Added BURTC support for Giant and Leopard Gecko
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- Added RMU_ResetControl for BU reset flag
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- Added some missing features to EMU for back up domain and EM4 support
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- ADC TimebaseCalc(), Giant/Leopard Gecko have max 5 bits in TIMEBASE field
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- Removed EMU Backup Power Domain threshold setings from EMU_BUPDInit, added
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EMU_BUThresRangeSet() and EMU_BUThresholdSet() API calls. Threshold values
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are factory calibrated and should not usually be overridden by the user.
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2.3.2:
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- Added Tiny Gecko and Giant Gecko support in RMU for new reset causes
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- CMU_ClockFreqGet will now report correct clock rates if HFLE is set (/4)
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- Added Giant Gecko specific MSC_MassErase(), erase entire flash
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- Added Giant Gecko specific MSC_BusStrategy (inline) function
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- MSC_Init() will now configure TIMEBASE correctly according to AUXHFRCO clock
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rate for Tiny Gecko and Giant Gecko
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2.3.0:
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- USART - Added USART_InitPrsTrigger to initialize USART PRS triggered
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transmissions.
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- CMU - numerous updates, now supports full clock tree of Giant/Tiny Gecko
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- CMU_ClockDivSet/Get will now use real dividend and not logarithmic values
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as earlier. Prior enumerated values have been kept for backward compatibility.
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- Added support for CMU HFLE and DIV4 factor for core clock for LE
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peripherals
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- Added support for alternate LCD segment animation range for Giant Gecko
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- Fixed bug: Don't enable VCMP low power reference until after warm up,
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allow biasprog value of 0 in VCMP_Init()
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- Added support for ALTMAP (256MB address map) in EBI_BankAddress()
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- TIMER_Init() will now reset CNT value
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2.2.2:
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- Added DAC0 channel 0 and 1 to ACMP for Tiny and Giant devices
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- Fixed bug in CMU for MSC WAITSTATE configuration, leading to too high wait
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states depending on clock rate
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- Fixed bug in CMU for UART1 clock enable
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2.2.1:
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- UART_Reset() and LEUART_Reset() will now reset ROUTE register as well, this
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will mean GPIO pins will not be driven after this call. Take care to ensure
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that GPIO ROUTE register is configured after calls to *UART_Init*Sync
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- Fixed problems with EFM_ASSERT when using UART in USART API
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- Added Giant Gecko support for EBI (new modes and TFT direct drive)
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- Added Giant Gecko support for CMU 2 WAIT STATES, and I2C1
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- Added Giant Gecko support for UART1 in CMU
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- Added Giant Gecko support for DMA LOOP and 2D Copy operations
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2.1.0:
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- EMU_Restore will now disable HFRCO if it was not enabled when entering
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an Energy Mode
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- Run time changes only applies to Gecko devices, filter out Tiny and Giant
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for CHIP_Init();
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- Added const specificers to various initialization structures, to ensure
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they can reside in flash instead of SRAM
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- Bugfix in efm32_i2c.c, keep returning i2cTransferInProgress until done
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2.0.1:
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- Changed enum OPAMP_PosSel_TypeDef. Enum value opaPosSelOpaIn changed from
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DAC_OPA0MUX_POSSEL_OPA1IN to DAC_OPA0MUX_POSSEL_OPA0INP.
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- Bugfix in efm32_lesense.h, LESENSE_ChClk_TypeDef now contains unshifted
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values, fixed the implementation in efm32_lesense.c where the bug prevented
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the sampleClk to be set to AUXHFRCO.
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2.0.0:
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- USART_Init-functions now calls USART_Reset() which will also disable/reset
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interrupt
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- USART_BaudrateSyncSet() now asserts on invalid oversample configuration
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- Added initialization of parity bit in LEUART_Init()
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- Added Tiny Gecko support for CMU, ULFRCO, LESENSE clocks and continuous
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calibration
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- Added Tiny Gecko support for GPIO, EM4 pin retention and wake up support
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- Added Tiny Gecko support for I2S, SPI auto TX mode on USART
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- Added Tiny Gecko support for CACHE mesasurements for MSC module
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- Added Tiny Gecko support for LCD module (with no HIGH segment registers)
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- Added Tiny Gecko support for TIMER, PWM 2x, (DT lock not supported)
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- Added Tiny Gecko support for LESENSE module
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- Added Tiny Gecko support for PRS input in PCNT
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- Added Tiny Gecko support for async signals in PRS, PRS_SourceAsyncSignalSet()
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- Initial support for some Giant Gecko features, where overlapping with Tiny
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- Removed LPFEN / LPFREQ support from DAC
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- Fixed comments around interrupt functions, making it clear it is bitwise
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logical or interrupt flags
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- Fixed PCNT initialization for external clock configurations, making sure
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config is synchronized at startup to 3 clocks. Note fix only works for
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>revC EFM32G devices.
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- Fixed efm32_cmu.c, EFM_ASSERT statement for LEUART clock div logic was
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inverted
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- Fixed ADC_InitScan, PRSSEL shift value corrected
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- Fixed CMU_ClockFreqGet for devices that do not have I2C
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- Fixed I2C_TransferInit for devices with more than one I2C-bus (Giant Gecko)
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- Changed ACMP_Disable() implementation, now only disables the ACMP instance
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by clearing the EN bit in the CTRL register
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- Removed ACMP_DisableNoReset() function
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- Fixed ACMP_Init(), removed automatic enabling, added new structure member
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"enaReq" for ACMP_Init_TypeDef to control, fixed the EFM_ASSERT of the
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biasprog parameter
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- Added default configuration macro ACMP_INIT_DEFAULT for ACMP_Init_TypeDef
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- Fixed ACMP_CapsenseInit(), removed automatic enabling, added new structure member
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"enaReq" for ACMP_CapsenseInit_TypeDef to control, fixed the EFM_ASSERT of
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the biasprog parameter
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- Changed the name of the default configuration macro for
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ACMP_CapsenseInit_TypeDef to ACMP_CAPSENSE_INIT_DEFAULT
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- Added RTC_Reset and RTC_CounterReset functions for RTC
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1.3.0:
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- MSC is automatically enabled/disabled when using the MSC API. This saves
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power, and reduces errors due to not calling MSC_Init().
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- Added API for controlling Cortex-M3 MPU (memory protection unit)
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- Adjusted bit fields to comply with latest CMSIS release, see EFM_CMSIS
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changes file for details
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- Fixed issue with bit mask clearing in ACMP
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- Functions ACMP_Enable and ACMP_DisableNoReset added
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- Added comment about rev.C chips in PCNT, CMD_LTOPBIM not neccessary any more
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- Added missing instance validity asserts to peripherals (ACMP, LEUART, USART)
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- Fixed UART0 check in CMU_ClockFreqGet()
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- Fixed command sync for PCNT before setting TOPB value during init
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- Fixed instance validity check macro in PCNT
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- Fixed TIMER_Reset() removed write to unimplemented timer channel registers
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- Fixed EFM_ASSERT statements in ACMP, VCMP
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- General code style update: added missing curly braces, default cases, etc.
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1.2.1:
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- Feature complete efm32lib, now also includes peripheral API for modules
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AES,PCNT,MSC,ACMP,VCMP,LCD,EBI
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- Fixed _TIMER_CC_CTRL_ICEDGE flags for correct timer configuration
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- Fixed ADC calibration of Single and Scan mode of operation
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- Added PCNT (ChipRev A/B PCNT0 errata NOT supported) and AES support
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- Fixed conditional inclusion in efm32_emu.h
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- Fixed code for LEUART0 for devices with multiple LEUARTs.
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- Fixed incorrect setting of DOUT for GPIO configuration
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1.1.4
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- Fix for TIMER_INIT_DEFAULT
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1.1.3:
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- Added ADC, DAC, LETIMER, PRS, TIMER (except DTI) support
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- Added utility for fetching chip revision (efm32_system.c/h)
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- Removed RTC instance ref in API, only one RTC will be supported
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(Affects also define in efm32_cmu.h)
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- Added default init struct macros for LEUART, USART
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- Added msbf parameter in USART synchronous init struct, USART_InitSync_TypeDef.
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- Updated reset for I2C, USART, LEUART to also reset IEN register.
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- Corrected fault in GPIO_PortOutSet()
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1.1.2:
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- Corrected minor issues in EMU, EM3 mode when restoring clocks
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- Corrected RMU reset cause checking
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- Changed GPIO enumerator symbols to start with gpio (from GPIO_)
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- Changed CMU and WDOG enum typedefs to start with CMU_/WDOG_ (from cmu/wdog)
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- Added USART/UART, LEUART, DMA, I2C support
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1.1.1:
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- First version including support for CMU, DBG, EMU, GPIO, RTC, WDOG
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