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mbed-os/targets/TARGET_STM/TARGET_STM32F1/device
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Laurent MEUNIER a1f7a36461 STM32 HAL I2C fix RXNE case 
As reported in issue #4214, there are seen issues seen first on
NUCLEO_F103RB in case of successive Reads of 1 byte at a time.

This issue is due to a wrong state management in the end of read sequence.
Also F1 i2c driver was not fully aligned to others, which is updated here.
 		2017-06-02 17:28:48 +02:00
..
Release_Notes_stm32f1xx_hal.html F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32_assert_template.h STM32 F1 HAL V1.0.5 2016-12-14 08:35:12 +01:00
stm32_hal_legacy.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_adc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_adc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_adc_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_adc_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_can.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_can.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_can_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_cec.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_cec.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_conf.h Introduce stm32_assert.h for MBED port 2017-05-29 13:48:29 +02:00
stm32f1xx_hal_cortex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_cortex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_crc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_crc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dac.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dac.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dac_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dac_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_def.h Merge pull request #4296 from LMESTM/dev_stm32_hal_F1_V1.5.0 2017-05-15 16:20:51 +01:00
stm32f1xx_hal_dma.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dma.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_dma_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_eth.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_eth.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_flash.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_flash.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_flash_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_flash_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_gpio.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_gpio.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_gpio_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_gpio_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_hcd.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_hcd.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_i2c.c STM32 HAL I2C fix RXNE case 2017-06-02 17:28:48 +02:00
stm32f1xx_hal_i2c.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_i2s.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_i2s.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_irda.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_irda.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_iwdg.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_iwdg.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_mmc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_mmc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_nand.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_nand.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_nor.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_nor.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pccard.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pccard.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pcd.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pcd.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pcd_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pcd_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pwr.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_pwr.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rcc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rcc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rcc_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rcc_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rtc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rtc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rtc_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_rtc_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_sd.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_sd.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_smartcard.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_smartcard.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_spi.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_spi.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_spi_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_sram.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_sram.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_tim.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_tim.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_tim_ex.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_tim_ex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_uart.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_uart.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_usart.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_usart.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_wwdg.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_hal_wwdg.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_adc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_adc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_bus.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_cortex.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_crc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_crc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_dac.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_dac.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_dma.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_dma.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_exti.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_exti.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_fsmc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_fsmc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_gpio.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_gpio.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_i2c.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_i2c.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_iwdg.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_pwr.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_pwr.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_rcc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_rcc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_rtc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_rtc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_sdmmc.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_sdmmc.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_spi.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_spi.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_system.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_tim.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_tim.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_usart.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_usart.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_usb.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_usb.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_utils.c F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_utils.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00
stm32f1xx_ll_wwdg.h F1 CUBE V1.5.0 2017-05-04 10:31:59 +02:00