mirror of https://github.com/ARMmbed/mbed-os.git
135 lines
4.8 KiB
C
135 lines
4.8 KiB
C
/*
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* Copyright (c) 2013 Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
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* integrated circuit in a product or a software update for such product, must reproduce
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* the above copyright notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
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* used to endorse or promote products derived from this software without specific prior
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* written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary or object form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "port_api.h"
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#include "pinmap.h"
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#if defined(TARGET_MCU_NRF51822) || defined(TARGET_MCU_NRF52832)
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#define GPIO_REG_LIST {NRF_GPIO}
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#endif
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static NRF_GPIO_Type * const m_ports[] = GPIO_REG_LIST;
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#if defined(TARGET_MCU_NRF51822)
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static const uint32_t m_gpio_pin_count[] = {31};
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#elif defined(TARGET_MCU_NRF52832)
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static const uint32_t m_gpio_pin_count[] = {32};
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#elif defined(TARGET_MCU_NRF52840)
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static const uint32_t m_gpio_pin_count[] = {32, 16};
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#else
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#error not recognized gpio count for mcu
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#endif
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#define GPIO_PORT_COUNT (sizeof(m_gpio_pin_count)/sizeof(m_gpio_pin_count[0]))
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PinName port_pin(PortName port, int pin_n)
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{
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#if defined(TARGET_MCU_NRF51822) || defined(TARGET_MCU_NRF52832)
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return (PinName)pin_n;
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#else
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return (PinName)NRF_GPIO_PIN_MAP(port, pin_n);
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#endif
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}
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void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
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{
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MBED_ASSERT((uint32_t)port < GPIO_PORT_COUNT);
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obj->port = port;
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obj->mask = mask;
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port_dir(obj, dir);
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}
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void port_mode(port_t *obj, PinMode mode)
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{
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uint32_t i;
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// The mode is set per pin: reuse pinmap logic
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for (i = 0; i<31; i++) {
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if (obj->mask & (1 << i)) {
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pin_mode(port_pin(obj->port, i), mode);
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}
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}
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}
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void port_dir(port_t *obj, PinDirection dir)
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{
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uint32_t i;
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volatile uint32_t *reg_cnf = (volatile uint32_t*) m_ports[obj->port]->PIN_CNF;
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switch (dir) {
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case PIN_INPUT:
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for (i = 0; i < m_gpio_pin_count[obj->port]; i++) {
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if (obj->mask & (1 << i)) {
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reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
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| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
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| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
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| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
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}
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}
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break;
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case PIN_OUTPUT:
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for (i = 0; i < m_gpio_pin_count[obj->port]; i++) {
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if (obj->mask & (1 << i)) {
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reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
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| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
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| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
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| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
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| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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}
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}
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break;
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}
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}
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void port_write(port_t *obj, int value)
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{
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m_ports[obj->port]->OUTSET = value & obj->mask;
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m_ports[obj->port]->OUTCLR = (~value) & obj->mask;
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}
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int port_read(port_t *obj)
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{
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return ((m_ports[obj->port]->IN) & obj->mask);
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}
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