mirror of https://github.com/ARMmbed/mbed-os.git
279 lines
8.0 KiB
C
279 lines
8.0 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "mbed_assert.h"
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#include "pwmout_api.h"
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#include "cmsis.h"
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#include "pinmap.h"
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#include "mbed_error.h"
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// Ported from LPC824 and adapted.
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#if DEVICE_PWMOUT
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#define PWM_IRQn SCT_IRQn
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// Bit flags for used SCT Outputs
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static unsigned char sct_used = 0;
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static int sct_inited = 0;
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// Pinmap used for testing only
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static const PinMap PinMap_PWM_testing[] = {
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{P0_0, 0, 0},
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{P0_1, 0, 0},
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{P0_2, 0, 0},
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{P0_3, 0, 0},
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{P0_4, 0, 0},
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{P0_5, 0, 0},
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{P0_6, 0, 0},
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{P0_7, 0, 0},
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{P0_8, 0, 0},
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{P0_9, 0, 0},
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{P0_10, 0, 0},
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{P0_11, 0, 0},
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{P0_12, 0, 0},
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{P0_13, 0, 0},
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{P0_14, 0, 0},
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{P0_15, 0, 0},
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{P0_16, 0, 0},
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{P0_17, 0, 0},
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{NC, NC, 0}
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};
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// Find available output channel
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// Max number of PWM outputs is 4 on LPC812
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static int get_available_sct() {
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int i;
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// Find available output channel 0..3
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// Also need one Match register per channel
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for (i = 0; i < CONFIG_SCT_nOU; i++) {
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if ((sct_used & (1 << i)) == 0)
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return i;
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}
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return -1;
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}
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// Any Port pin may be used for PWM.
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// Max number of PWM outputs is 4
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void pwmout_init(pwmout_t* obj, PinName pin) {
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MBED_ASSERT(pin != (PinName)NC);
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int sct_n = get_available_sct();
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if (sct_n == -1) {
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error("No available SCT Output");
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}
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sct_used |= (1 << sct_n);
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obj->pwm = (LPC_SCT_TypeDef*)LPC_SCT;
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obj->pwm_ch = sct_n;
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LPC_SCT_TypeDef* pwm = obj->pwm;
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// Init SCT on first use
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if (! sct_inited) {
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sct_inited = 1;
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// Enable the SCT clock
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LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
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// Clear peripheral reset the SCT:
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LPC_SYSCON->PRESETCTRL |= (1 << 8);
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// Two 16-bit counters, autolimit (ie reset on Match_0)
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pwm->CONFIG |= ((0x3 << 17) | 0x01);
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// halt and clear the counter
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pwm->CTRL_U |= (1 << 2) | (1 << 3);
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// System Clock (30 Mhz) -> Prescaler -> us_ticker (1 MHz)
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pwm->CTRL_U &= ~(0x7F << 5);
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pwm->CTRL_U |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
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pwm->EVENT[0].CTRL = (1 << 12) | 0; // Event_0 on Match_0
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pwm->EVENT[0].STATE = 0xFFFFFFFF; // All states
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// unhalt the counter:
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// - clearing bit 2 of the CTRL register
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pwm->CTRL_U &= ~(1 << 2);
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}
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// LPC81x has only one SCT and 4 Outputs
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// LPC82x has only one SCT and 6 Outputs
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// LPC1549 has 4 SCTs and 16 Outputs
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switch(sct_n) {
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case 0:
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// SCTx_OUT0
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LPC_SWM->PINASSIGN[6] &= ~0xFF000000;
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LPC_SWM->PINASSIGN[6] |= (pin << 24);
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break;
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case 1:
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// SCTx_OUT1
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LPC_SWM->PINASSIGN[7] &= ~0x000000FF;
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LPC_SWM->PINASSIGN[7] |= (pin);
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break;
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case 2:
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// SCTx_OUT2
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LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
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LPC_SWM->PINASSIGN[7] |= (pin << 8);
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break;
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case 3:
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// SCTx_OUT3
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LPC_SWM->PINASSIGN[7] &= ~0x00FF0000;
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LPC_SWM->PINASSIGN[7] |= (pin << 16);
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break;
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default:
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break;
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}
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pwm->EVENT[sct_n + 1].CTRL = (1 << 12) | (sct_n + 1); // Event_n on Match_n
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pwm->EVENT[sct_n + 1].STATE = 0xFFFFFFFF; // All states
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pwm->OUT[sct_n].SET = (1 << 0); // All PWM channels are SET on Event_0
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pwm->OUT[sct_n].CLR = (1 << (sct_n + 1)); // PWM ch is CLRed on Event_(ch+1)
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// default to 20ms: standard for servos, and fine for e.g. brightness control
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pwmout_period_ms(obj, 20); // 20ms period
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pwmout_write (obj, 0.0); // 0ms pulsewidth, dutycycle 0
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}
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void pwmout_free(pwmout_t* obj) {
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// PWM channel is now free
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sct_used &= ~(1 << obj->pwm_ch);
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// Disable the SCT clock when all channels free
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if (sct_used == 0) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8);
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sct_inited = 0;
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};
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}
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// Set new dutycycle (0.0 .. 1.0)
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void pwmout_write(pwmout_t* obj, float value) {
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//value is new dutycycle
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if (value < 0.0f) {
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value = 0.0;
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} else if (value > 1.0f) {
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value = 1.0;
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}
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// Match_0 is PWM period. Compute new endtime of pulse for current channel
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uint32_t t_off = (uint32_t)((float)(obj->pwm->MATCHREL[0].U) * value);
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obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = t_off; // New endtime
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// Clear OxRES (conflict resolution register) bit first, effect of simultaneous set and clear on output x
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int offset = (obj->pwm_ch * 2);
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obj->pwm->RES &= ~(0x3 << offset);
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if (value == 0.0f) { // duty is 0%
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// Clear output
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obj->pwm->RES |= (0x2 << offset);
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// Set CLR event to be same as SET event, makes output to be 0 (low)
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obj->pwm->OUT[(obj->pwm_ch)].CLR = (1 << 0);
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} else {
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// Set output
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obj->pwm->RES |= (0x1 << offset);
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// Use normal CLR event (current SCT ch + 1)
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obj->pwm->OUT[(obj->pwm_ch)].CLR = (1 << ((obj->pwm_ch) + 1));
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}
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}
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// Get dutycycle (0.0 .. 1.0)
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float pwmout_read(pwmout_t* obj) {
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uint32_t t_period = obj->pwm->MATCHREL[0].U;
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//Sanity check
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if (t_period == 0) {
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return 0.0;
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};
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uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U;
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float v = (float)t_off/(float)t_period;
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//Sanity check
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return (v > 1.0f) ? (1.0f) : (v);
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}
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// Set the PWM period, keeping the duty cycle the same (for this channel only!).
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void pwmout_period(pwmout_t* obj, float seconds){
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pwmout_period_us(obj, seconds * 1000000.0f);
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}
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// Set the PWM period, keeping the duty cycle the same (for this channel only!).
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void pwmout_period_ms(pwmout_t* obj, int ms) {
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pwmout_period_us(obj, ms * 1000);
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}
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// Set the PWM period, keeping the duty cycle the same (for this channel only!).
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void pwmout_period_us(pwmout_t* obj, int us) {
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uint32_t t_period = obj->pwm->MATCHREL[0].U; // Current PWM period
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obj->pwm->MATCHREL[0].U = (uint32_t)us; // New PWM period
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// Sanity check
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if (t_period == 0) {
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return;
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}
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else {
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int cnt = sct_used;
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int ch = 0;
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// Update match period for exising PWM channels
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do {
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// Get current pulse width
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uint32_t t_off = obj->pwm->MATCHREL[ch + 1].U;
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// Get the duty
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float v = (float)t_off/(float)t_period;
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// Update pulse width for this channel
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obj->pwm->MATCHREL[ch + 1].U = (uint32_t)((float)us * (float)v);
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// Get next used SCT channel
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cnt = cnt >> 1;
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ch++;
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} while (cnt != 0);
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}
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}
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//Set pulsewidth
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void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
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pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
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}
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//Set pulsewidth
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void pwmout_pulsewidth_ms(pwmout_t* obj, int ms){
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pwmout_pulsewidth_us(obj, ms * 1000);
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}
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//Set pulsewidth
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void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
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if (us == 0) { // pulse width is 0
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// Set CLR event to be same as SET event, makes output to be 0 (low)
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obj->pwm->OUT[(obj->pwm_ch)].CLR = (1 << 0);
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} else {
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// Use normal CLR event (current SCT ch + 1)
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obj->pwm->OUT[(obj->pwm_ch)].CLR = (1 << ((obj->pwm_ch) + 1));
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}
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//Should add Sanity check to make sure pulsewidth < period!
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obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = (uint32_t)us; // New endtime for this channel
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}
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const PinMap *pwmout_pinmap()
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{
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return PinMap_PWM_testing;
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}
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#endif
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