mirror of https://github.com/ARMmbed/mbed-os.git
70 lines
3.0 KiB
C
70 lines
3.0 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2016-2021 STMicroelectronics
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_I2C_DEVICE_H
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#define MBED_I2C_DEVICE_H
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#include "PeripheralNames.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Define I2C Device */
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#if DEVICE_I2C
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/* Define IP version */
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#define I2C_IP_VERSION_V2
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// Common settings: I2C clock = 80 MHz, Analog filter = ON, Digital filter coefficient = 0
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#define TIMING_VAL_80M_CLK_100KHZ 0x30C14E6B // Standard mode with Rise Time = 400ns and Fall Time = 100ns
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#define TIMING_VAL_80M_CLK_400KHZ 0x10D1143A // Fast mode with Rise Time = 250ns and Fall Time = 100ns
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#define TIMING_VAL_80M_CLK_1MHZ 0x00810E27 // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
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#define I2C_PCLK_80M 80000000 // 80 MHz
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// Common settings: I2C clock = 48 MHz, Analog filter = ON, Digital filter coefficient = 0
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#define TIMING_VAL_48M_CLK_100KHZ 0x20A03E55 // Standard mode with Rise Time = 400ns and Fall Time = 100ns
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#define TIMING_VAL_48M_CLK_400KHZ 0x10800C21 // Fast mode with Rise Time = 250ns and Fall Time = 100ns
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#define TIMING_VAL_48M_CLK_1MHZ 0x00500816 // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
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#define I2C_PCLK_48M 48000000 // 48 MHz
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// Common settings: I2C clock = 120 MHz, Analog filter = ON, Digital filter coefficient = 0
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#define TIMING_VAL_120M_CLK_100KHZ 0x107075B0 // Standard mode with Rise Time = 400ns and Fall Time = 100ns
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#define TIMING_VAL_120M_CLK_400KHZ 0x00501E6C // Fast mode with Rise Time = 250ns and Fall Time = 100ns
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#define TIMING_VAL_120M_CLK_1MHZ 0x00200A26 // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
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#define I2C_PCLK_120M 120000000 // 120 MHz
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#define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI)
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/* Family specifc settings for clock source */
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#define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
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#define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK
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#define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
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#define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
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uint32_t i2c_get_pclk(I2CName i2c);
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uint32_t i2c_compute_timing(uint32_t clock_src_freq, uint32_t i2c_freq);
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uint32_t i2c_get_timing(I2CName i2c, int hz);
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void i2c_compute_presc_scldel_sdadel(uint32_t clock_src_freq, uint32_t I2C_speed);
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uint32_t i2c_compute_scll_sclh(uint32_t clock_src_freq, uint32_t I2C_speed);
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#ifdef __cplusplus
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}
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#endif
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#endif // DEVICE_I2C
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#endif
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