mirror of https://github.com/ARMmbed/mbed-os.git
122 lines
3.2 KiB
C++
122 lines
3.2 KiB
C++
/*
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* Copyright (c) 2019, Arm Limited and affiliates.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef SPI_SLAVE_TESTER_H
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#define SPI_SLAVE_TESTER_H
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#include "SPITester.h"
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class SPISlaveTester: public SPITester {
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public:
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SPISlaveTester(const PinList *form_factor, const PinList *exclude_pins)
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: SPITester(form_factor, exclude_pins)
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{
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}
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/**
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* Read the number of transfers which have occurred
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*
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* @return The number of SPI transfers that have completed since
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* spi was reset.
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*/
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uint16_t get_transfer_count();
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/**
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* Read a checksum of data sent to the tester
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*
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* @return The sum of all bytes sent to the tester since reset.
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*/
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uint32_t get_receive_checksum();
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/**
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* Set the clock mode of the spi_slave module.
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*
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* @param mode Spi clock mode
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*/
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void set_mode(SpiMode mode);
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/**
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* Set bit order during transmission of the spi_slave module.
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*
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* @param mode Spi clock mode
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*/
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void set_bit_order(SpiBitOrder bit_order);
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/**
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* Set symbol size used during transmission of the spi_slave module.
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*
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* @param mode Spi clock mode
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*/
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void set_sym_size(uint32_t sym_size);
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/**
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* Set full-duplex/half-duplex transmission mode of the spi_slave module.
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*
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* @param duplex duplex mode used for the transmission
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*/
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void set_duplex_mode(SpiDuplex duplex);
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/**
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* Set tx/rx symbol count.
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*
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* @tx_cnt TX symbol count
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* @rx_cnt RX symbol count
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*
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* @note Required only in Half-Duplex mode.
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*/
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void set_hd_tx_rx_cnt(uint16_t tx_cnt, uint16_t rx_cnt);
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/**
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* Set divisor to generate spi clock from FPGA base clock (100 MHz).
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*
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* @clk_div clock divisor.
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*/
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void set_spi_master_freq(uint16_t clk_div);
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/**
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* Set number of symbols to be transmitted by spi master.
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*
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* @num_of_sym Number of symbols to be transmitted by spi master.
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*/
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void set_num_of_symbols(uint16_t num_of_sym);
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/**
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* Set delay in us between start request and start of transmission.
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*
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* @start_delay_us Delay in us between start request and start of transmission.
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*/
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void set_start_delay_us(uint8_t start_delay_us);
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/**
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* Set delay in ns between transmission of successive symbols.
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*
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* @sym_delay_ns Delay in ns between transmission of successive symbols.
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*/
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void set_sym_delay_ns(uint16_t sym_delay_ns);
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/**
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* Request transmission start from FPGA master.
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*
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* @note Transmission will be started after the specified delay.
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*/
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void start_transfer();
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};
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#endif
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