mirror of https://github.com/ARMmbed/mbed-os.git
206 lines
8.9 KiB
C
206 lines
8.9 KiB
C
/**
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******************************************************************************
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* @file Objects.h
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* @brief Implements an assertion.
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* @internal
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* @author ON Semiconductor
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* $Rev: 0.1 $
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* $Date: 2015-11-06 $
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******************************************************************************
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* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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* All rights reserved. This software and/or documentation is licensed by ON Semiconductor
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* under limited terms and conditions. The terms and conditions pertaining to the software
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* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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* if applicable the software license agreement. Do not use this software and/or
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* documentation unless you have carefully read and you agree to the limited terms and
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* conditions. By using this software and/or documentation, you agree to the limited
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* terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup debug
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*/
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#ifndef OBJECTS_H_
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#define OBJECTS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "gpio_map.h"
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#include "uart_16c550_map.h"
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#include "PinNames.h"
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#include "PortNames.h"
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#include "PeripheralNames.h"
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#include "target_config.h"
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#include "spi.h"
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typedef enum {
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FlowControlNone_1,
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FlowControlRTS_1,
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FlowControlCTS_1,
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FlowControlRTSCTS_1
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} FlowControl_1;
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struct serial_s {
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Uart16C550Reg_pt UARTREG;
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FlowControl_1 FlowCtrl;
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IRQn_Type IRQType;
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int index;
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};
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typedef struct _gpio_t {
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GpioReg_pt GPIOMEMBASE;
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PinName gpioPin;
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uint32_t gpioMask;
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} gpio_t;
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/* TODO: This is currently a dummy structure; implementation will be done along
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* with the sleep API implementation
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*/
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typedef struct sleep_s {
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uint32_t timeToSleep; /* 0: Use sleep type variable to select low power mode; Noz-zero: Selects sleep type based on timeToSleep duration using table 1. sleep below */
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uint8_t SleepType; /* 0: Sleep; 1: DeepSleep; 2: Coma */
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} sleep_t;
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/* Table 1. Sleep
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___________________________________________________________________________________
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| Sleep duration | Sleep Type |
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|-------------------------------------------------------------------|---------------|
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| > Zero AND <= SLEEP_DURATION_SLEEP_MAX | sleep |
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| > SLEEP_DURATION_SLEEP_MAX AND <= SLEEP_DURATION_DEEPSLEEP_MAX | deepsleep |
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| > SLEEP_DURATION_DEEPSLEEP_MAX | coma |
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|___________________________________________________________________|_______________|
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*/
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struct gpio_irq_s {
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uint32_t pin;
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uint32_t pinMask;
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GpioReg_pt GPIOMEMBASE;
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};
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typedef struct {
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/* options to configure the ADC */
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uint8_t interruptConfig; /**< 1= interrupt Enable 0=Interrupt Disable */
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uint8_t PrescaleVal; /**< Prescaler: Sets the converter clock frequency. Fclk = 32 MHz/(prescaler + 1) where prescaler is the value of this register segment. The minimum tested value is 07 (4 MHz clock) */
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uint8_t measurementType; /**< 1= Absolute 0= Differential */
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uint8_t mode; /**< 1= Continuous Conversion 0= Single Shot */
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uint8_t referenceCh; /**< Selects 1 to 8 channels for reference channel */
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uint8_t convCh; /**< Selects 1 or 8 channels to do a conversion on.*/
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uint8_t inputScale; /**< Sets the input scale, 000 ? 1.0, 001 ? 0.6923, 010 ? 0.5294, 011 ? 0.4286, 100 ? 0.3600, 101 ? 0.3103, 110 ? 0.2728, 111 ? 0.2432 */
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uint8_t samplingTime; /**< Sample Time. Sets the measure time in units of PCLKperiod * (Prescale + 1).*/
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uint8_t WarmUpTime; /**< The number of converter clock cycles that the state machine dwells in the warm or warm_meas state */
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uint16_t samplingRate; /**< Sets the sample rate in units of PCLKperiod * (Prescale + 1). */
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} analog_config_s;
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struct analogin_s {
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analog_config_s *adcConf;
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AdcReg_pt adcReg;
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PinName pin;
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uint8_t pinFlag;
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uint32_t ADC_Offset_Value;
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};
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struct pwmout_s {
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PwmReg_pt pwmReg;
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};
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struct port_s {
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GpioReg_pt GPIOMEMBASE;
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PortName port;
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uint32_t mask;
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};
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typedef enum {
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littleEndian = 0,
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bigEndian
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} spi_ipc7207_endian_t, *spi_ipc7207_endian_pt;
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/** Type for the clock polarity. */
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typedef enum {
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activeLow = 0,
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activeHigh
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} spi_clockPolarity_t, *spi_clockPolarity_pt;
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/** Type for the clock phase. */
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typedef enum {
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risingEdge = 0,
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fallingEdge
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} spi_clockPhase_t, *spi_clockPhase_pt;
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struct spi_s {
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SpiIpc7207Reg_pt membase; /* Register address */
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IRQn_Type irq; /* IRQ number of the IRQ associated to the device. */
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uint8_t irqEnable; /* IRQ enables for 8 IRQ sources:
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* - bit 7 = Receive FIFO Full
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* - bit 6 = Receive FIFO 'Half' Full (watermark level)
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* - bit 5 = Receive FIFO Not Empty
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* - bit 4 = Transmit FIFO Not Full
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* - bit 3 = Transmit FIFO 'Half' Empty (watermark level)
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* - bit 2 = Transmit FIFO Empty
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* - bit 1 = Transfer Error
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* - bit 0 = ssIn (conditionally inverted and synchronized to PCLK)
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* (unused option in current implementation / irq 6 and 7 used) */
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uint8_t slaveSelectEnable; /* Slave Select enables (x4):
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* - 0 (x4) = Slave select enable
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* - 1 (x4) = Slave select disable */
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uint8_t slaveSelectBurst; /* Slave Select burst mode:
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* - NO_BURST_MODE = Burst mode disable
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* - BURST_MODE = Burst mode enable */
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uint8_t slaveSelectPolarity; /* Slave Select polarity (x4) for up to 4 slaves:
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* - 0 (x4) = Slave select is active low
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* - 1 (x4) = Slave select is active high */
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uint8_t txWatermark; /* Transmit FIFO Watermark: Defines level of RX Half Full Flag
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* - Value between 1 and 15
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* (unused option in current implementation / not txWatermark irq used) */
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uint8_t rxWatermark; /* Receive FIFO Watermark: Defines level of TX Half Full Flag:
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* - Value between 1 and 15
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* * (unused option in current implementation / rxWatermark fixed to 1) */
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spi_ipc7207_endian_t endian; /* Bits endianness:
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* - LITTLE_ENDIAN = LSB first
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* - BIG_ENDIAN = MSB first */
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uint8_t samplingEdge; /* SDI sampling edge (relative to SDO sampling edge):
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* - 0 = opposite to SDO sampling edge
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* - 1 = same as SDO sampling edge */
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uint32_t baudrate; /* The expected baud rate. */
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spi_clockPolarity_t clockPolarity; /* The clock polarity (active high or low). */
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spi_clockPhase_t clockPhase; /* The clock phase (sample on rising or falling edge). */
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uint8_t wordSize; /* The size word size in number of bits. */
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uint8_t Mode;
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uint32_t event;
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};
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struct i2c_s {
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uint32_t baudrate; /**< The expected baud rate. */
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uint32_t I2cStatusFromInt;
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uint8_t ClockSource; /**< I2C clock source, 0 – clkI2C pin, 1 – PCLK */
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uint8_t irqEnable; /**< IRQs to be enabled */
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I2cIpc7208Reg_pt membase; /**< The memory base for the device's registers. */
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IRQn_Type irq; /**< The IRQ number of the IRQ associated to the device. */
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//queue_pt rxQueue; /**< The receive queue for the device instance. */
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};
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struct trng_s {
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RandReg_pt membase; /**< The memory base for the device's registers. */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif //OBJECTS_H_
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