mirror of https://github.com/ARMmbed/mbed-os.git
185 lines
6.0 KiB
C
185 lines
6.0 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2015-2016 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "pwmout_api.h"
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#if DEVICE_PWMOUT
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#include "cmsis.h"
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#include "pinmap.h"
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#include "PeripheralPins.h"
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#include "nu_modutil.h"
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#include "nu_miscutil.h"
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#include "nu_bitutil.h"
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struct nu_pwm_var {
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uint32_t en_msk;
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};
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static struct nu_pwm_var pwm0_var = {
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.en_msk = 0
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};
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static struct nu_pwm_var pwm1_var = {
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.en_msk = 0
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};
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static uint32_t pwm_modinit_mask = 0;
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static const struct nu_modinit_s pwm_modinit_tab[] = {
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{PWM_0_0, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P0_IRQn, &pwm0_var},
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{PWM_0_1, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P0_IRQn, &pwm0_var},
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{PWM_0_2, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P1_IRQn, &pwm0_var},
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{PWM_0_3, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P1_IRQn, &pwm0_var},
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{PWM_0_4, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P2_IRQn, &pwm0_var},
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{PWM_0_5, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P2_IRQn, &pwm0_var},
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{PWM_1_0, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P0_IRQn, &pwm1_var},
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{PWM_1_1, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P0_IRQn, &pwm1_var},
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{PWM_1_2, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P1_IRQn, &pwm1_var},
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{PWM_1_3, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P1_IRQn, &pwm1_var},
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{PWM_1_4, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P2_IRQn, &pwm1_var},
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{PWM_1_5, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P2_IRQn, &pwm1_var},
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{NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
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};
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static void pwmout_config(pwmout_t* obj);
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void pwmout_init(pwmout_t* obj, PinName pin)
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{
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obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
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MBED_ASSERT((int) obj->pwm != NC);
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const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->pwm);
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// NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
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if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
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// Reset this module if no channel enabled
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SYS_ResetModule(modinit->rsetidx);
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}
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PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
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uint32_t chn = NU_MODSUBINDEX(obj->pwm);
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// NOTE: Channels 0/1/2/3/4/5 share a clock source.
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if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
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// Select clock source of paired channels
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CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
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// Enable clock of paired channels
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CLK_EnableModuleClock(modinit->clkidx);
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}
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// Wire pinout
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pinmap_pinout(pin, PinMap_PWM);
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// Default: period = 10 ms, pulse width = 0 ms
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obj->period_us = 1000 * 10;
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obj->pulsewidth_us = 0;
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pwmout_config(obj);
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// Enable output of the specified PWM channel
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PWM_EnableOutput(pwm_base, 1 << chn);
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PWM_Start(pwm_base, 1 << chn);
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((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
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// Mark this module to be inited.
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int i = modinit - pwm_modinit_tab;
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pwm_modinit_mask |= 1 << i;
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}
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void pwmout_free(pwmout_t* obj)
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{
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PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
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uint32_t chn = NU_MODSUBINDEX(obj->pwm);
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PWM_ForceStop(pwm_base, 1 << chn);
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const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->pwm);
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((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
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if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
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CLK_DisableModuleClock(modinit->clkidx);
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}
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// Mark this module to be deinited.
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int i = modinit - pwm_modinit_tab;
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pwm_modinit_mask &= ~(1 << i);
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}
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void pwmout_write(pwmout_t* obj, float value)
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{
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obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
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pwmout_config(obj);
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}
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float pwmout_read(pwmout_t* obj)
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{
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return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
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}
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void pwmout_period(pwmout_t* obj, float seconds)
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{
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pwmout_period_us(obj, seconds * 1000000.0f);
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}
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void pwmout_period_ms(pwmout_t* obj, int ms)
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{
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pwmout_period_us(obj, ms * 1000);
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}
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// Set the PWM period, keeping the duty cycle the same.
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void pwmout_period_us(pwmout_t* obj, int us)
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{
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uint32_t period_us_old = obj->period_us;
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uint32_t pulsewidth_us_old = obj->pulsewidth_us;
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obj->period_us = us;
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obj->pulsewidth_us = NU_CLAMP(obj->period_us * pulsewidth_us_old / period_us_old, 0, obj->period_us);
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pwmout_config(obj);
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}
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void pwmout_pulsewidth(pwmout_t* obj, float seconds)
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{
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pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
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}
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void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
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{
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pwmout_pulsewidth_us(obj, ms * 1000);
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}
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void pwmout_pulsewidth_us(pwmout_t* obj, int us)
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{
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obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
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pwmout_config(obj);
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}
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static void pwmout_config(pwmout_t* obj)
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{
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PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
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uint32_t chn = NU_MODSUBINDEX(obj->pwm);
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// NOTE: Support period < 1s
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//PWM_ConfigOutputChannel(pwm_base, chn, 1000 * 1000 / obj->period_us, obj->pulsewidth_us * 100 / obj->period_us);
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PWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, obj->pulsewidth_us * 100 / obj->period_us, obj->period_us);
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}
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#endif
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