mirror of https://github.com/ARMmbed/mbed-os.git
121 lines
4.0 KiB
C
121 lines
4.0 KiB
C
/**
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*******************************************************************************
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* @file sleep.c
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* @brief Implementation of an sleep functionality
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* @internal
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* @author ON Semiconductor
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* $Rev: 0.1 $
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* $Date: 01-21-2016 $
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******************************************************************************
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* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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* All rights reserved. This software and/or documentation is licensed by ON Semiconductor
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* under limited terms and conditions. The terms and conditions pertaining to the software
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* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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* if applicable the software license agreement. Do not use this software and/or
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* documentation unless you have carefully read and you agree to the limited terms and
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* conditions. By using this software and/or documentation, you agree to the limited
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* terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup sleep
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*
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* @details
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* Sleep implementation
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*
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*/
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#if DEVICE_SLEEP
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#include "mbed_power_mgmt.h"
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#include "sleep_api.h"
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#include "cmsis_nvic.h"
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#define ENABLE (uint8_t)0x01
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#define DISABLE (uint8_t)0x00
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#define MAC_LUT_SIZE (uint8_t)96
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#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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void fncs36510_sleep(void)
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{
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/** Unset SLEEPDEEP (SCR) and COMA to select sleep mode */
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SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
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PMUREG->CONTROL.BITS.ENCOMA = DISABLE;
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/* Enter into sleep mode */
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__ISB();
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__WFI();
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}
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void fncs36510_deepsleep(void)
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{
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/** Set SLEEPDEEP (SCR) and unset COMA to select deep sleep mode */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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PMUREG->CONTROL.BITS.ENCOMA = DISABLE;
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/** Enter into deep sleep mode */
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__ISB();
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__WFI();
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__NOP();
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__NOP();
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/** Wait for the external 32MHz to be power-ed up & running
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* Re-power down the 32MHz internal osc
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*/
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while (!CLOCKREG->CSR.BITS.XTAL32M);
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PMUREG->CONTROL.BITS.INT32M = 1;
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}
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void fncs36510_coma(void)
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{
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/** Set SLEEPDEEP (SCR) and set COMA to select coma mode */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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PMUREG->CONTROL.BITS.ENCOMA = ENABLE;
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/* TODO Wait till MAC is idle */
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// while((MACHWREG->SEQUENCER == MACHW_SEQ_TX) || (MACHWREG->SEQUENCER == MACHW_SEQ_ED) || (MACHWREG->SEQUENCER == MACHW_SEQ_CCA));
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/* TODO Back up MAC_LUT *
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uint8_t MAC_LUT_BackUp[MAC_LUT_SIZE];
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fMacBackupFrameStoreLUT(MAC_LUT_BackUp); */
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/* Disable UART 1 & 2 FIFO during coma*/
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UART1REG->FCR.WORD &= ~(FCR_FIFO_ENABLE);
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UART2REG->FCR.WORD &= ~(FCR_FIFO_ENABLE);
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/** Enter into coma mode */
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__ISB();
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__WFI();
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/** Wait for the external 32MHz to be power-ed up & running
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* Re-power down the 32MHz internal osc
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*/
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while (!CLOCKREG->CSR.BITS.XTAL32M);
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PMUREG->CONTROL.BITS.INT32M = 1;
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/** Trim the oscillators */
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if ((TRIMREG->TRIM_32K_EXT & 0xFFFF0000) != 0xFFFF0000) {
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CLOCKREG->TRIM_32K_EXT.WORD = TRIMREG->TRIM_32K_EXT;
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}
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if ((TRIMREG->TRIM_32M_EXT & 0xFFFF0000) != 0xFFFF0000) {
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CLOCKREG->TRIM_32M_EXT.WORD = TRIMREG->TRIM_32M_EXT;
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}
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/* Enable UART 1 & 2 FIFO */
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UART1REG->FCR.WORD |= FCR_FIFO_ENABLE;
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UART2REG->FCR.WORD |= FCR_FIFO_ENABLE;
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/* TODO Restore MAC_LUT *
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fMacRestoreFrameStoreLUT(MAC_LUT_BackUp); */
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}
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#endif /* DEVICE_SLEEP */
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