mirror of https://github.com/ARMmbed/mbed-os.git
234 lines
6.7 KiB
C
234 lines
6.7 KiB
C
/* mbed Microcontroller Library
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "gpio_irq_api.h"
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#include "mbed_error.h"
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#include "PeripheralNames.h"
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#include "pinmap.h"
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#include "mbed_critical.h"
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#define CHANNEL_NUM 7
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const PinMap PinMap_GPIO_IRQ[] = {
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{PC4, GPIO_IRQ_0, PIN_DATA(0, 0)},
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{PL0, GPIO_IRQ_1, PIN_DATA(0, 0)},
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{PD4, GPIO_IRQ_2, PIN_DATA(0, 0)},
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{PK1, GPIO_IRQ_3, PIN_DATA(0, 0)},
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{PK0, GPIO_IRQ_4, PIN_DATA(0, 0)},
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{PC0, GPIO_IRQ_5, PIN_DATA(0, 0)},
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{PC1, GPIO_IRQ_6, PIN_DATA(0, 0)},
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{NC, NC, 0}
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};
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static uint32_t channel_ids[CHANNEL_NUM] = {0};
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static gpio_irq_handler hal_irq_handler[CHANNEL_NUM] = {NULL};
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static void INT_IRQHandler(PinName pin, GPIO_IRQName irq_id, uint32_t index)
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{
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uint32_t val;
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GPIO_Port port;
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uint32_t mask;
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port = (GPIO_Port)(pin >> 3);
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mask = 0x01 << (pin & 0x07);
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// Clear interrupt request
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CG_ClearINTReq((CG_INTSrc)(CG_INT_SRC_1 + index));
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// Get pin value
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val = GPIO_ReadDataBit(port, mask);
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switch (val) {
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// Falling edge detection
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case 0:
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hal_irq_handler[index](channel_ids[index], IRQ_FALL);
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break;
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// Rising edge detection
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case 1:
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hal_irq_handler[index](channel_ids[index], IRQ_RISE);
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break;
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default:
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break;
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}
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}
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void INT1_IRQHandler(void)
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{
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INT_IRQHandler(PC4, GPIO_IRQ_0, 0);
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}
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void INT2_IRQHandler(void)
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{
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INT_IRQHandler(PL0, GPIO_IRQ_1, 1);
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}
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void INT7_IRQHandler(void)
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{
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INT_IRQHandler(PD4, GPIO_IRQ_2, 2);
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}
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void INT8_IRQHandler(void)
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{
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INT_IRQHandler(PK1, GPIO_IRQ_3, 3);
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}
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void INTD_IRQHandler(void)
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{
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INT_IRQHandler(PK0, GPIO_IRQ_4, 4);
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}
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void INTE_IRQHandler(void)
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{
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INT_IRQHandler(PC0, GPIO_IRQ_5, 5);
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}
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void INTF_IRQHandler(void)
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{
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INT_IRQHandler(PC1, GPIO_IRQ_6, 6);
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}
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
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{
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// Get gpio interrupt ID
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obj->irq_id = pinmap_peripheral(pin, PinMap_GPIO_IRQ);
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core_util_critical_section_enter();
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// Get pin mask
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obj->mask = (uint32_t)(1 << (pin & 0x07));
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// Get GPIO port
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obj->port = (GPIO_Port)(pin >> 3);
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// Set pin level as LOW
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GPIO_WriteDataBit(obj->port, obj->mask, 0);
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// Enable gpio interrupt function
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pinmap_pinout(pin, PinMap_GPIO_IRQ);
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// Get GPIO irq source
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switch (obj->irq_id) {
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case GPIO_IRQ_0:
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obj->irq_src = CG_INT_SRC_1;
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break;
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case GPIO_IRQ_1:
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obj->irq_src = CG_INT_SRC_2;
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break;
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case GPIO_IRQ_2:
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obj->irq_src = CG_INT_SRC_7;
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break;
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case GPIO_IRQ_3:
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obj->irq_src = CG_INT_SRC_8;
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break;
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case GPIO_IRQ_4:
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obj->irq_src = CG_INT_SRC_D;
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break;
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case GPIO_IRQ_5:
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obj->irq_src = CG_INT_SRC_E;
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break;
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case GPIO_IRQ_6:
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obj->irq_src = CG_INT_SRC_F;
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break;
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default:
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break;
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}
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// Save irq handler
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hal_irq_handler[obj->irq_src] = handler;
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// Save irq id
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channel_ids[obj->irq_src] = id;
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// Initialize interrupt event as both edges detection
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obj->event = CG_INT_ACTIVE_STATE_INVALID;
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// Clear gpio pending interrupt
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NVIC_ClearPendingIRQ((IRQn_Type)obj->irq_id);
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// Set interrupt event and enable INTx clear
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CG_SetSTBYReleaseINTSrc(obj->irq_src, (CG_INTActiveState)obj->event, ENABLE);
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core_util_critical_section_exit();;
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return 0;
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}
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void gpio_irq_free(gpio_irq_t *obj)
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{
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// Clear gpio_irq
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NVIC_ClearPendingIRQ((IRQn_Type)obj->irq_id);
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// Reset interrupt handler
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hal_irq_handler[obj->irq_src] = NULL;
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// Reset interrupt id
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channel_ids[obj->irq_src] = 0;
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}
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void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
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{
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//Disable GPIO interrupt on obj
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gpio_irq_disable(obj);
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if (enable) {
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// Get gpio interrupt event
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if (event == IRQ_RISE) {
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if ((obj->event == CG_INT_ACTIVE_STATE_FALLING) ||
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(obj->event == CG_INT_ACTIVE_STATE_BOTH_EDGES)) {
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obj->event = CG_INT_ACTIVE_STATE_BOTH_EDGES;
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} else {
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obj->event = CG_INT_ACTIVE_STATE_RISING;
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}
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} else if (event == IRQ_FALL) {
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if ((obj->event == CG_INT_ACTIVE_STATE_RISING) ||
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(obj->event == CG_INT_ACTIVE_STATE_BOTH_EDGES)) {
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obj->event = CG_INT_ACTIVE_STATE_BOTH_EDGES;
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} else {
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obj->event = CG_INT_ACTIVE_STATE_FALLING;
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}
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} else {
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error("Not supported event\n");
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}
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} else {
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// Get gpio interrupt event
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if (event == IRQ_RISE) {
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if ((obj->event == CG_INT_ACTIVE_STATE_RISING) ||
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(obj->event == CG_INT_ACTIVE_STATE_INVALID)) {
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obj->event = CG_INT_ACTIVE_STATE_INVALID;
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} else {
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obj->event = CG_INT_ACTIVE_STATE_FALLING;
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}
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} else if (event == IRQ_FALL) {
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if ((obj->event == CG_INT_ACTIVE_STATE_FALLING) ||
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(obj->event == CG_INT_ACTIVE_STATE_INVALID)) {
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obj->event = CG_INT_ACTIVE_STATE_INVALID;
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} else {
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obj->event = CG_INT_ACTIVE_STATE_RISING;
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}
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} else {
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error("Not supported event\n");
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}
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}
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if (obj->event != CG_INT_ACTIVE_STATE_INVALID ) {
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// Set interrupt event and enable INTx clear
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CG_SetSTBYReleaseINTSrc(obj->irq_src, (CG_INTActiveState)obj->event, ENABLE);
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GPIO_SetOutputEnableReg(obj->port, obj->mask, DISABLE);
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} else {
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GPIO_SetOutputEnableReg(obj->port, obj->mask, ENABLE);
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}
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// Clear interrupt request
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CG_ClearINTReq(obj->irq_src);
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// Enable GPIO interrupt on obj
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gpio_irq_enable(obj);
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}
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void gpio_irq_enable(gpio_irq_t *obj)
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{
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// Clear and Enable gpio_irq object
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NVIC_ClearPendingIRQ((IRQn_Type)obj->irq_id);
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NVIC_EnableIRQ((IRQn_Type)obj->irq_id);
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}
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void gpio_irq_disable(gpio_irq_t *obj)
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{
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// Disable gpio_irq object
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NVIC_DisableIRQ((IRQn_Type)obj->irq_id);
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}
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